From 22b18d97a00be3ac30b23007035662938c44dd3d Mon Sep 17 00:00:00 2001 From: Flyinghead Date: Sun, 28 Oct 2018 01:29:44 +0200 Subject: [PATCH] Don't flush the dynarec cache when the sh4 instruction cache is flushed Fixes Shikigami No Shiro II slowness --- core/hw/sh4/modules/ccn.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/core/hw/sh4/modules/ccn.cpp b/core/hw/sh4/modules/ccn.cpp index 972f0406e..6aacb68c4 100644 --- a/core/hw/sh4/modules/ccn.cpp +++ b/core/hw/sh4/modules/ccn.cpp @@ -66,8 +66,10 @@ void CCN_CCR_write(u32 addr, u32 value) //what is 0xAC13DBF8 from ? if (temp.ICI && curr_pc!=0xAC13DBF8) { - printf("Sh4: i-cache invalidation %08X\n",curr_pc); - sh4_cpu.ResetCache(); + //printf("Sh4: i-cache invalidation %08X\n",curr_pc); + // Shikigami No Shiro II sets ICI frequently + // Any reason to flush the dynarec cache for this? + //sh4_cpu.ResetCache(); } temp.ICI=0;