naomi: minimal emulation of 840-0001E comm board

makes gunsur2 and gunsur2j boot
various minor naomi changes

core/hw/naomi/awcartridge.cpp

@@ -194,7 +194,7 @@ u32 AWCartridge::ReadMem(u32 address, u32 size) {
 			return retval;
 		}
 	default:
-		EMUERROR("%X, %d", address, size);
+		INFO_LOG(NAOMI, "Unhandled awcart read %X, %d", address, size);
 		return 0xffff;
 	}
 }
@@ -209,7 +209,7 @@ void AWCartridge::WriteMem(u32 address, u32 data, u32 size)
 		break;
 
 	case AW_EPR_OFFSETL_addr:
-		epr_offset = (epr_offset & 0xffff0000) | data;
+		epr_offset = (epr_offset & 0xffff0000) | (u16)data;
 		recalc_dma_offset(EPR);
 		break;
 
@@ -229,18 +229,19 @@ void AWCartridge::WriteMem(u32 address, u32 data, u32 size)
 		break;
 
 	case AW_MPR_FILE_OFFSETL_addr:
-		mpr_file_offset = (mpr_file_offset & 0xffff0000) | data;
+		mpr_file_offset = (mpr_file_offset & 0xffff0000) | (u16)data;
 		recalc_dma_offset(MPR_FILE);
 		break;
 
 	case AW_PIO_DATA_addr:
 		// write to ROM board address space, including FlashROM programming using CFI (TODO)
+		DEBUG_LOG(NAOMI, "Write to AW_PIO_DATA: %x", data);
 		if (epr_offset == 0x7fffff)
 			mpr_bank = data & 3;
 		break;
 
 	default:
-		INFO_LOG(NAOMI, "%X: %d sz %d", address, data, size);
+		INFO_LOG(NAOMI, "Unhandled awcart write %X: %d sz %d", address, data, size);
 		break;
 	}
 }
@@ -389,10 +390,11 @@ void AWCartridge::recalc_dma_offset(int mode)
 
 void *AWCartridge::GetDmaPtr(u32 &limit)
 {
+	limit = std::min(std::min(limit, (u32)32), dma_limit - dma_offset);
 	u32 offset = dma_offset / 2;
-	for (int i = 0; i < 16; i++)
+	for (int i = 0; i < limit / 2; i++)
 		decrypted_buf[i] = decrypt16(offset + i);
-	limit = min(limit, (u32)32);
+
 //	printf("AWCART Decrypted data @ %08x:\n", dma_offset);
 //	for (int i = 0; i < 16; i++)
 //	{

core/hw/naomi/awcartridge.h

@@ -53,7 +53,7 @@ private:
 	static const u8 permutation_table[4][16];
 	static const sbox_set sboxes_table[4];
 	static u16 decrypt(u16 cipherText, u32 address, const u32 key);
-	u16 decrypt16(u32 address) { return decrypt(((u16 *)RomPtr)[address], address, rombd_key); }
+	u16 decrypt16(u32 address) { return decrypt(((u16 *)RomPtr)[address % (RomSize / 2)], address, rombd_key); }
 
 	void set_key();
 	void recalc_dma_offset(int mode);

core/hw/naomi/gdcartridge.cpp

@@ -499,7 +499,7 @@ void GDCartridge::device_start()
 					(u64(picdata[0x29]) << 0));
 		}
 
-		DEBUG_LOG(NAOMI, "key is %08x%08x\n", (u32)((key & 0xffffffff00000000ULL)>>32), (u32)(key & 0x00000000ffffffffULL));
+		DEBUG_LOG(NAOMI, "key is %08x%08x", (u32)((key & 0xffffffff00000000ULL)>>32), (u32)(key & 0x00000000ffffffffULL));
 
 		u8 buffer[2048];
 		std::string gdrom_path = get_game_basename() + "/" + gdrom_name;
@@ -596,7 +596,10 @@ void GDCartridge::device_reset()
 void *GDCartridge::GetDmaPtr(u32 &size)
 {
 	if (dimm_data == NULL)
+	{
+		size = 0;
 		return NULL;
+	}
 	dimm_cur_address = DmaOffset & (dimm_data_size-1);
 	size = min(size, dimm_data_size - dimm_cur_address);
 	return dimm_data + dimm_cur_address;

core/hw/naomi/naomi_cart.cpp

@@ -1,3 +1,24 @@
+/*
+	This file is part of reicast.
+
+    reicast is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 2 of the License, or
+    (at your option) any later version.
+
+    reicast is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with reicast.  If not, see <https://www.gnu.org/licenses/>.
+*/
+// Naomi comm board emulation from mame
+// https://github.com/mamedev/mame/blob/master/src/mame/machine/m3comm.cpp
+// license:BSD-3-Clause
+// copyright-holders:MetalliC
+
 #include "naomi_cart.h"
 #include "naomi_regs.h"
 #include "cfg/cfg.h"
@@ -779,12 +800,38 @@ u32 NaomiCartridge::ReadMem(u32 address, u32 size)
 		DEBUG_LOG(NAOMI, "naomi GD? READ: %X, %d", address, size);
 		return reg_dimm_4c;
 
-	case 0x18:
+	case NAOMI_COMM2_CTRL_addr & 255:
-		DEBUG_LOG(NAOMI, "naomi reg 0x18 : returning random data");
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_CTRL read");
-		return 0x4000^rand();
+		return comm_ctrl;
-		break;
 
-	default: break;
+	case NAOMI_COMM2_OFFSET_addr & 255:
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_OFFSET read");
+		return comm_offset;
+
+	case NAOMI_COMM2_DATA_addr & 255:
+		{
+			DEBUG_LOG(NAOMI, "NAOMI_COMM2_DATA read @ %04x", comm_offset);
+			u16 value;
+			if (comm_ctrl & 1)
+				value = m68k_ram[comm_offset / 2];
+			else {
+				// TODO u16 *commram = (u16*)membank("comm_ram")->base();
+				value = comm_ram[comm_offset / 2];
+			}
+			comm_offset += 2;
+			return value;
+		}
+
+	case NAOMI_COMM2_STATUS0_addr & 255:
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_STATUS0 read");
+		return comm_offset_status0;
+
+	case NAOMI_COMM2_STATUS1_addr & 255:
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_STATUS1 read");
+		return comm_offset_status1;
+
+	default:
+		break;
 	}
 	DEBUG_LOG(NAOMI, "naomi?WTF? ReadMem: %X, %d", address, size);
 
@@ -903,6 +950,37 @@ void NaomiCartridge::WriteMem(u32 address, u32 data, u32 size)
 		DEBUG_LOG(NAOMI, "naomi WriteMem: %X <= %X, %d", address, data, size);
 		return;
 
+	case NAOMI_COMM2_CTRL_addr & 255:
+		comm_ctrl = (u16)data;
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_CTRL set to %x", comm_ctrl);
+		return;
+
+	case NAOMI_COMM2_OFFSET_addr & 255:
+		comm_offset = (u16)data;
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_OFFSET set to %x", comm_offset);
+		return;
+
+	case NAOMI_COMM2_DATA_addr & 255:
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_DATA written @ %04x %04x", comm_offset, (u16)data);
+		if (comm_ctrl & 1)
+			m68k_ram[comm_offset / 2] = (u16)data;
+		else {
+			// TODO u16 *commram = (u16*)membank("comm_ram")->base();
+			comm_ram[comm_offset / 2] = (u16)data;
+		}
+		comm_offset += 2;
+		return;
+
+	case NAOMI_COMM2_STATUS0_addr & 255:
+		comm_offset_status0 = (u16)data;
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_STATUS0 set to %x", comm_offset_status0);
+		return;
+
+	case NAOMI_COMM2_STATUS1_addr & 255:
+		comm_offset_status1 = (u16)data;
+		DEBUG_LOG(NAOMI, "NAOMI_COMM2_STATUS1 set to %x", comm_offset_status1);
+		return;
+
 	default: break;
 	}
 	DEBUG_LOG(NAOMI, "naomi?WTF? WriteMem: %X <= %X, %d", address, data, size);

core/hw/naomi/naomi_cart.h

@@ -52,6 +52,13 @@ protected:
 	u32 DmaOffset;
 	u32 DmaCount;
 	u32 key;
+	// Naomi 840-0001E communication board
+	u16 comm_ctrl = 0xC000;
+	u16 comm_offset = 0;
+	u16 comm_offset_status0 = 0;
+	u16 comm_offset_status1 = 0;
+	u16 m68k_ram[128 * 1024 / sizeof(u16)];
+	u16 comm_ram[64 * 1024 / sizeof(u16)];
 };
 
 class DecryptedCartridge : public NaomiCartridge

core/hw/naomi/naomi_regs.h

@@ -12,6 +12,13 @@ enum
 	NAOMI_DMA_OFFSETH_addr		= 0x5f700C,
 	NAOMI_DMA_OFFSETL_addr		= 0x5f7010,
 	NAOMI_DMA_COUNT_addr		= 0x5f7014,
+	// Naomi 840-0001E communication board
+	NAOMI_COMM2_CTRL_addr		= 0x5f7018,
+	NAOMI_COMM2_OFFSET_addr		= 0x5f701C,
+	NAOMI_COMM2_DATA_addr		= 0x5F7020,
+	NAOMI_COMM2_STATUS0_addr	= 0x5F7024,
+	NAOMI_COMM2_STATUS1_addr	= 0x5F7028,
+
 	NAOMI_BOARDID_WRITE_addr	= 0x5F7078,
 	NAOMI_BOARDID_READ_addr		= 0x5F707C,
 	NAOMI_COMM_OFFSET_addr		= 0x5F7050,