From 10e6b296c5696e89475899d8ae4d6fa651ef9126 Mon Sep 17 00:00:00 2001 From: Flyinghead Date: Mon, 8 Jul 2019 00:03:44 +0200 Subject: [PATCH] fix cue issue. better logging --- core/hw/sh4/dyna/blockmanager.cpp | 16 ++-- core/hw/sh4/sh4_mmr.cpp | 122 +++++++++++++++--------------- core/imgread/common.h | 2 +- 3 files changed, 68 insertions(+), 72 deletions(-) diff --git a/core/hw/sh4/dyna/blockmanager.cpp b/core/hw/sh4/dyna/blockmanager.cpp index 1a72a7219..26f994527 100644 --- a/core/hw/sh4/dyna/blockmanager.cpp +++ b/core/hw/sh4/dyna/blockmanager.cpp @@ -11,6 +11,7 @@ #include "../sh4_core.h" #include "hw/sh4/sh4_mem.h" +#include "hw/sh4/sh4_opcode_list.h" #include "hw/sh4/sh4_sched.h" @@ -785,8 +786,8 @@ bool bm_RamWriteAccess(void *p) return true; } -bool print_stats; -#if 0 +bool print_stats = true; + void fprint_hex(FILE* d,const char* init,u8* ptr, u32& ofs, u32 limit) { int base=ofs; @@ -822,12 +823,12 @@ void print_blocks() INFO_LOG(DYNAREC, "Writing blocks to %p", f); } - for (RuntimeBlockInfo *blk : blkmap) + for (auto it : blkmap) { - + RuntimeBlockInfoPtr blk = it.second; if (f) { - fprintf(f,"block: %p\n",blk); + fprintf(f,"block: %p\n",blk.get()); fprintf(f,"vaddr: %08X\n",blk->vaddr); fprintf(f,"paddr: %08X\n",blk->addr); fprintf(f,"hash: %s\n",blk->hash()); @@ -854,7 +855,7 @@ void print_blocks() for (;joplist.size();j++) { shil_opcode* op = &blk->oplist[j]; - fprint_hex(f,"//h:",pucode,hcode,op->host_offs); + //fprint_hex(f,"//h:",pucode,hcode,op->host_offs); if (gcode!=op->guest_offs) { @@ -880,7 +881,7 @@ void print_blocks() fprintf(f,"//il:%d:%d: %s\n",op->guest_offs,op->host_offs,s.c_str()); } - fprint_hex(f,"//h:",pucode,hcode,blk->host_code_size); + //fprint_hex(f,"//h:",pucode,hcode,blk->host_code_size); fprintf(f,"}\n"); } @@ -891,5 +892,4 @@ void print_blocks() if (f) fclose(f); } #endif -#endif diff --git a/core/hw/sh4/sh4_mmr.cpp b/core/hw/sh4/sh4_mmr.cpp index ca6ca8830..854a2438c 100644 --- a/core/hw/sh4/sh4_mmr.cpp +++ b/core/hw/sh4/sh4_mmr.cpp @@ -443,6 +443,9 @@ void DYNACALL WriteMem_sq(u32 addr,T data) //*********** //**Area 7** //*********** + +#define OUT_OF_RANGE(reg) INFO_LOG(SH4, "Out of range on register %s index %x", reg, addr) + //Read Area7 template T DYNACALL ReadMem_area7(u32 addr) @@ -478,7 +481,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("CCN"); + return 0; } break; @@ -489,7 +493,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("UBC"); + return 0; } break; @@ -498,21 +503,20 @@ T DYNACALL ReadMem_area7(u32 addr) { return (T)sh4_rio_read(BSC,addr & 0xFF); } - else if ((addr>=BSC_SDMR2_addr) && (addr<= 0x1F90FFFF)) - { - //dram settings 2 / write only - INFO_LOG(SH4, "Read from write-only registers [dram settings 2]"); - } - else if ((addr>=BSC_SDMR3_addr) && (addr<= 0x1F94FFFF)) - { - //dram settings 3 / write only - INFO_LOG(SH4, "Read from write-only registers [dram settings 3]"); - } else { - INFO_LOG(SH4, "Out of range on register index . %x", addr); + OUT_OF_RANGE("BSC"); + return 0; } break; + case A7_REG_HASH(BSC_SDMR2_addr): + //dram settings 2 / write only + INFO_LOG(SH4, "Read from write-only registers [dram settings 2]"); + return 0; + case A7_REG_HASH(BSC_SDMR3_addr): + //dram settings 3 / write only + INFO_LOG(SH4, "Read from write-only registers [dram settings 3]"); + return 0; @@ -523,7 +527,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("DMAC"); + return 0; } break; @@ -534,7 +539,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("CPG"); + return 0; } break; @@ -545,7 +551,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("RTC"); + return 0; } break; @@ -556,7 +563,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("INTC"); + return 0; } break; @@ -567,7 +575,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("TMU"); + return 0; } break; @@ -578,7 +587,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("SCI"); + return 0; } break; @@ -589,7 +599,8 @@ T DYNACALL ReadMem_area7(u32 addr) } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("SCIF"); + return 0; } break; @@ -610,7 +621,7 @@ T DYNACALL ReadMem_area7(u32 addr) } - //INFO_LOG(SH4, "Unknown Read from Area7 - addr=%x", addr); + INFO_LOG(SH4, "Unknown Read from Area7 - addr=%x", addr); return 0; } @@ -640,133 +651,118 @@ void DYNACALL WriteMem_area7(u32 addr,T data) if (addr<=0x1F00003C) { sh4_rio_write(CCN,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("CCN"); } - break; + return; case A7_REG_HASH(UBC_BASE_addr): if (addr<=0x1F200020) { sh4_rio_write(UBC,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("UBC"); } - break; + return; case A7_REG_HASH(BSC_BASE_addr): if (addr<=0x1F800048) { sh4_rio_write(BSC,addr & 0xFF,data); - return; - } - else if ((addr>=BSC_SDMR2_addr) && (addr<= 0x1F90FFFF)) - { - //dram settings 2 / write only - return;//no need ? - } - else if ((addr>=BSC_SDMR3_addr) && (addr<= 0x1F94FFFF)) - { - //dram settings 3 / write only - return;//no need ? } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("BSC"); } - break; - + return; + case A7_REG_HASH(BSC_SDMR2_addr): + //dram settings 2 / write only + return; + case A7_REG_HASH(BSC_SDMR3_addr): + //dram settings 3 / write only + return; case A7_REG_HASH(DMAC_BASE_addr): if (addr<=0x1FA00040) { sh4_rio_write(DMAC,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("DMAC"); } - break; + return; case A7_REG_HASH(CPG_BASE_addr): if (addr<=0x1FC00010) { sh4_rio_write(CPG,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("CPG"); } - break; + return; case A7_REG_HASH(RTC_BASE_addr): if (addr<=0x1FC8003C) { sh4_rio_write(RTC,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("RTC"); } - break; + return; case A7_REG_HASH(INTC_BASE_addr): if (addr<=0x1FD0000C) { sh4_rio_write(INTC,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("INTC"); } - break; + return; case A7_REG_HASH(TMU_BASE_addr): if (addr<=0x1FD8002C) { sh4_rio_write(TMU,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("TMU"); } - break; + return; case A7_REG_HASH(SCI_BASE_addr): if (addr<=0x1FE0001C) { sh4_rio_write(SCI,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("SCI"); } - break; + return; case A7_REG_HASH(SCIF_BASE_addr): if (addr<=0x1FE80024) { sh4_rio_write(SCIF,addr & 0xFF,data); - return; } else { - INFO_LOG(SH4, "Out of range on register index %x", addr); + OUT_OF_RANGE("SCIF"); } - break; + return; //who really cares about ht-udi ? it's not existent on dc iirc .. case A7_REG_HASH(UDI_BASE_addr): @@ -784,7 +780,7 @@ void DYNACALL WriteMem_area7(u32 addr,T data) break; } - //EMUERROR3("Write to Area7 not implemented , addr=%x,data=%x",addr,data); + INFO_LOG(SH4, "Write to Area7 not implemented, addr=%x, data=%x", addr, data); } diff --git a/core/imgread/common.h b/core/imgread/common.h index 194bbf11c..275c66f15 100644 --- a/core/imgread/common.h +++ b/core/imgread/common.h @@ -230,7 +230,7 @@ struct Disc //session 2 : start @ track 3, and its fad ses.FirstTrack=3; - ses.StartFAD=tracks[0].StartFAD; + ses.StartFAD=tracks[2].StartFAD; sessions.push_back(ses); //this isn't always true for gdroms, depends on area look @ the get-toc code