pvr: use a switch instead of 100 ifs

This commit is contained in:
Flyinghead 2019-10-21 19:13:29 +02:00
parent d27142f565
commit 0dc4b07538
2 changed files with 52 additions and 53 deletions

View File

@ -18,66 +18,60 @@ void pvr_WriteReg(u32 paddr,u32 data)
{
u32 addr=paddr&pvr_RegMask;
if (addr==ID_addr)
return;//read only
if (addr==REVISION_addr)
return;//read only
if (addr==TA_YUV_TEX_CNT_addr)
return;//read only
if (addr==STARTRENDER_addr)
switch (addr)
{
case ID_addr:
case REVISION_addr:
case TA_YUV_TEX_CNT_addr:
return; // read only
case STARTRENDER_addr:
//start render
rend_start_render();
return;
}
if (addr==TA_LIST_INIT_addr)
{
if (data>>31)
case TA_LIST_INIT_addr:
if (data >> 31)
{
ta_vtx_ListInit();
data=0;
TA_NEXT_OPB = TA_NEXT_OPB_INIT;
TA_ITP_CURRENT = TA_ISP_BASE;
}
}
break;
if (addr==SOFTRESET_addr)
{
if (data!=0)
case SOFTRESET_addr:
if (data != 0)
{
if (data&1)
if (data & 1)
ta_vtx_SoftReset();
data=0;
}
}
return;
if (addr==TA_LIST_CONT_addr)
{
case TA_LIST_CONT_addr:
//a write of anything works ?
ta_vtx_ListCont();
}
break;
if (addr == SPG_CONTROL_addr || addr == SPG_LOAD_addr)
{
case SPG_CONTROL_addr:
case SPG_LOAD_addr:
if (PvrReg(addr, u32) != data)
{
PvrReg(addr, u32) = data;
CalculateSync();
}
return;
}
if (addr == FB_R_CTRL_addr)
{
bool vclk_div_changed = (PvrReg(addr, u32) ^ data) & (1 << 23);
PvrReg(addr, u32) = data;
if (vclk_div_changed)
CalculateSync();
case FB_R_CTRL_addr:
{
bool vclk_div_changed = (PvrReg(addr, u32) ^ data) & (1 << 23);
PvrReg(addr, u32) = data;
if (vclk_div_changed)
CalculateSync();
}
return;
}
if (addr == FB_R_SIZE_addr)
{
case FB_R_SIZE_addr:
if (PvrReg(addr, u32) != data)
{
PvrReg(addr, u32) = data;
@ -85,35 +79,40 @@ void pvr_WriteReg(u32 paddr,u32 data)
check_framebuffer_write();
}
return;
}
if (addr == TA_YUV_TEX_BASE_addr)
{
case TA_YUV_TEX_BASE_addr:
PvrReg(addr, u32) = data & 0x00FFFFF8;
YUV_init();
return;
}
else if (addr == TA_YUV_TEX_CTRL_addr)
{
case TA_YUV_TEX_CTRL_addr:
PvrReg(addr, u32) = data;
YUV_init();
return;
}
else if (addr == FB_R_SOF1_addr)
{
case FB_R_SOF1_addr:
data &= 0x00fffffc;
if (data == FB_W_SOF1)
{
rend_swap_frame();
}
}
break;
if (addr>=PALETTE_RAM_START_addr && PvrReg(addr,u32)!=data)
{
pal_needs_update=true;
}
case FB_W_SOF1_addr:
case FB_W_SOF2_addr:
data &= 0x01fffffc;
break;
if (addr>=FOG_TABLE_START_addr && addr<=FOG_TABLE_END_addr && PvrReg(addr,u32)!=data)
{
fog_needs_update=true;
default:
if (addr >= PALETTE_RAM_START_addr && PvrReg(addr,u32) != data)
{
pal_needs_update = true;
}
else if (addr >= FOG_TABLE_START_addr && addr <= FOG_TABLE_END_addr && PvrReg(addr,u32) != data)
{
fog_needs_update = true;
}
break;
}
PvrReg(addr,u32)=data;
}
@ -122,7 +121,7 @@ void Regs_Reset(bool hard)
{
if (hard)
memset(&pvr_regs[0], 0, sizeof(pvr_regs));
ID = 0x17FD11DB;
ID_Reg = 0x17FD11DB;
REVISION = 0x00000011;
SOFTRESET = 0x00000007;
SPG_HBLANK_INT.full = 0x031D0000;

View File

@ -419,7 +419,7 @@ union TA_YUV_TEX_CTRL_type
// Regs -- Start
#define ID PvrReg(ID_addr,u32) // R Device ID
#define ID_Reg PvrReg(ID_addr,u32) // R Device ID
#define REVISION PvrReg(REVISION_addr,u32) // R Revision number
#define SOFTRESET PvrReg(SOFTRESET_addr,u32) // RW CORE & TA software reset