AICA: Make async dma an option, default on
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10c7650690
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@ -195,6 +195,7 @@ int dma_end_sched(int tag, int cycl, int jitt)
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SB_ADST = 0x00000000;//dma done
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SB_ADLEN = 0x00000000;
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// indicate that dma is not happening, or has been paused
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SB_ADSUSP |= 0x10;
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asic_RaiseInterrupt(holly_SPU_DMA);
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@ -238,8 +239,13 @@ void Write_SB_ADST(u32 addr, u32 data)
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WriteMem32_nommu(dst+i,data);
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}
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*/
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// idicate that dma is in progress
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SB_ADSUSP &= ~0x10;
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if (!settings.aica.OldSyncronousDma)
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{
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// Schedule the end of DMA transfer interrupt
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int cycles = len * (SH4_MAIN_CLOCK / 2 / 25000000); // 16 bits @ 25 MHz
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if (cycles < 4096)
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@ -247,6 +253,11 @@ void Write_SB_ADST(u32 addr, u32 data)
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else
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sh4_sched_request(dma_sched_id, cycles);
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}
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else
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{
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dma_end_sched(0, 0, 0);
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}
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}
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}
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}
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@ -297,6 +297,7 @@ void LoadSettings()
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settings.aica.LimitFPS = cfgLoadInt("config", "aica.LimitFPS", 1);
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settings.aica.NoBatch = cfgLoadInt("config", "aica.NoBatch", 0);
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settings.aica.NoSound = cfgLoadInt("config", "aica.NoSound", 0);
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settings.aica.OldSyncronousDma = cfgLoadBool("config", "aica.OldSyncronousDma", false);
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settings.rend.UseMipmaps = cfgLoadInt("config", "rend.UseMipmaps", 1);
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settings.rend.WideScreen = cfgLoadInt("config", "rend.WideScreen", 0);
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settings.rend.Clipping = cfgLoadInt("config", "rend.Clipping", 1);
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@ -654,6 +654,7 @@ struct settings_t
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u32 DSPEnabled; //0 -> no, 1 -> yes
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u32 NoBatch;
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u32 NoSound; //0 ->sound, 1 -> no sound
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bool OldSyncronousDma; // 0 -> sync dma (old behavior), 1 -> async dma (fixes some games, partial implementation)
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} aica;
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#if USE_OMX
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