wince: arm64 dynarec fixes
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553f6054ce
commit
011849ea74
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@ -220,7 +220,6 @@ void ngen_mainloop(void* v_cntx)
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"no_update: \n\t" // next_pc _MUST_ be on w29
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"no_update: \n\t" // next_pc _MUST_ be on w29
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"ldr w0, [x28, %[CpuRunning]] \n\t"
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"ldr w0, [x28, %[CpuRunning]] \n\t"
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"cbz w0, .end_mainloop \n\t"
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"cbz w0, .end_mainloop \n\t"
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"ldr w29, [x28, %[pc]] \n\t" // shouldn't be necessary
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#ifdef NO_MMU
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#ifdef NO_MMU
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"movz x2, %[RCB_SIZE], lsl #16 \n\t"
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"movz x2, %[RCB_SIZE], lsl #16 \n\t"
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@ -323,13 +322,11 @@ static void WriteMemNoEx(u32 addr, T data, u32 pc)
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#endif
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#endif
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}
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}
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static u32 interpreter_fallback(u16 op, u32 pc)
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static void interpreter_fallback(u16 op, OpCallFP *oph, u32 pc)
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{
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{
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try {
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try {
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OpDesc[op]->oph(op);
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oph(op);
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return 0;
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} catch (SH4ThrownException& ex) {
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} catch (SH4ThrownException& ex) {
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die("IFB exception");
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if (pc & 1)
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if (pc & 1)
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{
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{
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// Delay slot
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// Delay slot
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@ -337,19 +334,15 @@ static u32 interpreter_fallback(u16 op, u32 pc)
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pc--;
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pc--;
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}
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}
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Do_Exception(pc, ex.expEvn, ex.callVect);
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Do_Exception(pc, ex.expEvn, ex.callVect);
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return 1;
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longjmp(jmp_env, 1);
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}
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}
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}
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}
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static u32 exception_raised;
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static void do_sqw_mmu_no_ex(u32 addr, u32 pc)
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static void do_sqw_mmu_no_ex(u32 addr, u32 pc)
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{
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{
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try {
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try {
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do_sqw_mmu(addr);
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do_sqw_mmu(addr);
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exception_raised = 0;
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} catch (SH4ThrownException& ex) {
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} catch (SH4ThrownException& ex) {
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die("do_sqw_mmu exception");
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if (pc & 1)
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if (pc & 1)
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{
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{
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// Delay slot
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// Delay slot
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@ -357,8 +350,7 @@ static void do_sqw_mmu_no_ex(u32 addr, u32 pc)
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pc--;
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pc--;
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}
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}
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Do_Exception(pc, ex.expEvn, ex.callVect);
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Do_Exception(pc, ex.expEvn, ex.callVect);
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exception_raised = 1;
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longjmp(jmp_env, 1);
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printf("SQW MMU EXCEPTION\n");
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}
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}
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}
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}
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@ -371,7 +363,7 @@ public:
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Arm64Assembler() : Arm64Assembler(emit_GetCCPtr())
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Arm64Assembler() : Arm64Assembler(emit_GetCCPtr())
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{
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{
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}
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}
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Arm64Assembler(void *buffer) : MacroAssembler((u8 *)buffer, 64 * 1024), regalloc(this)
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Arm64Assembler(void *buffer) : MacroAssembler((u8 *)buffer, emit_FreeSpace()), regalloc(this)
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{
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{
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call_regs.push_back(&w0);
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call_regs.push_back(&w0);
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call_regs.push_back(&w1);
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call_regs.push_back(&w1);
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@ -520,13 +512,10 @@ public:
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}
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}
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else
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else
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{
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{
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Mov(*call_regs[1], block->vaddr + op.guest_offs - (op.delay_slot ? 1 : 0)); // pc
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Mov(*call_regs64[1], reinterpret_cast<uintptr_t>(*OpDesc[op.rs3._imm]->oph)); // op handler
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Mov(*call_regs[2], block->vaddr + op.guest_offs - (op.delay_slot ? 1 : 0)); // pc
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GenCallRuntime(interpreter_fallback);
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GenCallRuntime(interpreter_fallback);
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Cmp(w0, 0);
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Ldr(w29, sh4_context_mem_operand(&next_pc));
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GenBranch(no_update, ne);
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}
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}
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break;
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break;
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@ -788,10 +777,6 @@ public:
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Mov(*call_regs[1], block->vaddr + op.guest_offs - (op.delay_slot ? 1 : 0)); // pc
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Mov(*call_regs[1], block->vaddr + op.guest_offs - (op.delay_slot ? 1 : 0)); // pc
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GenCallRuntime(do_sqw_mmu_no_ex);
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GenCallRuntime(do_sqw_mmu_no_ex);
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Cmp(w0, 0);
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Ldr(w29, sh4_context_mem_operand(&next_pc));
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GenBranch(no_update, ne);
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}
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}
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else
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else
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{
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{
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@ -927,6 +912,7 @@ public:
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}
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}
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regalloc.OpEnd(&op);
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regalloc.OpEnd(&op);
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}
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}
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regalloc.Cleanup();
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block->relink_offset = (u32)GetBuffer()->GetCursorOffset();
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block->relink_offset = (u32)GetBuffer()->GetCursorOffset();
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block->relink_data = 0;
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block->relink_data = 0;
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@ -1710,7 +1696,7 @@ private:
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std::vector<const XRegister*> call_regs64;
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std::vector<const XRegister*> call_regs64;
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std::vector<const VRegister*> call_fregs;
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std::vector<const VRegister*> call_fregs;
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Arm64RegAlloc regalloc;
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Arm64RegAlloc regalloc;
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RuntimeBlockInfo* block;
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RuntimeBlockInfo* block = NULL;
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const int read_memory_rewrite_size = 6; // worst case for u64: add, bfc, ldr, fmov, lsr, fmov
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const int read_memory_rewrite_size = 6; // worst case for u64: add, bfc, ldr, fmov, lsr, fmov
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// FIXME rewrite size per read/write size?
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// FIXME rewrite size per read/write size?
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const int write_memory_rewrite_size = 3;
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const int write_memory_rewrite_size = 3;
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