228 lines
16 KiB
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228 lines
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<h1>Savestate (.fcs)</h1>
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<a href="Technicalinformation.html">Technical Information</a> ›› <a href="Movieformats.html">Movie & Savestate formats</a> ›› </div>
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<a href="Movieformats.html"><img src="img/arrow_up.png" alt="Parent"/></a>
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<p></p>
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<p>FCE Ultra Save State Format</p>
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<p> Updated: Mar 9, 2003</p>
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<p>---------------------------------------</p>
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<p><br/></p>
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<p>FCE Ultra's save state format is now designed to be as forward and backwards</p>
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<p>compatible as possible. This is achieved through the (over)use of chunks.</p>
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<p>All multiple-byte variables are stored LSB(least significant byte)-first.</p>
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<p>Data types:</p>
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<p><br/></p>
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<p> (u)int8 - (un)signed 8 bit variable(also referred to as "byte")</p>
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<p> (u)int16 - (un)signed 16 bit variable</p>
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<p> (u)int32 - (un)signed 32 bit variable</p>
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<p><br/></p>
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<p>-- Main File Header:</p>
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<p><br/></p>
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<p>The main file header is 16-bytes in length. The first three bytes contain</p>
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<p>the string "FCS". The next byte contains the version of FCE Ultra that saved</p>
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<p>this save state. This document only applies to version "53"(.53) and higher.</p>
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<p>After the version byte, the size of the entire file in bytes(minus the 16 byte</p>
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<p>main file header) is stored. If oldversion is set to 255, the 32-bit version</p>
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<p>field will be used. In this field, a version such as 0.98.10 is stored as "9810"(decimal).</p>
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<p>The rest of the header is currently unused and should be nulled out. </p>
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<p>Example of relevant parts:</p>
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<p><br/></p>
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<p> FCS <uint8 oldversion> <uint32 totalsize> <uint32 version></p>
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<p><br/></p>
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<p>-- Section Chunks:</p>
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<p><br/></p>
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<p>Sections chunk headers are 5-bytes in length. The first byte defines what </p>
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<p>section it is, the next four bytes define the total size of the section</p>
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<p>(including the section chunk header).</p>
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<p><br/></p>
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<p> <uint8 section> <uint32 size></p>
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<p><br/></p>
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<p>Section definitions:</p>
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<p><br/></p>
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<p> 1 - "CPU"</p>
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<p> 2 - "CPUC"</p>
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<p> 3 - "PPU"</p>
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<p> 4 - "CTLR"</p>
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<p> 5 - "SND"</p>
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<p> 16 - "EXTRA"</p>
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<p><br/></p>
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<p>-- Subsection Chunks</p>
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<p><br/></p>
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<p>Subsection chunks are stored within section chunks. They contain the actual</p>
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<p>state data. Each subsection chunk is composed of an 8-byte header and the data.</p>
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<p>The header contains a description(a name) and the size of the data contained </p>
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<p>in the chunk:</p>
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<p> <uint8 description[4]> <uint32 size></p>
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<p><br/></p>
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<p>The name is a four-byte string. It does not need to be null-terminated.</p>
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<p>If the string is less than four bytes in length, the remaining unused bytes</p>
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<p>must be null.</p>
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<p><br/></p>
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<p>-- Subsection Chunk Description Definitions</p>
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<p><br/></p>
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<p>Note that not all subsection chunk description definitions listed below</p>
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<p>are guaranteed to be in the section chunk. It's just a list of what CAN</p>
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<p>be in a section chunk. This especially applies to the "EXTRA" subsection.</p>
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<p><br/></p>
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<p>---- Section "CPU"</p>
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<p><br/></p>
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<p> Name: Type: Description:</p>
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<p> </p>
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<p> PC uint16 Program Counter</p>
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<p> A uint8 Accumulator</p>
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<p> P uint8 Processor status register</p>
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<p> X uint8 X register</p>
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<p> Y uint8 Y register</p>
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<p> S uint8 Stack pointer</p>
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<p> RAM uint8[0x800] 2KB work RAM</p>
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<p><br/></p>
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<p>---- Section "CPUC" (emulator specific)</p>
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<p><br/></p>
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<p> Name: Type: Description:</p>
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<p><br/></p>
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<p> JAMM uint8 Non-zero value if CPU in a "jammed" state</p>
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<p> IRQL uint8 Non-zero value if IRQs are to be generated constantly</p>
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<p> ICoa int32 Temporary cycle counter</p>
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<p> ICou int32 Cycle counter</p>
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<p><br/></p>
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<p>---- Section "PPU"</p>
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<p><br/></p>
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<p> Name: Type: Description:</p>
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<p><br/></p>
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<p> NTAR uint8[0x800] 2 KB of name/attribute table RAM</p>
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<p> PRAM uint8[32] 32 bytes of palette index RAM</p>
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<p> SPRA uint8[0x100] 256 bytes of sprite RAM</p>
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<p> PPU uint8[4] Last values written to $2000 and $2001, the PPU</p>
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<p> status register, and the last value written to</p>
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<p> $2003.</p>
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<p> XOFF uint8 Tile X-offset.</p>
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<p> VTOG uint8 Toggle used by $2005 and $2006.</p>
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<p> RADD uint16 PPU Address Register(address written to/read from</p>
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<p> when $2007 is accessed).</p>
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<p> TADD uint16 PPU Address Register</p>
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<p> VBUF uint8 VRAM Read Buffer</p>
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<p> PGEN uint8 PPU "general" latch. See Ki's document.</p>
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<p><br/></p>
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<p>---- Section "CTLR" (somewhat emulator specific)</p>
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<p><br/></p>
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<p> Name: Type: Description:</p>
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<p><br/></p>
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<p> J1RB uint8 Bit to be returned when first joystick is read.</p>
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<p> J2RB uint8 Bit to be returned when second joystick is read.</p>
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<p><br/></p>
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<p>---- Section "SND" (somewhat emulator specific)</p>
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<p><br/></p>
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<p> NREG uint16 Noise LFSR.</p>
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<p> P17 uint8 Last byte written to $4017.</p>
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<p> PBIN uint8 DMC bit index.</p>
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<p> PAIN uint32 DMC address index(from $8000).</p>
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<p> PSIN uint32 DMC length counter(how many bytes left </p>
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<p> to fetch).</p>
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<p><br/></p>
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<p> <to be finished></p>
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<p><br/></p>
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<p>---- Section "EXTRA" (varying emulator specificness)</p>
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<p><br/></p>
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<p> For iNES-format games(incomplete, and doesn't apply to every game):</p>
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<p><br/></p>
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<p> Name: Type: Description:</p>
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<p><br/></p>
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<p> WRAM uint8[0x2000] 8KB of WRAM at $6000-$7fff</p>
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<p> MEXR uint8[0x8000] (very emulator specific)</p>
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<p> CHRR uint8[0x2000] 8KB of CHR RAM at $0000-$1fff(in PPU address space).</p>
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<p> EXNR uint8[0x800] Extra 2KB of name/attribute table RAM.</p>
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<p> MPBY uint8[32] (very emulator specific)</p>
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<p> MIRR uint8 Current mirroring:</p>
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<p> 0 = "Horizontal"</p>
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<p> 1 = "Vertical"</p>
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<p> $10 = Mirror from $2000</p>
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<p> $11 = Mirror from $2400</p>
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<p> IRQC uint32 Generic IRQ counter</p>
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<p> IQL1 uint32 Generic IRQ latch</p>
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<p> IQL2 uint32 Generic IRQ latch</p>
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<p> IRQA uint8 Generic IRQ on/off register.</p>
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<p> PBL uint8[4] List of 4 8KB ROM banks paged in at $8000-$FFFF</p>
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<p> CBL uint8[8] List of 8 1KB VROM banks page in at $0000-$1FFF(PPU).</p>
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<p><br/></p>
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<p> For FDS games(incomplete):</p>
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<p><br/></p>
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<p> Name: Type: Description:</p>
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<p><br/></p>
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<p> DDT<x> uint8[65500] Disk data for side x(0-3).</p>
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<p> FDSR uint8[0x8000] 32 KB of work RAM</p>
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<p> CHRR uint8[0x2000] 8 KB of CHR RAM</p>
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<p> IRQC uint32 IRQ counter</p>
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<p> IQL1 uint32 IRQ latch</p>
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<p> IRQA uint8 IRQ on/off.</p>
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<p><br/></p>
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<p> WAVE uint8[64] Carrier waveform data.</p>
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<p> MWAV uint8[32] Modulator waveform data.</p>
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<p> AMPL uint8[2] Amplitude data.</p>
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<p><br/></p>
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<p></p>
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<p class="rvps2"><span class="rvts13">Created with the Personal Edition of HelpNDoc: </span><a class="rvts14" href="http://www.helpndoc.com/help-authoring-tool">Create HTML Help, DOC, PDF and print manuals from 1 single source</a></p>
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