Mapper 342 fixes
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@ -107,8 +107,8 @@ const int CFI_CHIP = 0x13;
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static int CHR_SIZE = 0;
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static int CHR_SIZE = 0;
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static uint32 WRAM_SIZE = 0;
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static uint32 WRAM_SIZE = 0;
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static uint8 *WRAM = NULL;
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static uint8* WRAM = NULL;
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static uint8 *SAVE_FLASH = NULL;
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static uint8* SAVE_FLASH = NULL;
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static uint8* CFI;
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static uint8* CFI;
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static uint8 sram_enabled = 0;
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static uint8 sram_enabled = 0;
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@ -884,7 +884,7 @@ static DECLFW(COOLGIRL_WRITE) {
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if (mapper == 0b000100)
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if (mapper == 0b000100)
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{
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{
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// prg_bank_a[5:1] = cpu_data_in[4:0];
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// prg_bank_a[5:1] = cpu_data_in[4:0];
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SET_BITS(chr_bank_a, "5:1", V, "4:0");
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SET_BITS(prg_bank_a, "5:1", V, "4:0");
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// mirroring = { 1'b0, ~cpu_data_in[7]};
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// mirroring = { 1'b0, ~cpu_data_in[7]};
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mirroring = get_bits(V, "7") ^ 1;
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mirroring = get_bits(V, "7") ^ 1;
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}
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}
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@ -1462,6 +1462,7 @@ static DECLFW(COOLGIRL_WRITE) {
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case 0b1100: // 4'b1100: if (flags[0]) mirroring = {1'b0, cpu_data_in[6]}; // $E000, mirroring, for mapper #48
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case 0b1100: // 4'b1100: if (flags[0]) mirroring = {1'b0, cpu_data_in[6]}; // $E000, mirroring, for mapper #48
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if (flags & 1) // 48
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if (flags & 1) // 48
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mirroring = get_bits(V, "6"); // mirroring = cpu_data_in[6];
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mirroring = get_bits(V, "6"); // mirroring = cpu_data_in[6];
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break;
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case 0b1000: // 4'b1000: irq_scanline_latch = ~cpu_data_in; // $C000, IRQ latch
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case 0b1000: // 4'b1000: irq_scanline_latch = ~cpu_data_in; // $C000, IRQ latch
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mmc3_irq_latch = set_bits(mmc3_irq_latch, "7:0", get_bits(V, "7:0") ^ 0b11111111);
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mmc3_irq_latch = set_bits(mmc3_irq_latch, "7:0", get_bits(V, "7:0") ^ 0b11111111);
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break;
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break;
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@ -1961,32 +1962,19 @@ static void COOLGIRL_CpuCounter(int a) {
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// Mapper #23 - VRC4
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// Mapper #23 - VRC4
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if (vrc4_irq_control & 2) // if (ENABLE_MAPPER_021_022_023_025 & ENABLE_VRC4_INTERRUPTS & (vrc4_irq_control[1]))
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if (vrc4_irq_control & 2) // if (ENABLE_MAPPER_021_022_023_025 & ENABLE_VRC4_INTERRUPTS & (vrc4_irq_control[1]))
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{
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{
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// Cycle mode without prescaler is not used by any games? It's missed in fceux source code.
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vrc4_irq_prescaler++; // vrc4_irq_prescaler = vrc4_irq_prescaler + 1'b1; // count prescaler
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if (vrc4_irq_control & 4) // if (vrc4_irq_control[2]) // cycle mode
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// if ((vrc4_irq_prescaler_counter[1] == 0 && vrc4_irq_prescaler == 114)
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// || (vrc4_irq_prescaler_counter[1] == 1 && vrc4_irq_prescaler == 113)) // 114, 114, 113
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if ((!(vrc4_irq_prescaler_counter & 2) && vrc4_irq_prescaler == 114) || ((vrc4_irq_prescaler_counter & 2) && vrc4_irq_prescaler == 113))
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{
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{
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FCEU_PrintError("Cycle IRQ mode is not supported, please report to Cluster");
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vrc4_irq_prescaler = 0; // vrc4_irq_prescaler = 0;
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vrc4_irq_value++; // {carry, vrc4_irq_value[7:0]} = vrc4_irq_value[7:0] + 1'b1; // just count IRQ value
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vrc4_irq_prescaler_counter++; // vrc4_irq_prescaler_counter = vrc4_irq_prescaler_counter + 1'b1;
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if (vrc4_irq_value == 0) // if (carry)
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if (vrc4_irq_prescaler_counter == 0b11) vrc4_irq_prescaler_counter = 0; // if (vrc4_irq_prescaler_counter == 2'b11) vrc4_irq_prescaler_counter = 2'b00;
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vrc4_irq_value++; // {carry, vrc4_irq_value[7:0]} = vrc4_irq_value[7:0] + 1'b1;
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if (vrc4_irq_value == 0) // f (carry)
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{
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{
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X6502_IRQBegin(FCEU_IQEXT); // vrc4_irq_out = 1;
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X6502_IRQBegin(FCEU_IQEXT);
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vrc4_irq_value = vrc4_irq_latch; // vrc4_irq_value[7:0] = vrc4_irq_latch[7:0];
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vrc4_irq_value = vrc4_irq_latch; // irq_cpu_value[7:0] = vrc4_irq_latch[7:0];
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}
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}
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else {
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vrc4_irq_prescaler++; // vrc4_irq_prescaler = vrc4_irq_prescaler + 1'b1; // count prescaler
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// if ((vrc4_irq_prescaler_counter[1] == 0 && vrc4_irq_prescaler == 114)
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// || (vrc4_irq_prescaler_counter[1] == 1 && vrc4_irq_prescaler == 113)) // 114, 114, 113
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if ((!(vrc4_irq_prescaler_counter & 2) && vrc4_irq_prescaler == 114) || ((vrc4_irq_prescaler_counter & 2) && vrc4_irq_prescaler == 113))
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{
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vrc4_irq_prescaler = 0; // vrc4_irq_prescaler = 0;
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vrc4_irq_prescaler_counter++; // vrc4_irq_prescaler_counter = vrc4_irq_prescaler_counter + 1'b1;
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if (vrc4_irq_prescaler_counter == 0b11) vrc4_irq_prescaler_counter = 0; // if (vrc4_irq_prescaler_counter == 2'b11) vrc4_irq_prescaler_counter = 2'b00;
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vrc4_irq_value++; // {carry, vrc4_irq_value[7:0]} = vrc4_irq_value[7:0] + 1'b1;
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if (vrc4_irq_value == 0) // f (carry)
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{
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X6502_IRQBegin(FCEU_IQEXT);
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vrc4_irq_value = vrc4_irq_latch; // irq_cpu_value[7:0] = vrc4_irq_latch[7:0];
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}
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}
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}
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}
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}
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}
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}
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@ -2252,7 +2240,7 @@ static void COOLGIRL_Restore(int version) {
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#define ExState(var, varname) AddExState(&var, sizeof(var), 0, varname)
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#define ExState(var, varname) AddExState(&var, sizeof(var), 0, varname)
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void COOLGIRL_Init(CartInfo *info) {
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void COOLGIRL_Init(CartInfo* info) {
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CHR_SIZE = info->vram_size ? info->vram_size /* NES 2.0 */ : 256 * 1024 /* UNIF, fixed */;
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CHR_SIZE = info->vram_size ? info->vram_size /* NES 2.0 */ : 256 * 1024 /* UNIF, fixed */;
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WRAM_SIZE = info->ines2 ? (info->wram_size + info->battery_wram_size) : (32 * 1024);
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WRAM_SIZE = info->ines2 ? (info->wram_size + info->battery_wram_size) : (32 * 1024);
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@ -2263,7 +2251,7 @@ void COOLGIRL_Init(CartInfo *info) {
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AddExState(WRAM, 32 * 1024, 0, "SRAM");
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AddExState(WRAM, 32 * 1024, 0, "SRAM");
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if (info->battery)
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if (info->battery)
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{
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{
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info->addSaveGameBuf( WRAM, 32 * 1024);
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info->addSaveGameBuf(WRAM, 32 * 1024);
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}
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}
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}
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}
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@ -2272,7 +2260,7 @@ void COOLGIRL_Init(CartInfo *info) {
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SAVE_FLASH = (uint8*)FCEU_gmalloc(SAVE_FLASH_SIZE);
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SAVE_FLASH = (uint8*)FCEU_gmalloc(SAVE_FLASH_SIZE);
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SetupCartPRGMapping(FLASH_CHIP, SAVE_FLASH, SAVE_FLASH_SIZE, 1);
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SetupCartPRGMapping(FLASH_CHIP, SAVE_FLASH, SAVE_FLASH_SIZE, 1);
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AddExState(SAVE_FLASH, SAVE_FLASH_SIZE, 0, "SAVF");
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AddExState(SAVE_FLASH, SAVE_FLASH_SIZE, 0, "SAVF");
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info->addSaveGameBuf( SAVE_FLASH, SAVE_FLASH_SIZE );
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info->addSaveGameBuf(SAVE_FLASH, SAVE_FLASH_SIZE);
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}
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}
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CFI = (uint8*)FCEU_gmalloc(sizeof(cfi_data) * 2);
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CFI = (uint8*)FCEU_gmalloc(sizeof(cfi_data) * 2);
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