add missing mmc5 savestate variables
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@ -92,8 +92,8 @@ static uint8 *WRAM = NULL;
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static uint8 *MMC5fill = NULL;
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static uint8 *MMC5fill = NULL;
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static uint8 *ExRAM = NULL;
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static uint8 *ExRAM = NULL;
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static uint8 MMC5WRAMsize;
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static uint8 MMC5WRAMsize; //configuration, not state
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static uint8 MMC5WRAMIndex[8];
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static uint8 MMC5WRAMIndex[8]; //configuration, not state
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static uint8 MMC5ROMWrProtect[4];
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static uint8 MMC5ROMWrProtect[4];
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static uint8 MMC5MemIn[5];
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static uint8 MMC5MemIn[5];
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@ -494,13 +494,19 @@ void MMC5Synco(void) {
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MMC5CHRA();
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MMC5CHRA();
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MMC5CHRB();
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MMC5CHRB();
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}
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}
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//in case the fill register changed, we need to overwrite the fill buffer
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FCEU_dwmemset(MMC5fill, NTFill | (NTFill << 8) | (NTFill << 16) | (NTFill << 24), 0x3c0);
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FCEU_dwmemset(MMC5fill, NTFill | (NTFill << 8) | (NTFill << 16) | (NTFill << 24), 0x3c0);
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{
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{
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unsigned char moop = ATFill | (ATFill << 2) | (ATFill << 4) | (ATFill << 6);
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unsigned char moop = ATFill | (ATFill << 2) | (ATFill << 4) | (ATFill << 6);
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FCEU_dwmemset(MMC5fill + 0x3c0, moop | (moop << 8) | (moop << 16) | (moop << 24), 0x40);
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FCEU_dwmemset(MMC5fill + 0x3c0, moop | (moop << 8) | (moop << 16) | (moop << 24), 0x40);
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}
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}
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X6502_IRQEnd(FCEU_IQEXT);
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MMC5HackCHRMode = CHRMode & 3;
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MMC5HackCHRMode = CHRMode & 3;
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//zero 17-apr-2013 - why the heck should this happen here? anything in a `synco` should be depending on the state.
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//im going to leave it commented out to see what happens
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//X6502_IRQEnd(FCEU_IQEXT);
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}
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}
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void MMC5_hb(int scanline) {
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void MMC5_hb(int scanline) {
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@ -772,6 +778,15 @@ static SFORMAT MMC5_StateRegs[] = {
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{ &NTFill, 1, "NTFL" },
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{ &NTFill, 1, "NTFL" },
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{ &ATFill, 1, "ATFL" },
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{ &ATFill, 1, "ATFL" },
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//zero 17-apr-2013 - added
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{ &MMC5IRQR, 1, "IRQR" },
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{ &MMC5LineCounter, 1, "LCTR" },
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{ &mmc5psize, 1, "PSIZ" },
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{ &mmc5vsize, 1, "VSIZ" },
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{ mul, 2, "MUL2" },
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{ MMC5ROMWrProtect, 4, "WRPR" },
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{ MMC5MemIn, 5, "MEMI" },
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{ &MMC5Sound.wl[0], 2 | FCEUSTATE_RLSB, "SDW0" },
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{ &MMC5Sound.wl[0], 2 | FCEUSTATE_RLSB, "SDW0" },
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{ &MMC5Sound.wl[1], 2 | FCEUSTATE_RLSB, "SDW1" },
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{ &MMC5Sound.wl[1], 2 | FCEUSTATE_RLSB, "SDW1" },
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{ MMC5Sound.env, 2, "SDEV" },
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{ MMC5Sound.env, 2, "SDEV" },
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@ -779,6 +794,15 @@ static SFORMAT MMC5_StateRegs[] = {
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{ &MMC5Sound.running, 1, "SDRU" },
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{ &MMC5Sound.running, 1, "SDRU" },
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{ &MMC5Sound.raw, 1, "SDRW" },
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{ &MMC5Sound.raw, 1, "SDRW" },
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{ &MMC5Sound.rawcontrol, 1, "SDRC" },
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{ &MMC5Sound.rawcontrol, 1, "SDRC" },
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//zero 17-apr-2013 - added
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{ &MMC5Sound.dcount[0], 4 | FCEUSTATE_RLSB, "DCT0" },
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{ &MMC5Sound.dcount[1], 4 | FCEUSTATE_RLSB, "DCT1" },
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{ &MMC5Sound.BC[0], 4 | FCEUSTATE_RLSB, "BC00" },
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{ &MMC5Sound.BC[1], 4 | FCEUSTATE_RLSB, "BC01" },
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{ &MMC5Sound.BC[2], 4 | FCEUSTATE_RLSB, "BC02" },
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{ &MMC5Sound.vcount[0], 4 | FCEUSTATE_RLSB, "VCT0" },
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{ &MMC5Sound.vcount[1], 4 | FCEUSTATE_RLSB, "VCT1" },
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{ 0 }
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{ 0 }
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};
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};
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