Comments for mapper 342
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@ -21,6 +21,79 @@
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* The code is so obscured and weird because it's ported from Verilog CPLD source code:
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* https://github.com/ClusterM/coolgirl-famicom-multicart/blob/master/CoolGirl_mappers.vh
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*
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* Range: $5000-$5FFF
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*
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* Mask: $5007
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*
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* All registers are $00 on power-on and reset.
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*
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* $5xx0
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* 7 bit 0
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* ---- ----
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* PPPP PPPP
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* |||| ||||
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* ++++-++++-- PRG base offset (A29-A22)
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*
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* $5xx1
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* 7 bit 0
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* ---- ----
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* PPPP PPPP
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* |||| ||||
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* ++++-++++-- PRG base offset (A21-A14)
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*
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* $5xx2
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* 7 bit 0
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* ---- ----
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* AMMM MMMM
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* |||| ||||
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* |+++-++++-- PRG mask (A20-A14, inverted+anded with PRG address)
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* +---------- CHR mask (A18, inverted+anded with CHR address)
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*
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* $5xx3
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* 7 bit 0
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* ---- ----
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* BBBC CCCC
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* |||| ||||
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* |||+-++++-- CHR bank A (bits 7-3)
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* +++-------- PRG banking mode (see below)
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*
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* $5xx4
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* 7 bit 0
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* ---- ----
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* DDDE EEEE
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* |||| ||||
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* |||+-++++-- CHR mask (A17-A13, inverted+anded with CHR address)
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* +++-------- CHR banking mode (see below)
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*
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* $5xx5
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* 7 bit 0
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* ---- ----
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* CDDE EEWW
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* |||| ||||
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* |||| ||++-- 8KiB WRAM page at $6000-$7FFF
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* |+++-++---- PRG bank A (bits 5-1)
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* +---------- CHR bank A (bit 8)
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*
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* $5xx6
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* 7 bit 0
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* ---- ----
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* FFFM MMMM
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* |||| ||||
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* |||+ ++++-- Mapper code (bits 4-0, see below)
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* +++-------- Flags 2-0, functionality depends on selected mapper
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*
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* $5xx7
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* 7 bit 0
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* ---- ----
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* LMTR RSNO
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* |||| |||+-- Enable WRAM (read and write) at $6000-$7FFF
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* |||| ||+--- Allow writes to CHR RAM
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* |||| |+---- Allow writes to flash chip
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* |||+-+----- Mirroring (00=vertical, 01=horizontal, 10=1Sa, 11=1Sb)
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* ||+-------- Enable four-screen mode
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* |+-- ------ Mapper code (bit 5, see below)
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* +---------- Lockout bit (prevent further writes to all registers)
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*
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*/
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#include "mapinc.h"
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