cheapocabra implemented self-flashing
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rainwarrior
parent
7ff81e92cb
commit
9e4eaab0e6
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@ -27,14 +27,21 @@
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// 2 x 8k nametable pages
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//
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// Notes:
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// - PRG-ROM is actually flash RAM. Self-flashing should be implemented if battery backed.
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// - CHR-RAM for nametables maps to $3000-3FFF as well, but FCEUX internally limits to 4k?
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// - CHR-RAM for nametables maps to $3000-3FFF as well, but FCEUX internally mirrors to 4k?
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#include "mapinc.h"
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#include "../ines.h"
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static uint8 reg;
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static uint8 *CHRRAM = NULL;
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static uint32 CHRRAMSIZE;
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const uint32 CHRRAMSIZE = 1024 * 32;
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static bool flash = false;
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static uint8 flash_mode;
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static uint8 flash_sequence;
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static uint8 *FLASHROM = NULL;
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const uint32 FLASHROMSIZE = 1024 * 512;
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static SFORMAT StateRegs[] =
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{
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@ -42,8 +49,14 @@ static SFORMAT StateRegs[] =
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{ 0 }
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};
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static void Sync(void) {
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static SFORMAT FlashRegs[] =
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{
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{ &flash_mode, 1, "FMOD" },
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{ &flash_sequence, 1, "FSEQ" },
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{ 0 }
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};
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static void Sync(void) {
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// bit 7 controls green LED
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// bit 6 controls red LED
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int nt = (reg & 0x20) ? 8192 : 0; // bit 5 controls 8k nametable page
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@ -56,7 +69,9 @@ static void Sync(void) {
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setntamem(CHRRAM + nt + (1024 * n),1,n);
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}
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setchr8r(0x10, chr);
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setprg32(0x8000,prg);
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uint32 prg_chip = flash ? 0x10 : 0;
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setprg32r(prg_chip,0x8000,prg);
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}
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static DECLFW(M111Write) {
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@ -67,18 +82,117 @@ static DECLFW(M111Write) {
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}
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}
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static DECLFW(M111Flash) {
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if (A < 0x8000 || A > 0xFFFF) return;
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uint32 flash_addr = ((reg & 0x0F) << 15) | (A & 0x7FFF);
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uint32 command_addr = flash_addr & 0x7FFF;
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enum
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{
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FLASH_MODE_READY = 0,
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FLASH_MODE_COMMAND,
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FLASH_MODE_BYTE_WRITE,
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FLASH_MODE_ERASE,
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};
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switch (flash_mode)
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{
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default:
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case FLASH_MODE_READY:
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if (command_addr == 0x5555 && V == 0xAA)
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{
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flash_mode = FLASH_MODE_COMMAND;
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flash_sequence = 0;
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}
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break;
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case FLASH_MODE_COMMAND:
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if (flash_sequence == 0)
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{
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if (command_addr == 0x2AAA && V == 0x55)
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flash_sequence = 1;
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else
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flash_mode = FLASH_MODE_READY;
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}
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else if (flash_sequence == 1)
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{
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if (command_addr == 0x5555)
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{
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flash_sequence = 0;
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switch (V)
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{
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default: flash_mode = FLASH_MODE_READY; break;
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case 0xA0: flash_mode = FLASH_MODE_BYTE_WRITE; break;
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case 0x80: flash_mode = FLASH_MODE_ERASE; break;
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// 0x90 = Software ID Entry (not implemented)
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// 0xF0 = Software ID Exit (not implemented)
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}
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}
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else
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flash_mode = FLASH_MODE_READY;
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}
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else
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flash_mode = FLASH_MODE_READY; // should be unreachable
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break;
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case FLASH_MODE_BYTE_WRITE:
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FLASHROM[flash_addr] &= V;
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flash_mode = FLASH_MODE_READY;
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break;
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case FLASH_MODE_ERASE:
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if (flash_sequence == 0)
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{
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if (command_addr == 0x5555 && V == 0xAA)
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flash_sequence = 1;
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else
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flash_mode = FLASH_MODE_READY;
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}
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else if (flash_sequence == 1)
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{
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if (command_addr == 0x2AAA && V == 0x55)
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flash_sequence = 2;
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else
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flash_mode = FLASH_MODE_READY;
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}
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else if (flash_sequence == 2)
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{
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if (command_addr == 0x5555 && V == 0x10) // erase chip
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{
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memset(FLASHROM, 0xFF, FLASHROMSIZE);
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}
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else if (V == 0x30) // erase 4k sector
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{
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uint32 sector = flash_addr & 0x7F000;
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memset(FLASHROM + sector, 0xFF, 1024 * 4);
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}
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flash_mode = FLASH_MODE_READY;
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}
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else
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flash_mode = FLASH_MODE_READY; // should be unreachable
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break;
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}
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}
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static void M111Power(void) {
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reg = 0xFF;
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Sync();
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SetReadHandler(0x8000, 0xffff, CartBR);
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SetWriteHandler(0x5000, 0x5fff, M111Write);
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SetWriteHandler(0x7000, 0x7fff, M111Write);
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if (flash)
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{
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SetWriteHandler(0x8000, 0xFFFF, M111Flash);
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}
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}
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static void M111Close(void) {
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if (CHRRAM)
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FCEU_gfree(CHRRAM);
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CHRRAM = NULL;
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if (FLASHROM)
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FCEU_gfree(FLASHROM);
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FLASHROM = NULL;
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}
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static void StateRestore(int version) {
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@ -89,11 +203,30 @@ void Mapper111_Init(CartInfo *info) {
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info->Power = M111Power;
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info->Close = M111Close;
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CHRRAMSIZE = 1024 * 32;
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CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
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SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
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GameStateRestore = StateRestore;
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AddExState(&StateRegs, ~0, 0, 0);
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AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");
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flash = (info->battery != 0);
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if (flash)
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{
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FLASHROM = (uint8*)FCEU_gmalloc(FLASHROMSIZE);
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info->SaveGame[0] = FLASHROM;
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info->SaveGameLen[0] = FLASHROMSIZE;
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AddExState(FLASHROM, FLASHROMSIZE, 0, "FROM");
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AddExState(&FlashRegs, ~0, 0, 0);
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// copy PRG ROM into FLASHROM, use it instead of PRG ROM
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const uint32 PRGSIZE = ROM_size * 16 * 1024;
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for (uint32 w=0, r=0; w<FLASHROMSIZE; ++w)
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{
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FLASHROM[w] = ROM[r];
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++r;
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if (r >= PRGSIZE) r = 0;
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}
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SetupCartPRGMapping(0x10, FLASHROM, FLASHROMSIZE, 0);
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}
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}
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