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fceux
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first batch of sync with fceumm for existing mappers... regression reports are appreciated

This commit is contained in:
CaH4e3 2012-10-21 19:24:21 +00:00
parent 43ee931dec
commit 9112c4919d
63 changed files with 1293 additions and 1281 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/boards/.gitignore vendored
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@ -1 +0,0 @@
/onebus.c

2
src/boards/106.cpp
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@ -28,7 +28,7 @@ static uint32 WRAMSIZE;
static SFORMAT StateRegs[]=
{
{&IRQa, 1, "IRQA"},
{&IRQCount, 4, "IRQCOUNT"},
{&IRQCount, 4, "IRQC"},
{reg, 16, "REGS"},
{0}
};

7
src/boards/108.cpp
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@ -37,8 +37,8 @@ static void Sync(void)
static DECLFW(M108Write)
{
reg=V;
Sync();
reg=V;
Sync();
}
static void M108Power(void)
@ -46,7 +46,8 @@ static void M108Power(void)
Sync();
SetReadHandler(0x6000,0x7FFF,CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x8FFF,0x8FFF,M108Write);
SetWriteHandler(0x8000,0x8FFF,M108Write); // regular 108
SetWriteHandler(0xF000,0xFFFF,M108Write); // simplified Kaiser BB Hack
}
static void StateRestore(int version)

31
src/boards/116.cpp
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@ -27,38 +27,37 @@
* Kart Fighter (008, Huang-1, GAL dip: W conf.)
* Somari (008, C5052-13, GAL dip: P conf., GK2-P/GK2-V maskroms)
* Somari (008, Huang-1, GAL dip: W conf., GK1-P/GK1-V maskroms)
* AV Mei Shao Nv Zhan Shi ()
* AV Mei Shao Nv Zhan Shi (aka AV Pretty Girl Fighting) (SL-12 PCB, Hunag-1, GAL dip: unk conf. SL-11A/SL-11B maskroms)
* Samurai Spirits (Full version) (Huang-1, GAL dip: unk conf. GS-2A/GS-4A maskroms)
* Contra Fighter (603-5052 board, C5052-3, GAL dip: unk conf. SC603-A/SCB603-B maskroms)
* Contra Fighter (603-5052 PCB, C5052-3, GAL dip: unk conf. SC603-A/SCB603-B maskroms)
*
*/
#include "mapinc.h"
#include "mmc3.h"
static uint8 mode;
static uint8 vrc2_chr[8], vrc2_prg[2], vrc2_mirr;
static uint8 mmc3_regs[10], mmc3_ctrl, mmc3_mirr;
extern uint8 IRQCount,IRQLatch,IRQa;
extern uint8 IRQReload;
static uint8 IRQCount,IRQLatch,IRQa;
static uint8 IRQReload;
static uint8 mmc1_regs[4], mmc1_buffer, mmc1_shift;
static SFORMAT StateRegs[]=
{
{&mode, 1, "MODE"},
{vrc2_chr, 8, "vrch"},
{vrc2_prg, 2, "vrpr"},
{&vrc2_mirr, 1, "vrmi"},
{mmc3_regs, 10, "m3re"},
{&mmc3_ctrl, 1, "m3ct"},
{&mmc3_mirr, 1, "m3mi"},
{vrc2_chr, 8, "VRCC"},
{vrc2_prg, 2, "VRCP"},
{&vrc2_mirr, 1, "VRCM"},
{mmc3_regs, 10, "M3RG"},
{&mmc3_ctrl, 1, "M3CT"},
{&mmc3_mirr, 1, "M3MR"},
{&IRQReload, 1, "IRQR"},
{&IRQCount, 1, "IRQC"},
{&IRQLatch, 1, "IRQL"},
{&IRQa, 1, "IRQA"},
{mmc1_regs, 4, "m1r"},
{&mmc1_buffer, 1, "m1bf"},
{&mmc1_shift, 1, "m1mi"},
{mmc1_regs, 4, "M1RG"},
{&mmc1_buffer, 1, "M1BF"},
{&mmc1_shift, 1, "M1MR"},
{0}
};
@ -174,7 +173,7 @@ static void Sync(void)
static DECLFW(UNLSL12ModeWrite)
{
printf("%04X:%02X\n",A,V);
// printf("%04X:%02X\n",A,V);
if((A & 0x4100) == 0x4100) {
mode = V;
if(A&1) { // hacky hacky, there are two configuration modes on SOMARI HUANG-1 PCBs
@ -194,7 +193,7 @@ static DECLFW(UNLSL12ModeWrite)
static DECLFW(UNLSL12Write)
{
printf("%04X:%02X\n",A,V);
// printf("%04X:%02X\n",A,V);
if(A==0xA123)
{
int zzz=9;

4
src/boards/117.cpp
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@ -28,8 +28,8 @@ static SFORMAT StateRegs[]=
{&IRQa, 1, "IRQA"},
{&IRQCount, 1, "IRQC"},
{&IRQLatch, 1, "IRQL"},
{prgreg, 4, "PREGS"},
{chrreg, 8, "CREGS"},
{prgreg, 4, "PREG"},
{chrreg, 8, "CREG"},
{&mirror, 1, "MREG"},
{0}
};

3
src/boards/120.cpp
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@ -48,8 +48,7 @@ static void M120Power(void)
{
reg=0;
Sync();
SetReadHandler(0x6000,0x7FFF,CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR);
SetWriteHandler(0x4100,0x5FFF,M120Write);
}

2
src/boards/15.cpp
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@ -64,7 +64,7 @@ static DECLFW(M15Write)
{
latchea=A;
latched=V;
printf("%04X = %02X\n",A,V);
// printf("%04X = %02X\n",A,V);
Sync();
}

43
src/boards/178.cpp
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@ -20,52 +20,51 @@
#include "mapinc.h"
static uint8 reg[3];
static uint8 reg[4];
static uint8 *WRAM=NULL;
static uint32 WRAMSIZE;
static SFORMAT StateRegs[]=
{
{reg, 3, "REGS"},
{reg, 4, "REGS"},
{0}
};
static void Sync(void)
{
setmirror(reg[0]);
uint8 bank = (reg[2]&3)<<3;
setmirror((reg[0]&1)^1);
setprg8r(0x10,0x6000,0);
setchr8(0);
setprg32(0x8000,(reg[1]+reg[2]));
if(reg[0]&2)
{
setprg16(0x8000,(reg[1]&7)|bank);
setprg16(0xC000,((~0)&7)|bank);
}
else
{
setprg16(0x8000,(reg[1]&6)|bank);
setprg16(0xC000,(reg[1]&6)|bank|1);
}
}
static DECLFW(M178Write0)
static DECLFW(M178Write)
{
reg[0]=(V&1)^1;
Sync();
}
static DECLFW(M178Write1)
{
reg[1]=(V>>1)&0xf;
Sync();
}
static DECLFW(M178Write2)
{
reg[2]=(V<<2);
reg[A&3]=V;
Sync();
}
static void M178Power(void)
{
reg[0]=1; reg[1]=0; reg[2]=0;
reg[0]=1;
reg[1]=0;
reg[2]=0;
reg[3]=0;
Sync();
SetReadHandler(0x6000,0x7FFF,CartBR);
SetWriteHandler(0x6000,0x7FFF,CartBW);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x4800,0x4800,M178Write0);
SetWriteHandler(0x4801,0x4801,M178Write1);
SetWriteHandler(0x4802,0x4802,M178Write2);
SetWriteHandler(0x4800,0x4803,M178Write);
}
static void M178Close(void)

6
src/boards/183.cpp
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@ -32,8 +32,8 @@ static SFORMAT StateRegs[]=
{
{prg, 4, "PRG"},
{chr, 8, "CHR"},
{&IRQCount, 1, "IRQCOUNT"},
{&IRQPre, 1, "IRQPRE"},
{&IRQCount, 1, "IRQC"},
{&IRQPre, 1, "IRQP"},
{&IRQa, 1, "IRQA"},
{0}
};
@ -64,7 +64,7 @@ static DECLFW(M183Write)
{
if(((A&0xF80C)>=0xB000)&&((A&0xF80C)<=0xE00C))
{
uint8 index=(((A>>11)-6)|(A>>3))&7;
int index=(((A>>11)-6)|(A>>3))&7;
chr[index]=(chr[index]&(0xF0>>(A&4)))|((V&0x0F)<<(A&4));
SyncChr();
}

2
src/boards/185.cpp
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@ -32,7 +32,7 @@ static SFORMAT StateRegs[]=
{0}
};
// on off
// on off
//1 0x0F, 0xF0 - Bird Week
//2 0x33, 0x00 - B-Wings
//3 0x11, 0x00 - Mighty Bomb Jack

2
src/boards/186.cpp
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@ -29,7 +29,7 @@ static uint8 regs[4];
static SFORMAT StateRegs[]=
{
{regs, 4, "DREG"},
{SWRAM, 2816, "SWRAM"},
{SWRAM, 2816, "SWRM"},
{0}
};

27
src/boards/187.cpp
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@ -35,7 +35,12 @@ static void M187PW(uint32 A, uint8 V)
{
uint8 bank=EXPREGS[0]&0x1F;
if(EXPREGS[0]&0x20)
setprg32(0x8000,bank>>2);
{
if(EXPREGS[0]&0x40)
setprg32(0x8000,bank>>2);
else
setprg32(0x8000,bank>>1); // hacky hacky! two mappers in one! need real hw carts to test
}
else
{
setprg16(0x8000,bank);
@ -48,28 +53,19 @@ static void M187PW(uint32 A, uint8 V)
static DECLFW(M187Write8000)
{
EXPREGS[2]=1;
EXPREGS[1]=1;
MMC3_CMDWrite(A,V);
}
static DECLFW(M187Write8001)
{
if(EXPREGS[2])
if(EXPREGS[1])
MMC3_CMDWrite(A,V);
}
static DECLFW(M187Write8003)
{
EXPREGS[2]=0;
if(V==0x28)setprg8(0xC000,0x17);
else if(V==0x2A)setprg8(0xA000,0x0F);
}
static DECLFW(M187WriteLo)
{
EXPREGS[1]=V;
if(A==0x5000)
if((A==0x5000)||(A==0x6000))
{
EXPREGS[0]=V;
FixMMC3PRG(MMC3_cmd);
@ -84,13 +80,12 @@ static DECLFR(M187Read)
static void M187Power(void)
{
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=0;
EXPREGS[0]=EXPREGS[1]=0;
GenMMC3Power();
SetReadHandler(0x5000,0x5FFF,M187Read);
SetWriteHandler(0x5000,0x5FFF,M187WriteLo);
SetWriteHandler(0x5000,0x6FFF,M187WriteLo);
SetWriteHandler(0x8000,0x8000,M187Write8000);
SetWriteHandler(0x8001,0x8001,M187Write8001);
SetWriteHandler(0x8003,0x8003,M187Write8003);
}
void Mapper187_Init(CartInfo *info)

2
src/boards/189.cpp
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@ -23,7 +23,7 @@
static void M189PW(uint32 A, uint8 V)
{
setprg32(0x8000,EXPREGS[0]&3);
setprg32(0x8000,EXPREGS[0]&7);
}
static DECLFW(M189Write)

22
src/boards/199.cpp
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@ -26,7 +26,8 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 *CHRRAM=NULL; // and here too
static uint8 *CHRRAM=NULL;
static uint32 CHRRAMSIZE;
static void M199PW(uint32 A, uint8 V)
{
@ -60,7 +61,6 @@ static DECLFW(M199Write)
{
if((A==0x8001)&&(MMC3_cmd&8))
{
// FCEU_printf("%02x=>%02x\n",MMC3_cmd,V);
EXPREGS[MMC3_cmd&3]=V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
@ -82,16 +82,26 @@ static void M199Power(void)
SetWriteHandler(0x8000,0xFFFF,M199Write);
}
static void M199Close(void)
{
if(CHRRAM)
FCEU_gfree(CHRRAM);
CHRRAM=NULL;
}
void Mapper199_Init(CartInfo *info)
{
int CHRRAMSize=1024*8;
GenMMC3_Init(info, 512, 256, 8, info->battery);
cwrap=M199CW;
pwrap=M199PW;
mwrap=M199MW;
info->Power=M199Power;
CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSize);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSize, 1);
AddExState(CHRRAM, CHRRAMSize, 0, "CHRR");
info->Close=M199Close;
CHRRAMSIZE=8192;
CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR");
AddExState(EXPREGS, 4, 0, "EXPR");
}

32
src/boards/208.cpp
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@ -22,22 +22,22 @@
#include "mmc3.h"
static uint8 lut[256]={
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01,
0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00,
0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59,0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01,
0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00,
0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
static void M208PW(uint32 A, uint8 V)

12
src/boards/222.cpp
View File

@ -45,7 +45,7 @@ static void M222IRQ(void)
if(IRQCount>=238)
{
X6502_IRQBegin(FCEU_IQEXT);
// IRQa=0;
// IRQa=0;
}
}
}
@ -75,11 +75,11 @@ static DECLFW(M222Write)
case 0xD002: chr_reg[5]=V; break;
case 0xE000: chr_reg[6]=V; break;
case 0xE002: chr_reg[7]=V; break;
// case 0xF000: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQa=V; if(!V)IRQPre=0; X6502_IRQEnd(FCEU_IQEXT); break;
// / case 0xF001: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQCount=V; break;
// case 0xF002: FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xD001: IRQa=V; X6502_IRQEnd(FCEU_IQEXT); FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xC001: IRQPre=16; FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xF000: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQa=V; if(!V)IRQPre=0; X6502_IRQEnd(FCEU_IQEXT); break;
// case 0xF001: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQCount=V; break;
// case 0xF002: FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xD001: IRQa=V; X6502_IRQEnd(FCEU_IQEXT); FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xC001: IRQPre=16; FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
case 0xF000: IRQa=IRQCount=V; if(scanline<240) IRQCount-=8; else IRQCount+=4; X6502_IRQEnd(FCEU_IQEXT); break;
}
Sync();

14
src/boards/23.cpp
View File

@ -33,13 +33,13 @@ static uint32 WRAMSIZE;
static SFORMAT StateRegs[]=
{
{prgreg, 2, "PRGREGS"},
{chrreg, 8, "CHRREGS"},
{&regcmd, 1, "REGCMD"},
{&irqcmd, 1, "IRQCMD"},
{prgreg, 2, "PREG"},
{chrreg, 8, "CREG"},
{&regcmd, 1, "CMDR"},
{&irqcmd, 1, "CMDI"},
{&mirr, 1, "MIRR"},
{&big_bank, 1, "BIGB"},
{&IRQCount, 2, "IRCN"},
{&IRQCount, 2, "IRQC"},
{&IRQLatch, 1, "IRQL"},
{&IRQa, 1, "IRQA"},
{0}
@ -138,10 +138,6 @@ static void M23Power(void)
SetWriteHandler(0x8000,0xFFFF,M23Write);
}
static void M23Reset(void)
{
}
void M23IRQHook(int a)
{
#define LCYCS 341

2
src/boards/235.cpp
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@ -23,7 +23,7 @@
static uint16 cmdreg;
static SFORMAT StateRegs[]=
{
{&cmdreg, 2, "CMDREG"},
{&cmdreg, 2, "CREG"},
{0}
};

6
src/boards/253.cpp
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@ -29,11 +29,11 @@ static uint32 CHRRAMSIZE;
static SFORMAT StateRegs[]=
{
{chrlo, 8, "CHRLO"},
{chrhi, 8, "CHRHI"},
{chrlo, 8, "CHRL"},
{chrhi, 8, "CHRH"},
{prg, 2, "PRGR"},
{&mirr, 1, "MIRR"},
{&vlock, 1, "VLOCK"},
{&vlock, 1, "VLCK"},
{&IRQa, 4, "IRQA"},
{&IRQCount, 4, "IRQC"},
{&IRQLatch, 4, "IRQL"},

26
src/boards/43.cpp
View File

@ -23,8 +23,7 @@
#include "mapinc.h"
static uint8 reg;
static uint8 IRQa;
static uint32 IRQCount;
static uint32 IRQCount, IRQa;
static SFORMAT StateRegs[]=
{
@ -36,7 +35,7 @@ static SFORMAT StateRegs[]=
static void Sync(void)
{
setprg4(0x5000,16);
setprg4(0x5000,16); // Only YS-612 advdnced version
setprg8(0x6000,2);
setprg8(0x8000,1);
setprg8(0xa000,0);
@ -47,11 +46,13 @@ static void Sync(void)
static DECLFW(M43Write)
{
int transo[8]={4,3,4,4,4,7,5,6};
// int transo[8]={4,3,4,4,4,7,5,6};
int transo[8]={4,3,5,3,6,3,7,3}; // According to hardware tests
switch(A&0xf1ff)
{
case 0x4022: reg=transo[V&7]; Sync(); break;
case 0x8122: IRQa=V&1; IRQCount=0; break;
case 0x8122: // hacked version
case 0x4122: IRQa=V&1; X6502_IRQEnd(FCEU_IQEXT); IRQCount=0; break; // original version
}
}
@ -59,7 +60,6 @@ static void M43Power(void)
{
reg=0;
Sync();
// SetReadHandler(0x5000,0x5fff,CartBR);
SetReadHandler(0x5000,0xffff,CartBR);
SetWriteHandler(0x4020,0xffff,M43Write);
}
@ -70,13 +70,13 @@ static void M43Reset(void)
static void M43IRQHook(int a)
{
IRQCount+=a;
if(IRQa)
if(IRQCount>=4096)
{
IRQa=0;
X6502_IRQBegin(FCEU_IQEXT);
}
IRQCount+=a;
if(IRQa)
if(IRQCount>=4096)
{
IRQa=0;
X6502_IRQBegin(FCEU_IQEXT);
}
}
static void StateRestore(int version)

2
src/boards/57.cpp
View File

@ -27,7 +27,7 @@ static uint8 hrd_flag;
static SFORMAT StateRegs[]=
{
{&hrd_flag, 1, "DIPSW"},
{&hrd_flag, 1, "DPSW"},
{&prg_reg, 1, "PRG"},
{&chr_reg, 1, "CHR"},
{0}

4
src/boards/68.cpp
View File

@ -32,8 +32,8 @@ static SFORMAT StateRegs[]=
{&nt2, 1, "NT2"},
{&mirr, 1, "MIRR"},
{&prg_reg, 1, "PRG"},
{&kogame, 1, "KOGAME"},
{&count, 4, "COUNT"},
{&kogame, 1, "KGME"},
{&count, 4, "CNT"},
{chr_reg, 4, "CHR"},
{0}
};

2
src/boards/8157.cpp
View File

@ -25,7 +25,7 @@ static uint8 invalid_data;
static SFORMAT StateRegs[]=
{
{&invalid_data, 1, "INVD"},
{&cmdreg, 2, "CMDREG"},
{&cmdreg, 2, "CREG"},
{0}
};

4
src/boards/8237.cpp
View File

@ -181,7 +181,7 @@ void UNL8237_Init(CartInfo *info)
pwrap=UNL8237PW;
info->Power=UNL8237Power;
AddExState(EXPREGS, 3, 0, "EXPR");
AddExState(&cmdin, 1, 0, "CMDIN");
AddExState(&cmdin, 1, 0, "CMDI");
}
void UNL8237A_Init(CartInfo *info)
@ -191,5 +191,5 @@ void UNL8237A_Init(CartInfo *info)
pwrap=UNL8237APW;
info->Power=UNL8237Power;
AddExState(EXPREGS, 3, 0, "EXPR");
AddExState(&cmdin, 1, 0, "CMDIN");
AddExState(&cmdin, 1, 0, "CMDI");
}

2
src/boards/830118C.cpp
View File

@ -23,8 +23,6 @@
#include "mapinc.h"
#include "mmc3.h"
static uint8 reset_flag = 0;
static void BMC830118CCW(uint32 A, uint8 V)
{
setchr1(A,(V&0x7F)|((EXPREGS[0]&0x0c)<<5));

6
src/boards/90.cpp
View File

@ -52,15 +52,15 @@ static uint8 tekker;
static SFORMAT Tek_StateRegs[]={
{&IRQMode, 1, "IRQM"},
{&IRQPre, 1, "IRQP"},
{&IRQPreSize, 1, "IRQS"},
{&IRQPreSize, 1, "IRQR"},
{&IRQCount, 1, "IRQC"},
{&IRQXOR, 1, "IRQX"},
{&IRQa, 1, "IRQa"},
{&IRQa, 1, "IRQA"},
{mul, 2, "MUL"},
{&regie, 1, "REGI"},
{tkcom, 4, "TKCO"},
{prgb, 4, "PRGB"},
{chr, 2, "CHRA"},
{chr, 2, "CLTC"},
{chrlow, 4, "CHRL"},
{chrhigh, 8, "CHRH"},
{&names[0], 2|FCEUSTATE_RLSB, "NMS0"},

107
src/boards/a9746.cpp
View File

@ -1,109 +1,4 @@
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 2007 CaH4e3
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
/*
#include "mapinc.h"
static uint8 chr_cmd, prg_cmd, mirror;
static uint8 chr_reg[6], prg_reg[4];
static SFORMAT StateRegs[]=
{
{&chr_cmd, 1, "CHRCMD"},
{&prg_cmd, 1, "PRGCMD"},
{&mirror, 1, "MIRR"},
{chr_reg, 6, "CREGS"},
{prg_reg, 4, "PREGS"},
{0}
};
static void Sync(void)
{
setprg8(0x8000, prg_reg[0]);
setprg8(0xA000, prg_reg[1]);
setprg8(0xC000, prg_reg[2]);
setprg8(0xE000, prg_reg[3]);
setchr2(0x0000, chr_reg[0]);
setchr2(0x0800, chr_reg[1]);
setchr1(0x1000, chr_reg[2]);
setchr1(0x1400, chr_reg[3]);
setchr1(0x1800, chr_reg[4]);
setchr1(0x1c00, chr_reg[5]);
setmirror(mirror);
}
static DECLFW(UNLA9746Write)
{
uint8 bits_rev;
// FCEU_printf("write raw %04x:%02x\n",A,V);
switch (A&0xE003)
{
// case 0xA000: mirror = V; break;
case 0x8000: chr_cmd = V; prg_cmd = 0; break;
case 0x8002: prg_cmd = V; chr_cmd = 0; break;
case 0x8001: bits_rev = ((V&0x20)>>5)|((V&0x10)>>3)|((V&0x08)>>1)|((V&0x04)<<1);
// if(prg_cmd>0x23)
// prg_reg[(0x26-prg_cmd)&3] = bits_rev;
switch(chr_cmd)
{
case 0x08: chr_reg[0] = (V << 3); break;
case 0x09: chr_reg[0] = chr_reg[0]|(V >> 2); break;
case 0x0e: chr_reg[1] = (V << 3); break;
case 0x0d: chr_reg[1] = chr_reg[1]|(V >> 2); break;
case 0x12: chr_reg[2] = (V << 4); break;
case 0x11: chr_reg[2] = chr_reg[2]|(V >> 1); FCEU_printf("Sync CHR 0x1000:%02x\n",chr_reg[2]); break;
case 0x16: chr_reg[3] = (V << 4); break;
case 0x15: chr_reg[3] = chr_reg[3]|(V >> 1); break;
case 0x1a: chr_reg[4] = (V << 4); break;
case 0x19: chr_reg[4] = chr_reg[4]|(V >> 1); break;
case 0x1e: chr_reg[5] = (V << 4); break;
case 0x1d: chr_reg[5] = chr_reg[5]|(V >> 1); break;
}
Sync();
break;
}
}
static void UNLA9746Power(void)
{
prg_reg[2]=~1;
prg_reg[3]=~0;
Sync();
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x8000,0xbfff,UNLA9746Write);
}
static void StateRestore(int version)
{
Sync();
}
void UNLA9746_Init(CartInfo *info)
{
info->Power=UNLA9746Power;
AddExState(&StateRegs, ~0, 0, 0);
}
/**/
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
@ -183,4 +78,4 @@ void UNLA9746_Init(CartInfo *info)
info->Power=UNLA9746Power;
AddExState(EXPREGS, 6, 0, "EXPR");
}
/**/

116
src/boards/addrlatch.cpp
View File

@ -27,7 +27,7 @@ static readfunc defread;
static DECLFW(LatchWrite)
{
FCEU_printf("%04x:%02x\n",A,V);
// FCEU_printf("%04x:%02x\n",A,V);
latche=A;
WSync();
}
@ -119,6 +119,41 @@ void BMCD1038_Init(CartInfo *info)
}
//------------------ UNL43272 ---------------------------
// mapper much complex, including 16K bankswitching
static void UNL43272Sync(void)
{
if((latche&0x81) == 0x81)
{
setprg32(0x8000,(latche&0x38)>>3);
}
else
FCEU_printf("unrecognized command %04!\n",latche);
setchr8(0);
setmirror(0);
}
static DECLFR(UNL43272Read)
{
if(latche&0x400)
return CartBR(A & 0xFE);
else
return CartBR(A);
}
static void UNL43272Reset(void)
{
latche = 0;
UNL43272Sync();
}
void UNL43272_Init(CartInfo *info)
{
Latch_Init(info, UNL43272Sync, UNL43272Read, 0x81, 0x8000, 0xFFFF);
info->Reset=UNL43272Reset;
AddExState(&dipswitch, 1, 0, "DIPSW");
}
//------------------ Map 058 ---------------------------
static void BMCGK192Sync(void)
@ -139,6 +174,39 @@ void BMCGK192_Init(CartInfo *info)
Latch_Init(info, BMCGK192Sync, 0, 0, 0x8000, 0xFFFF);
}
//------------------ Map 092 ---------------------------
// Another two-in-one mapper, two Jaleco carts uses similar
// hardware, but with different wiring.
// Original code provided by LULU
// Additionally, PCB contains DSP extra sound chip, used for voice samples (unemulated)
static void M92Sync(void)
{
uint8 reg = latche & 0xF0;
setprg16(0x8000,0);
if(latche>=0x9000)
{
switch (reg)
{
case 0xD0: setprg16(0xc000, latche & 15); break;
case 0xE0: setchr8(latche & 15); break;
}
}
else
{
switch (reg)
{
case 0xB0: setprg16(0xc000, latche & 15); break;
case 0x70: setchr8(latche & 15); break;
}
}
}
void Mapper92_Init(CartInfo *info)
{
Latch_Init(info, M92Sync, 0, 0x80B0, 0x8000, 0xFFFF);
}
//------------------ Map 200 ---------------------------
static void M200Sync(void)
@ -170,3 +238,49 @@ void BMC190in1_Init(CartInfo *info)
Latch_Init(info, BMC190in1Sync, 0, 0, 0x8000, 0xFFFF);
}
//-------------- BMC810544-C-A1 ------------------------
static void BMC810544CA1Sync(void)
{
uint32 bank = latche>>7;
if(latche&0x40)
setprg32(0x8000,bank);
else
{
setprg16(0x8000,(bank<<1)|((latche>>5)&1));
setprg16(0xC000,(bank<<1)|((latche>>5)&1));
}
setchr8(latche&0x0f);
setmirror(((latche>>4)&1)^1);
}
void BMC810544CA1_Init(CartInfo *info)
{
Latch_Init(info, BMC810544CA1Sync, 0, 0, 0x8000, 0xFFFF);
}
//-------------- BMCNTD-03 ------------------------
static void BMCNTD03Sync(void)
{
// 1PPP Pmcc spxx xccc
// 1000 0000 0000 0000 v
// 1001 1100 0000 0100 h
// 1011 1010 1100 0100
uint32 prg = ((latche>>10)&0x1e);
uint32 chr = ((latche&0x0300)>>5)|(latche&7);
if(latche&0x80)
{
setprg16(0x8000,prg|((latche>>6)&1));
setprg16(0xC000,prg|((latche>>6)&1));
}
else
setprg32(0x8000,prg>>1);
setchr8(chr);
setmirror(((latche>>10)&1)^1);
}
void BMCNTD03_Init(CartInfo *info)
{
Latch_Init(info, BMCNTD03Sync, 0, 0, 0x8000, 0xFFFF);
}

227
src/boards/bandai.cpp
View File

@ -102,17 +102,25 @@ static DECLFW(BandaiWrite)
}
}
DECLFR(BandaiRead)
{
return 0;
}
static void BandaiPower(void)
{
BandaiSync();
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x6000,0xFFFF,BandaiWrite);
SetReadHandler(0x6000,0x7FFF,BandaiRead);
}
static void StateRestore(int version)
{
BandaiSync();
}
void Mapper16_Init(CartInfo *info)
{
is153=0;
info->Power=BandaiPower;
MapIRQHook=BandaiIRQHook;
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
}
static void M153Power(void)
@ -133,26 +141,6 @@ static void M153Close(void)
WRAM=NULL;
}
static void StateRestore(int version)
{
BandaiSync();
}
void Mapper16_Init(CartInfo *info)
{
is153=0;
info->Power=BandaiPower;
MapIRQHook=BandaiIRQHook;
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
}
void Mapper159_Init(CartInfo *info)
{
Mapper16_Init(info);
}
void Mapper153_Init(CartInfo *info)
{
is153=1;
@ -174,3 +162,190 @@ void Mapper153_Init(CartInfo *info)
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
}
// Datach Barcode Battler
static uint8 BarcodeData[256];
static int BarcodeReadPos;
static int BarcodeCycleCount;
static uint32 BarcodeOut;
int FCEUI_DatachSet(const uint8 *rcode)
{
int prefix_parity_type[10][6] = {
{0,0,0,0,0,0}, {0,0,1,0,1,1}, {0,0,1,1,0,1}, {0,0,1,1,1,0},
{0,1,0,0,1,1}, {0,1,1,0,0,1}, {0,1,1,1,0,0}, {0,1,0,1,0,1},
{0,1,0,1,1,0}, {0,1,1,0,1,0}
};
int data_left_odd[10][7] = {
{0,0,0,1,1,0,1}, {0,0,1,1,0,0,1}, {0,0,1,0,0,1,1}, {0,1,1,1,1,0,1},
{0,1,0,0,0,1,1}, {0,1,1,0,0,0,1}, {0,1,0,1,1,1,1}, {0,1,1,1,0,1,1},
{0,1,1,0,1,1,1}, {0,0,0,1,0,1,1}
};
int data_left_even[10][7] = {
{0,1,0,0,1,1,1}, {0,1,1,0,0,1,1}, {0,0,1,1,0,1,1}, {0,1,0,0,0,0,1},
{0,0,1,1,1,0,1}, {0,1,1,1,0,0,1}, {0,0,0,0,1,0,1}, {0,0,1,0,0,0,1},
{0,0,0,1,0,0,1}, {0,0,1,0,1,1,1}
};
int data_right[10][7] = {
{1,1,1,0,0,1,0}, {1,1,0,0,1,1,0}, {1,1,0,1,1,0,0}, {1,0,0,0,0,1,0},
{1,0,1,1,1,0,0}, {1,0,0,1,1,1,0}, {1,0,1,0,0,0,0}, {1,0,0,0,1,0,0},
{1,0,0,1,0,0,0}, {1,1,1,0,1,0,0}
};
uint8 code[13+1];
uint32 tmp_p=0;
int i, j;
int len;
for(i=len=0;i<13;i++)
{
if(!rcode[i]) break;
if((code[i]=rcode[i]-'0') > 9)
return(0);
len++;
}
if(len!=13 && len!=12 && len!=8 && len!=7) return(0);
#define BS(x) BarcodeData[tmp_p]=x;tmp_p++
for(j=0;j<32;j++)
{
BS(0x00);
}
/* Left guard bars */
BS(1); BS(0); BS(1);
if(len==13 || len==12)
{
uint32 csum;
for(i=0;i<6;i++)
if(prefix_parity_type[code[0]][i])
{
for(j=0;j<7;j++)
{
BS(data_left_even[code[i+1]][j]);
}
}
else
for(j=0;j<7;j++)
{
BS(data_left_odd[code[i+1]][j]);
}
/* Center guard bars */
BS(0); BS(1); BS(0); BS(1); BS(0);
for(i=7;i<12;i++)
for(j=0;j<7;j++)
{
BS(data_right[code[i]][j]);
}
csum=0;
for(i=0;i<12;i++) csum+=code[i]*((i&1)?3:1);
csum=(10-(csum%10))%10;
for(j=0;j<7;j++)
{
BS(data_right[csum][j]);
}
}
else if(len==8 || len==7)
{
uint32 csum=0;
for(i=0;i<7;i++) csum+=(i&1)?code[i]:(code[i]*3);
csum=(10-(csum%10))%10;
for(i=0;i<4;i++)
for(j=0;j<7;j++)
{
BS(data_left_odd[code[i]][j]);
}
/* Center guard bars */
BS(0); BS(1); BS(0); BS(1); BS(0);
for(i=4;i<7;i++)
for(j=0;j<7;j++)
{
BS(data_right[code[i]][j]);
}
for(j=0;j<7;j++)
{ BS(data_right[csum][j]);}
}
/* Right guard bars */
BS(1); BS(0); BS(1);
for(j=0;j<32;j++)
{
BS(0x00);
}
BS(0xFF);
#undef BS
BarcodeReadPos=0;
BarcodeOut=0x8;
BarcodeCycleCount=0;
return(1);
}
static void BarcodeIRQHook(int a)
{
BandaiIRQHook(a);
BarcodeCycleCount+=a;
if(BarcodeCycleCount >= 1000)
{
BarcodeCycleCount -= 1000;
if(BarcodeData[BarcodeReadPos]==0xFF)
{
BarcodeOut=0;
}
else
{
BarcodeOut=(BarcodeData[BarcodeReadPos]^1)<<3;
BarcodeReadPos++;
}
}
}
static DECLFR(BarcodeRead)
{
return BarcodeOut;
}
static void M157Power(void)
{
BarcodeData[0]=0xFF;
BarcodeReadPos=0;
BarcodeOut=0;
BarcodeCycleCount=0;
BandaiSync();
SetWriteHandler(0x6000,0xFFFF,BandaiWrite);
SetReadHandler(0x6000,0x7FFF,BarcodeRead);
SetReadHandler(0x8000,0xFFFF,CartBR);
}
void Mapper157_Init(CartInfo *info)
{
is153=0;
info->Power=M157Power;
MapIRQHook=BarcodeIRQHook;
GameInfo->cspecial = SIS_DATACH;
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
}

34
src/boards/bmc42in1r.cpp
View File

@ -18,25 +18,28 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* BMC 42-in-1
* it seems now, mapper not reset-based,
* tested on real hardware and it does menus switch by pressing just Select, not Reset
* new registers behaviour proven this too
* BMC 42-in-1 "reset switch" + "select switch"
*
*/
#include "mapinc.h"
static uint8 latche[2];
static uint8 isresetbased = 0;
static uint8 latche[2], reset;
static SFORMAT StateRegs[]=
{
{&latche, sizeof(latche), "LATCHE"},
{&reset, 1, "RST"},
{latche, 2, "LATC"},
{0}
};
static void Sync(void)
{
uint8 bank = (latche[0]&0x1f)|((latche[0]&0x80)>>2)|((latche[1]&1))<<6;
uint8 bank;
if(isresetbased)
bank = (latche[0]&0x1f)|(reset<<5)|((latche[1]&1)<<6);
else
bank = (latche[0]&0x1f)|((latche[0]&0x80)>>2)|((latche[1]&1)<<6);
if(!(latche[0] & 0x20))
setprg32(0x8000,bank >> 1);
else
@ -56,7 +59,7 @@ static DECLFW(M226Write)
static void M226Power(void)
{
latche[0] = latche[1] = 0;
latche[0] = latche[1] = reset = 0;
Sync();
SetWriteHandler(0x8000,0xFFFF,M226Write);
SetReadHandler(0x8000,0xFFFF,CartBR);
@ -69,8 +72,23 @@ static void StateRestore(int version)
void Mapper226_Init(CartInfo *info)
{
isresetbased = 0;
info->Power=M226Power;
AddExState(&StateRegs, ~0, 0, 0);
GameStateRestore=StateRestore;
}
static void BMC42in1Reset(void)
{
reset ^= 1;
Sync();
}
void BMC42in1r_Init(CartInfo *info)
{
isresetbased = 1;
info->Power=M226Power;
info->Reset=BMC42in1Reset;
AddExState(&StateRegs, ~0, 0, 0);
GameStateRestore=StateRestore;
}

2
src/boards/bmc64in1nr.cpp
View File

@ -17,7 +17,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* BMC 42-in-1 reset switch
* BMC 42-in-1 "reset switch" type
*/
#include "mapinc.h"

8
src/boards/bmc70in1.cpp
View File

@ -29,7 +29,7 @@ static uint8 mirroring;
static SFORMAT StateRegs[]=
{
{&large_bank, 1, "LB"},
{&hw_switch, 1, "DIPSW"},
{&hw_switch, 1, "DPSW"},
{&prg_bank, 1, "PRG"},
{&chr_bank, 1, "CHR"},
{&bank_mode, 1, "BM"},
@ -59,10 +59,10 @@ static void Sync(void)
static DECLFR(BMC70in1Read)
{
if(bank_mode==0x10)
// if(is_large_banks)
// if(is_large_banks)
return CartBR((A&0xFFF0)|hw_switch);
// else
// return CartBR((A&0xFFF0)|hw_switch);
// else
// return CartBR((A&0xFFF0)|hw_switch);
else
return CartBR(A);
}

4
src/boards/bs-5.cpp
View File

@ -26,8 +26,8 @@ static uint8 dip_switch;
static SFORMAT StateRegs[]=
{
{reg_prg, 4, "PREGS"},
{reg_chr, 4, "CREGS"},
{reg_prg, 4, "PREG"},
{reg_chr, 4, "CREG"},
{0}
};

424
src/boards/datalatch.cpp
View File

@ -29,11 +29,11 @@ static void(*WSync)(void);
static DECLFW(LatchWrite)
{
// FCEU_printf("bs %04x %02x\n",A,V);
// FCEU_printf("bs %04x %02x\n",A,V);
if(bus_conflict)
latche=V&CartBR(A);
else
latche=V;
latche=V;
WSync();
}
@ -88,57 +88,88 @@ static void Latch_Init(CartInfo *info, void (*proc)(void), uint8 init, uint16 ad
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
}
AddExState(&latche, 1, 0, "LATC");
AddExState(&bus_conflict, 1, 0, "BUSC");
}
//------------------ CPROM ---------------------------
//------------------ Map 0 ---------------------------
static void CPROMSync(void)
#ifdef DEBUG_MAPPER
static DECLFW(NROMWrite)
{
setchr4(0x0000,0);
setchr4(0x1000,latche&3);
FCEU_printf("bs %04x %02x\n",A,V);
CartBW(A,V);
}
#endif
static void NROMPower(void)
{
setprg8r(0x10,0x6000,0); // Famili BASIC (v3.0) need it (uses only 4KB), FP-BASIC uses 8KB
setprg16(0x8000,0);
setprg16(0xC000,1);
setprg16(0xC000,~0);
setchr8(0);
SetReadHandler(0x6000,0x7FFF,CartBR);
SetWriteHandler(0x6000,0x7FFF,CartBW);
SetReadHandler(0x8000,0xFFFF,CartBR);
#ifdef DEBUG_MAPPER
SetWriteHandler(0x4020,0xFFFF,NROMWrite);
#endif
}
void CPROM_Init(CartInfo *info)
void NROM_Init(CartInfo *info)
{
Latch_Init(info, CPROMSync, 0, 0x8000, 0xFFFF, 0, 0);
info->Power=NROMPower;
info->Close=LatchClose;
WRAMSIZE=8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);
if(info->battery)
{
info->SaveGame[0]=WRAM;
info->SaveGameLen[0]=WRAMSIZE;
}
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
}
//------------------ Map 184 ---------------------------
//------------------ Map 2 ---------------------------
static void M184Sync(void)
static void UNROMSync(void)
{
setchr4(0x0000,latche);
setchr4(0x1000,latche>>4);
setprg16(0x8000,0);
setprg16(0xC000,1);
static uint32 mirror_in_use = 0;
if(PRGsize[0] <= 128 * 1024)
{
setprg16(0x8000,latche&0x7);
if(latche&8) mirror_in_use = 1;
if(mirror_in_use)
setmirror(((latche >> 3)&1)^1); // Higway Star Hacked mapper
} else
setprg16(0x8000,latche&0xf);
setprg16(0xc000,~0);
setchr8(0);
}
void Mapper184_Init(CartInfo *info)
void UNROM_Init(CartInfo *info)
{
Latch_Init(info, M184Sync, 0, 0x6000, 0x7FFF, 0, 0);
Latch_Init(info, UNROMSync, 0, 0x8000, 0xFFFF, 0, 1);
}
//------------------ CNROM ---------------------------
//------------------ Map 3 ---------------------------
static void CNROMSync(void)
{
//mbg 8/10/08 - fixed this so that large homebrew roms would work.
//setchr8(latche&3);
setchr8(latche);
setprg16(0x8000,0);
setprg16(0xC000,1);
setchr8(latche);
setprg32(0x8000,0);
setprg8r(0x10,0x6000,0); // Hayauchy IGO uses 2Kb or RAM
}
void CNROM_Init(CartInfo *info)
{
bool busc = MasterRomInfoParams.ContainsKey("busc");
Latch_Init(info, CNROMSync, 0, 0x8000, 0xFFFF, 1, busc?1:0);
Latch_Init(info, CNROMSync, 0, 0x8000, 0xFFFF, 1, 1);
}
//------------------ ANROM ---------------------------
//------------------ Map 7 ---------------------------
static void ANROMSync()
{
@ -152,101 +183,18 @@ void ANROM_Init(CartInfo *info)
Latch_Init(info, ANROMSync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 70 ---------------------------
//------------------ Map 8 ---------------------------
static void M70Sync()
static void M8Sync()
{
setprg16(0x8000,latche>>4);
setprg16(0xc000,~0);
setchr8(latche&0xf);
setprg16(0x8000,latche>>3);
setprg16(0xc000,1);
setchr8(latche&3);
}
void Mapper70_Init(CartInfo *info)
void Mapper8_Init(CartInfo *info)
{
Latch_Init(info, M70Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 152 ---------------------------
static void M152Sync()
{
setprg16(0x8000,(latche>>4)&7);
setprg16(0xc000,~0);
setchr8(latche&0xf);
setmirror(MI_0+((latche>>7)&1)); /* Saint Seiya...hmm. */
}
void Mapper152_Init(CartInfo *info)
{
Latch_Init(info, M152Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 78 ---------------------------
/* Should be two separate emulation functions for this "mapper". Sigh. URGE TO KILL RISING. */
static void M78Sync()
{
setprg16(0x8000,(latche&7));
setprg16(0xc000,~0);
setchr8(latche>>4);
setmirror(MI_0+((latche>>3)&1));
}
void Mapper78_Init(CartInfo *info)
{
Latch_Init(info, M78Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ MHROM ---------------------------
static void MHROMSync(void)
{
setprg32(0x8000,latche>>4);
setchr8(latche&0xf);
}
void MHROM_Init(CartInfo *info)
{
Latch_Init(info, MHROMSync, 0, 0x8000, 0xFFFF, 0, 0);
}
void Mapper140_Init(CartInfo *info)
{
Latch_Init(info, MHROMSync, 0, 0x6000, 0x7FFF, 0, 0);
}
void Mapper240_Init(CartInfo *info)
{
Latch_Init(info, MHROMSync, 0, 0x4020, 0x5FFF, 0, 0);
// need SRAM.
}
//------------------ Map 87 ---------------------------
static void M87Sync(void)
{
setprg16(0x8000,0);
setprg16(0xC000,1);
setchr8(((latche>>1)&1)|((latche<<1)&2));
// setchr8(latche);
}
void Mapper87_Init(CartInfo *info)
{
Latch_Init(info, M87Sync, ~0, 0x6000, 0xFFFF, 0, 0);
}
//------------------ Map 101 ---------------------------
static void M101Sync(void)
{
setprg16(0x8000,0);
setprg16(0xC000,1);
setchr8(latche);
}
void Mapper101_Init(CartInfo *info)
{
Latch_Init(info, M101Sync, ~0, 0x6000, 0x7FFF, 0, 0);
Latch_Init(info, M8Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 11 ---------------------------
@ -267,17 +215,18 @@ void Mapper144_Init(CartInfo *info)
Latch_Init(info, M11Sync, 0, 0x8001, 0xFFFF, 0, 0);
}
//------------------ Map 38 ---------------------------
//------------------ Map 13 ---------------------------
static void M38Sync(void)
static void CPROMSync(void)
{
setprg32(0x8000,latche&3);
setchr8(latche>>2);
setchr4(0x0000,0);
setchr4(0x1000,latche&3);
setprg32(0x8000,0);
}
void Mapper38_Init(CartInfo *info)
void CPROM_Init(CartInfo *info)
{
Latch_Init(info, M38Sync, 0, 0x7000, 0x7FFF, 0, 0);
Latch_Init(info, CPROMSync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 36 ---------------------------
@ -292,18 +241,101 @@ void Mapper36_Init(CartInfo *info)
{
Latch_Init(info, M36Sync, 0, 0x8400, 0xfffe, 0, 0);
}
//------------------ UNROM ---------------------------
static void UNROMSync(void)
//------------------ Map 38 ---------------------------
static void M38Sync(void)
{
setprg16(0x8000,latche);
setprg16(0xc000,~0);
setchr8(0);
setprg32(0x8000,latche&3);
setchr8(latche>>2);
}
void UNROM_Init(CartInfo *info)
void Mapper38_Init(CartInfo *info)
{
Latch_Init(info, UNROMSync, 0, 0x8000, 0xFFFF, 0, 1);
Latch_Init(info, M38Sync, 0, 0x7000, 0x7FFF, 0, 0);
}
//------------------ Map 66 ---------------------------
static void MHROMSync(void)
{
setprg32(0x8000,latche>>4);
setchr8(latche&0xf);
}
void MHROM_Init(CartInfo *info)
{
Latch_Init(info, MHROMSync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 70 ---------------------------
static void M70Sync()
{
setprg16(0x8000,latche>>4);
setprg16(0xc000,~0);
setchr8(latche&0xf);
}
void Mapper70_Init(CartInfo *info)
{
Latch_Init(info, M70Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 78 ---------------------------
/* Should be two separate emulation functions for this "mapper". Sigh. URGE TO KILL RISING. */
static void M78Sync()
{
setprg16(0x8000,(latche&7));
setprg16(0xc000,~0);
setchr8(latche>>4);
setmirror(MI_0+((latche>>3)&1));
}
void Mapper78_Init(CartInfo *info)
{
Latch_Init(info, M78Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 86 ---------------------------
static void M86Sync(void)
{
setprg32(0x8000,(latche >> 4) & 3);
setchr8((latche & 3) | ((latche >> 4) & 4));
}
void Mapper86_Init(CartInfo *info)
{
Latch_Init(info, M86Sync, ~0, 0x6000, 0x6FFF, 0, 0);
}
//------------------ Map 87 ---------------------------
static void M87Sync(void)
{
setprg32(0x8000,0);
setchr8(((latche>>1)&1)|((latche<<1)&2));
}
void Mapper87_Init(CartInfo *info)
{
Latch_Init(info, M87Sync, ~0, 0x6000, 0xFFFF, 0, 0);
}
//------------------ Map 89 ---------------------------
static void M89Sync(void)
{
setprg16(0x8000,(latche >> 4) & 7);
setprg16(0xc000, ~0);
setchr8((latche & 7) | ((latche >> 4) & 8));
setmirror(MI_0 + ((latche >> 3) & 1));
}
void Mapper89_Init(CartInfo *info)
{
Latch_Init(info, M89Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 93 ---------------------------
@ -334,18 +366,39 @@ void Mapper94_Init(CartInfo *info)
Latch_Init(info, M94Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 180 ---------------------------
//------------------ Map 97 ---------------------------
static void M180Sync(void)
static void M97Sync(void)
{
setprg16(0x8000,0);
setprg16(0xc000,latche);
setchr8(0);
setprg16(0x8000,~0);
setprg16(0xc000,latche & 15);
switch(latche >> 6)
{
case 0: break;
case 1: setmirror(MI_H); break;
case 2: setmirror(MI_V); break;
case 3: break;
}
setchr8(((latche>>1)&1)|((latche<<1)&2));
}
void Mapper180_Init(CartInfo *info)
void Mapper97_Init(CartInfo *info)
{
Latch_Init(info, M180Sync, 0, 0x8000, 0xFFFF, 0, 0);
Latch_Init(info, M97Sync, ~0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 101 ---------------------------
static void M101Sync(void)
{
setprg32(0x8000,0);
setchr8(latche);
}
void Mapper101_Init(CartInfo *info)
{
Latch_Init(info, M101Sync, ~0, 0x6000, 0x7FFF, 0, 0);
}
//------------------ Map 107 ---------------------------
@ -367,7 +420,7 @@ static void M113Sync(void)
{
setprg32(0x8000,(latche>>3)&7);
setchr8(((latche>>3)&8)|(latche&7));
// setmirror(latche>>7); // only for HES 6in1
// setmirror(latche>>7); // only for HES 6in1
}
void Mapper113_Init(CartInfo *info)
@ -375,6 +428,64 @@ void Mapper113_Init(CartInfo *info)
Latch_Init(info, M113Sync, 0, 0x4100, 0x7FFF, 0, 0);
}
//------------------ Map 140 ---------------------------
void Mapper140_Init(CartInfo *info)
{
Latch_Init(info, MHROMSync, 0, 0x6000, 0x7FFF, 0, 0);
}
//------------------ Map 152 ---------------------------
static void M152Sync()
{
setprg16(0x8000,(latche>>4)&7);
setprg16(0xc000,~0);
setchr8(latche&0xf);
setmirror(MI_0+((latche>>7)&1)); /* Saint Seiya...hmm. */
}
void Mapper152_Init(CartInfo *info)
{
Latch_Init(info, M152Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 180 ---------------------------
static void M180Sync(void)
{
setprg16(0x8000,0);
setprg16(0xc000,latche);
setchr8(0);
}
void Mapper180_Init(CartInfo *info)
{
Latch_Init(info, M180Sync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ Map 184 ---------------------------
static void M184Sync(void)
{
setchr4(0x0000,latche);
setchr4(0x1000,latche>>4);
setprg32(0x8000,0);
}
void Mapper184_Init(CartInfo *info)
{
Latch_Init(info, M184Sync, 0, 0x6000, 0x7FFF, 0, 0);
}
//------------------ Map 240 ---------------------------
void Mapper240_Init(CartInfo *info)
{
Latch_Init(info, MHROMSync, 0, 0x4020, 0x5FFF, 0, 0);
// need SRAM.
}
//------------------ A65AS ---------------------------
// actually, there is two cart in one... First have extra mirroring
@ -403,44 +514,3 @@ void BMCA65AS_Init(CartInfo *info)
Latch_Init(info, BMCA65ASSync, 0, 0x8000, 0xFFFF, 0, 0);
}
//------------------ NROM ---------------------------
#ifdef DEBUG_MAPPER
static DECLFW(WriteHandler)
{
FCEU_printf("bs %04x %02x\n",A,V);
CartBW(A,V);
}
#endif
static void NROMPower(void)
{
setprg8r(0x10,0x6000,0); // Famili BASIC (v3.0) need it (uses only 4KB), FP-BASIC uses 8KB
setprg16(0x8000,0);
setprg16(0xC000,~0);
setchr8(0);
SetReadHandler(0x6000,0x7FFF,CartBR);
SetWriteHandler(0x6000,0x7FFF,CartBW);
SetReadHandler(0x8000,0xFFFF,CartBR);
#ifdef DEBUG_MAPPER
SetWriteHandler(0x4020,0xFFFF,WriteHandler);
#endif
}
void NROM_Init(CartInfo *info)
{
info->Power=NROMPower;
info->Close=LatchClose;
WRAMSIZE=8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);
if(info->battery)
{
info->SaveGame[0]=WRAM;
info->SaveGameLen[0]=WRAMSIZE;
}
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
}

2
src/boards/dream.cpp
View File

@ -52,5 +52,5 @@ void DreamTech01_Init(CartInfo *info)
{
GameStateRestore=Restore;
info->Power=DREAMPower;
AddExState(&latche, 1, 0, "LATCH");
AddExState(&latche, 1, 0, "LATC");
}

8
src/boards/edu2000.cpp
View File

@ -35,12 +35,12 @@ static void Sync(void)
setchr8(0);
setprg8r(0x10,0x6000,(reg&0xC0)>>6);
setprg32(0x8000,reg&0x1F);
// setmirror(((reg&0x20)>>5));
// setmirror(((reg&0x20)>>5));
}
static DECLFW(UNLEDU2000HiWrite)
{
// FCEU_printf("%04x:%02x\n",A,V);
// FCEU_printf("%04x:%02x\n",A,V);
reg=V;
Sync();
}
@ -76,8 +76,8 @@ void UNLEDU2000_Init(CartInfo *info)
SetupCartPRGMapping(0x10,WRAM,32768,1);
if(info->battery)
{
info->SaveGame[0]=WRAM;
info->SaveGameLen[0]=32768;
info->SaveGame[0]=WRAM;
info->SaveGameLen[0]=32768;
}
AddExState(WRAM, 32768, 0, "WRAM");
AddExState(StateRegs, ~0, 0, 0);

8
src/boards/fk23c.cpp
View File

@ -253,8 +253,8 @@ void BMCFK23C_Init(CartInfo *info)
info->Power=BMCFK23CPower;
info->Reset=BMCFK23CReset;
AddExState(EXPREGS, 8, 0, "EXPR");
AddExState(&unromchr, 1, 0, "UNCHR");
AddExState(&dipswitch, 1, 0, "DIPSW");
AddExState(&unromchr, 1, 0, "UCHR");
AddExState(&dipswitch, 1, 0, "DPSW");
prg_bonus = 1;
if(MasterRomInfoParams.find("bonus") != MasterRomInfoParams.end())
@ -280,8 +280,8 @@ void BMCFK23CA_Init(CartInfo *info)
AddExState(CHRRAM, CHRRAMSize, 0, "CRAM");
AddExState(EXPREGS, 8, 0, "EXPR");
AddExState(&unromchr, 1, 0, "UNCHR");
AddExState(&dipswitch, 1, 0, "DIPSW");
AddExState(&unromchr, 1, 0, "UCHR");
AddExState(&dipswitch, 1, 0, "DPSW");
prg_bonus = 1;
if(MasterRomInfoParams.find("bonus") != MasterRomInfoParams.end())

2
src/boards/ghostbusters63in1.cpp
View File

@ -99,7 +99,7 @@ void BMCGhostbusters63in1_Init(CartInfo *info)
CHRROMSIZE=8192; // dummy CHRROM, VRAM disable
CHRROM=(uint8*)FCEU_gmalloc(CHRROMSIZE);
SetupCartPRGMapping(0x10,CHRROM,CHRROMSIZE,0);
AddExState(CHRROM, CHRROMSIZE, 0, "CHRROM");
AddExState(CHRROM, CHRROMSIZE, 0, "CROM");
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);

13
src/boards/h2288.cpp
View File

@ -61,23 +61,14 @@ static DECLFW(H2288WriteLo)
}
}
static DECLFR(H2288Read)
{
int bit;
bit=(A&1)^1;
bit&=((A>>8)&1);
bit^=1;
return((X.DB&0xFE)|bit);
}
static void H2288Power(void)
{
EXPREGS[0]=EXPREGS[1]=0;
GenMMC3Power();
SetReadHandler(0x5000,0x5FFF,H2288Read);
// SetReadHandler(0x5000,0x5FFF,H2288Read);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x5000,0x5FFF,H2288WriteLo);
SetWriteHandler(0x8000,0x8FFF,H2288WriteHi);
SetWriteHandler(0x8000,0x9FFF,H2288WriteHi);
}
void UNLH2288_Init(CartInfo *info)

2
src/boards/karaoke.cpp
View File

@ -67,5 +67,5 @@ void Mapper188_Init(CartInfo *info)
{
info->Power=Power;
GameStateRestore=StateRestore;
AddExState(&latche, 1, 0, "LATCH");
AddExState(&latche, 1, 0, "LATC");
}

4
src/boards/konami-qtai.cpp
View File

@ -40,7 +40,7 @@ static SFORMAT StateRegs[]=
{&IRQCount, 1, "IRQC"},
{&IRQLatch, 1, "IRQL"},
{&IRQa, 1, "IRQA"},
{&K4IRQ, 1, "K4IRQ"},
{&K4IRQ, 1, "KIRQ"},
{regs, 16, "REGS"},
{0}
};
@ -226,7 +226,7 @@ void Mapper190_Init(CartInfo *info)
CHRRAM=(uint8*)FCEU_gmalloc(CHRSIZE);
SetupCartCHRMapping(0x10,CHRRAM,CHRSIZE,1);
AddExState(CHRRAM, CHRSIZE, 0, "CHRRAM");
AddExState(CHRRAM, CHRSIZE, 0, "CRAM");
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);

18
src/boards/ks7032.cpp
View File

@ -20,7 +20,7 @@
#include "mapinc.h"
static uint8 reg[8], cmd, IRQa;
static uint8 reg[8], cmd, IRQa = 0, isirqused = 0;
static int32 IRQCount;
static SFORMAT StateRegs[]=
@ -44,15 +44,15 @@ static void Sync(void)
static DECLFW(UNLKS7032Write)
{
// FCEU_printf("bs %04x %02x\n",A,V);
switch(A)
// FCEU_printf("bs %04x %02x\n",A,V);
switch(A&0xF000)
{
// case 0x8FFF: reg[4]=V; Sync(); break;
case 0x8000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x000F)|(V&0x0F); break;
case 0x9000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x00F0)|((V&0x0F)<<4); break;
case 0xA000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x0F00)|((V&0x0F)<<8); break;
case 0xB000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0xF000)|(V<<12); break;
case 0xC000: X6502_IRQEnd(FCEU_IQEXT); IRQa=1; break;
// case 0x8FFF: reg[4]=V; Sync(); break;
case 0x8000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x000F)|(V&0x0F); isirqused = 1; break;
case 0x9000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x00F0)|((V&0x0F)<<4); isirqused = 1; break;
case 0xA000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x0F00)|((V&0x0F)<<8); isirqused = 1; break;
case 0xB000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0xF000)|(V<<12); isirqused = 1; break;
case 0xC000: if(isirqused) { X6502_IRQEnd(FCEU_IQEXT); IRQa=1; } break;
case 0xE000: cmd=V&7; break;
case 0xF000: reg[cmd]=V; Sync(); break;
}

2
src/boards/malee.cpp
View File

@ -38,5 +38,5 @@ void MALEE_Init(CartInfo *info)
{
info->Power=MALEEPower;
SetupCartPRGMapping(0x10, WRAM, 2048, 1);
AddExState(WRAM, 2048, 0,"RAM");
AddExState(WRAM, 2048, 0,"WRAM");
}

42
src/boards/mmc1.cpp
View File

@ -107,39 +107,39 @@ static void MMC1PRG(void)
else
{
switch(DRegs[0]&0xC)
{
case 0xC: setprg16(0x8000,(DRegs[3]+offs));
setprg16(0xC000,0xF+offs);
break;
case 0x8: setprg16(0xC000,(DRegs[3]+offs));
setprg16(0x8000,offs);
break;
case 0x0:
case 0x4:
setprg16(0x8000,((DRegs[3]&~1)+offs));
setprg16(0xc000,((DRegs[3]&~1)+offs+1));
break;
{
case 0xC: setprg16(0x8000,(DRegs[3]+offs));
setprg16(0xC000,0xF+offs);
break;
case 0x8: setprg16(0xC000,(DRegs[3]+offs));
setprg16(0x8000,offs);
break;
case 0x0:
case 0x4:
setprg16(0x8000,((DRegs[3]&~1)+offs));
setprg16(0xc000,((DRegs[3]&~1)+offs+1));
break;
}
}
}
}
static void MMC1MIRROR(void)
{
if(!is171)
switch(DRegs[0]&3)
{
case 2: setmirror(MI_V); break;
case 3: setmirror(MI_H); break;
case 0: setmirror(MI_0); break;
case 1: setmirror(MI_1); break;
}
switch(DRegs[0]&3)
{
case 2: setmirror(MI_V); break;
case 3: setmirror(MI_H); break;
case 0: setmirror(MI_0); break;
case 1: setmirror(MI_1); break;
}
}
static uint64 lreset;
static DECLFW(MMC1_write)
{
int n=(A>>13)-4;
//FCEU_DispMessage("%016x",0,timestampbase+timestamp);
//FCEU_DispMessage("%016x",timestampbase+timestamp);
// FCEU_printf("$%04x:$%02x, $%04x\n",A,V,X.PC);
//DumpMem("out",0xe000,0xffff);

171
src/boards/mmc3.cpp
View File

@ -21,7 +21,7 @@
*/
/* Code for emulating iNES mappers 4,12,44,45,47,49,52,74,114,115,116,118,
119,165,205,214,215,245,249,250,254
119,165,205,245,249,250,254
*/
#include "mapinc.h"
@ -34,6 +34,7 @@ uint32 CHRRAMSize;
uint8 DRegBuf[8];
uint8 EXPREGS[8]; /* For bootleg games, mostly. */
uint8 A000B,A001B;
int mmc3opts=0;
#undef IRQCount
#undef IRQLatch
@ -54,7 +55,6 @@ static SFORMAT MMC3_StateRegs[]=
{0}
};
static int mmc3opts=0;
static int wrams;
static int isRevB=1;
@ -289,7 +289,7 @@ void GenMMC3Power(void)
}
MMC3RegReset();
if(CHRRAM)
FCEU_dwmemset(CHRRAM,0,CHRRAMSize);
FCEU_dwmemset(CHRRAM,0,CHRRAMSize);
}
static void GenMMC3Close(void)
@ -318,7 +318,7 @@ void GenMMC3_Init(CartInfo *info, int prg, int chr, int wram, int battery)
mmc3opts|=1;
WRAM=(uint8*)FCEU_gmalloc(wrams);
SetupCartPRGMapping(0x10,WRAM,wrams,1);
AddExState(WRAM, wrams, 0, "MMC3WRAM");
AddExState(WRAM, wrams, 0, "MRAM");
}
if(battery)
@ -547,9 +547,20 @@ static DECLFW(M45Write)
FixMMC3CHR(MMC3_cmd);
}
static DECLFR(M45Read)
{
uint32 addr = 1<<(EXPREGS[5]+4);
if(A&(addr|(addr-1)))
return X.DB | 1;
else
return X.DB;
}
static void M45Reset(void)
{
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=EXPREGS[4]=0;
EXPREGS[5]++;
EXPREGS[5] &= 7;
MMC3RegReset();
}
@ -557,7 +568,9 @@ static void M45Power(void)
{
setchr8(0);
GenMMC3Power();
SetWriteHandler(0x6000,0x7FFF,M45Write);
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=EXPREGS[4]=EXPREGS[5]=0;
SetWriteHandler(0x5000,0x7FFF,M45Write);
SetReadHandler(0x5000,0x5FFF,M45Read);
}
void Mapper45_Init(CartInfo *info)
@ -668,21 +681,19 @@ void Mapper49_Init(CartInfo *info)
}
// ---------------------------- Mapper 52 -------------------------------
static void M52PW(uint32 A, uint8 V)
{
uint32 NV=V;
NV&=0x1F^((EXPREGS[0]&8)<<1);
NV|=((EXPREGS[0]&6)|((EXPREGS[0]>>3)&EXPREGS[0]&1))<<4;
setprg8(A,NV);
uint32 mask = 0x1F^((EXPREGS[0]&8)<<1);
uint32 bank = ((EXPREGS[0]&6)|((EXPREGS[0]>>3)&EXPREGS[0]&1))<<4;
setprg8(A, bank|(V & mask));
}
static void M52CW(uint32 A, uint8 V)
{
uint32 NV=V;
NV&=0xFF^((EXPREGS[0]&0x40)<<1);
NV|=(((EXPREGS[0]>>3)&4)|((EXPREGS[0]>>1)&2)|((EXPREGS[0]>>6)&(EXPREGS[0]>>4)&1))<<7;
setchr1(A,NV);
uint32 mask = 0xFF^((EXPREGS[0]&0x40)<<1);
// uint32 bank = (((EXPREGS[0]>>3)&4)|((EXPREGS[0]>>1)&2)|((EXPREGS[0]>>6)&(EXPREGS[0]>>4)&1))<<7;
uint32 bank = (((EXPREGS[0]>>4)&2)|(EXPREGS[0]&4)|((EXPREGS[0]>>6)&(EXPREGS[0]>>4)&1))<<7; // actually 256K CHR banks index bits is inverted!
setchr1(A, bank|(V & mask));
}
static DECLFW(M52Write)
@ -692,7 +703,7 @@ static DECLFW(M52Write)
WRAM[A-0x6000]=V;
return;
}
EXPREGS[1]=1;
EXPREGS[1]=V&0x80;
EXPREGS[0]=V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
@ -713,7 +724,7 @@ static void M52Power(void)
void Mapper52_Init(CartInfo *info)
{
GenMMC3_Init(info, 512, 256, 8, info->battery);
GenMMC3_Init(info, 256, 256, 8, info->battery);
cwrap=M52CW;
pwrap=M52PW;
info->Reset=M52Reset;
@ -759,59 +770,59 @@ static void M114PWRAP(uint32 A, uint8 V)
static DECLFW(M114Write)
{
switch(A&0xE001)
{
case 0x8001: MMC3_CMDWrite(0xA000,V); break;
case 0xA000: MMC3_CMDWrite(0x8000,(V&0xC0)|(m114_perm[V&7])); cmdin=1; break;
case 0xC000: if(!cmdin) break; MMC3_CMDWrite(0x8001,V); cmdin=0; break;
case 0xA001: IRQLatch=V; break;
case 0xC001: IRQReload=1; break;
case 0xE000: X6502_IRQEnd(FCEU_IQEXT);IRQa=0; break;
case 0xE001: IRQa=1; break;
}
switch(A&0xE001)
{
case 0x8001: MMC3_CMDWrite(0xA000,V); break;
case 0xA000: MMC3_CMDWrite(0x8000,(V&0xC0)|(m114_perm[V&7])); cmdin=1; break;
case 0xC000: if(!cmdin) break; MMC3_CMDWrite(0x8001,V); cmdin=0; break;
case 0xA001: IRQLatch=V; break;
case 0xC001: IRQReload=1; break;
case 0xE000: X6502_IRQEnd(FCEU_IQEXT);IRQa=0; break;
case 0xE001: IRQa=1; break;
}
}
static DECLFW(M114ExWrite)
{
if(A<=0x7FFF)
{
EXPREGS[0]=V;
FixMMC3PRG(MMC3_cmd);
EXPREGS[0]=V;
FixMMC3PRG(MMC3_cmd);
}
}
static void M114Power(void)
{
GenMMC3Power();
SetWriteHandler(0x8000,0xFFFF,M114Write);
SetWriteHandler(0x5000,0x7FFF,M114ExWrite);
GenMMC3Power();
SetWriteHandler(0x8000,0xFFFF,M114Write);
SetWriteHandler(0x5000,0x7FFF,M114ExWrite);
}
static void M114Reset(void)
{
EXPREGS[0]=0;
MMC3RegReset();
EXPREGS[0]=0;
MMC3RegReset();
}
void Mapper114_Init(CartInfo *info)
{
isRevB=0;
GenMMC3_Init(info, 256, 256, 0, 0);
pwrap=M114PWRAP;
info->Power=M114Power;
info->Reset=M114Reset;
AddExState(EXPREGS, 1, 0, "EXPR");
AddExState(&cmdin, 1, 0, "CMDIN");
isRevB=0;
GenMMC3_Init(info, 256, 256, 0, 0);
pwrap=M114PWRAP;
info->Power=M114Power;
info->Reset=M114Reset;
AddExState(EXPREGS, 1, 0, "EXPR");
AddExState(&cmdin, 1, 0, "CMDI");
}
// ---------------------------- Mapper 115 ------------------------------
// ---------------------------- Mapper 115 KN-658 board ------------------------------
static void M115PW(uint32 A, uint8 V)
{
//zero 09-apr-2012 - #3515357 - changed to support Bao Qing Tian (mapper 248) which was missing BG gfx. 115 game(s?) seem still to work OK.
GENPWRAP(A,V);
if(A==0x8000 && EXPREGS[0]&0x80)
setprg16(0x8000,(EXPREGS[0]&0xF));
if(EXPREGS[0]&0x80)
setprg32(0x8000,(EXPREGS[0]&7)>>1);
else
setprg8(A,V);
}
static void M115CW(uint32 A, uint8 V)
@ -1095,29 +1106,62 @@ void Mapper195_Init(CartInfo *info)
wramtw=(uint8*)FCEU_gmalloc(wramsize);
SetupCartPRGMapping(0x10, wramtw, wramsize, 1);
AddExState(CHRRAM, CHRRAMSize, 0, "CHRR");
AddExState(wramtw, wramsize, 0, "WRAMTW");
AddExState(wramtw, wramsize, 0, "TRAM");
}
// ---------------------------- Mapper 196 -------------------------------
// MMC3 board with optional command address line connection, allows to
// make three-four different wirings to IRQ address lines and separately to
// CMD address line, Mali Boss additionally check if wiring are correct for
// game
static void M196PW(uint32 A, uint8 V)
{
if(EXPREGS[0]) // Tenchi o Kurau II - Shokatsu Koumei Den (J) (C).nes
setprg32(0x8000,EXPREGS[1]);
else
setprg8(A,V);
// setprg8(A,(V&3)|((V&8)>>1)|((V&4)<<1)); // Mali Splash Bomb
}
//static void M196CW(uint32 A, uint8 V)
//{
// setchr1(A,(V&0xDD)|((V&0x20)>>4)|((V&2)<<4));
//}
static DECLFW(Mapper196Write)
{
A=(A&0xFFFE)|((A>>2)&1)|((A>>3)&1)|((A>>1)&1);
if(A >= 0xC000)
if(A >= 0xC000) {
A=(A&0xFFFE)|((A>>2)&1)|((A>>3)&1);
MMC3_IRQWrite(A,V);
else
}
else {
A=(A&0xFFFE)|((A>>2)&1)|((A>>3)&1)|((A>>1)&1);
// A=(A&0xFFFE)|((A>>3)&1); // Mali Splash Bomb
MMC3_CMDWrite(A,V);
}
}
static DECLFW(Mapper196WriteLo)
{
EXPREGS[0]=1;
EXPREGS[1]=(V&0xf)|(V>>4);
FixMMC3PRG(MMC3_cmd);
}
static void Mapper196Power(void)
{
GenMMC3Power();
EXPREGS[0] = EXPREGS[1] = 0;
SetWriteHandler(0x6000,0x6FFF,Mapper196WriteLo);
SetWriteHandler(0x8000,0xFFFF,Mapper196Write);
}
void Mapper196_Init(CartInfo *info)
{
GenMMC3_Init(info, 128, 128, 0, 0);
pwrap=M196PW;
// cwrap=M196CW; // Mali Splash Bomb
info->Power=Mapper196Power;
}
@ -1158,46 +1202,51 @@ void Mapper198_Init(CartInfo *info)
wramsize=4096;
wramtw=(uint8*)FCEU_gmalloc(wramsize);
SetupCartPRGMapping(0x10, wramtw, wramsize, 1);
AddExState(wramtw, wramsize, 0, "WRAMTW");
AddExState(wramtw, wramsize, 0, "TRAM");
}
// ---------------------------- Mapper 205 ------------------------------
// GN-45 BOARD
static void M205PW(uint32 A, uint8 V)
{
if(EXPREGS[0]&2)
setprg8(A,(V&0x0f)|((EXPREGS[0]&3)<<4));
else
setprg8(A,(V&0x1f)|((EXPREGS[0]&3)<<4));
// GN-30A - íà÷àëüíàÿ ìàñêà äîëæíà áûòü 1F + àïïàðàòíûé ïåðåêëþ÷àòåëü íà øèíå àäðåñà
setprg8(A,(V&0x0f)|EXPREGS[0]);
}
static void M205CW(uint32 A, uint8 V)
{
setchr1(A,V|((EXPREGS[0]&3)<<7));
// GN-30A - íà÷àëüíàÿ ìàñêà äîëæíà áûòü FF
setchr1(A,(V&0x7F)|(EXPREGS[0]<<3));
}
static DECLFW(M205Write)
{
if((A&0x6800)==0x6800) EXPREGS[0]= V;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
if(EXPREGS[2] == 0) {
EXPREGS[0] = A & 0x30;
EXPREGS[2] = A & 0x80;
FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
}
else
CartBW(A,V);
}
static void M205Reset(void)
{
EXPREGS[0]=0;
EXPREGS[0]=EXPREGS[2]=0;
MMC3RegReset();
}
static void M205Power(void)
{
GenMMC3Power();
SetWriteHandler(0x4020,0x7FFF,M205Write);
SetWriteHandler(0x6000,0x6fff,M205Write);
}
void Mapper205_Init(CartInfo *info)
{
GenMMC3_Init(info, 512, 256, 8, 0);
GenMMC3_Init(info, 256, 256, 8, 0);
pwrap=M205PW;
cwrap=M205CW;
info->Power=M205Power;

2
src/boards/n106.cpp
View File

@ -88,7 +88,9 @@ static DECLFR(Namco_Read4800)
{
uint8 ret=IRAM[dopol&0x7f];
/* Maybe I should call NamcoSoundHack() here? */
#ifdef FCEUDEF_DEBUGGER
if(!fceuindbg)
#endif
if(dopol&0x80)
dopol=(dopol&0x80)|((dopol+1)&0x7f);
return ret;

26
src/boards/n625092.cpp
View File

@ -39,26 +39,36 @@ static void Sync(void)
{
if(cmd&0x100)
{
setprg16(0x8000,((cmd&0xe0)>>2)|bank);
setprg16(0xC000,((cmd&0xe0)>>2)|7);
setprg16(0x8000,((cmd&0xfc)>>2)|bank);
setprg16(0xC000,((cmd&0xfc)>>2)|7);
}
else
{
setprg16(0x8000,((cmd&0xe0)>>2)|(bank&6));
setprg16(0xC000,((cmd&0xe0)>>2)|((bank&6)|1));
setprg16(0x8000,((cmd&0xfc)>>2)|(bank&6));
setprg16(0xC000,((cmd&0xfc)>>2)|((bank&6)|1));
}
}
else
{
setprg16(0x8000,((cmd&0xe0)>>2)|bank);
setprg16(0xC000,((cmd&0xe0)>>2)|bank);
setprg16(0x8000,((cmd&0xfc)>>2)|bank);
setprg16(0xC000,((cmd&0xfc)>>2)|bank);
}
}
static uint16 ass = 0;
static DECLFW(UNLN625092WriteCommand)
{
cmd=A;
Sync();
if(A==0x80F8)
{
setprg16(0x8000,ass);
setprg16(0xC000,ass);
}
else
{
Sync();
}
}
static DECLFW(UNLN625092WriteBank)
@ -81,6 +91,8 @@ static void UNLN625092Reset(void)
{
cmd=0;
bank=0;
ass++;
FCEU_printf("%04x\n",ass);
}
static void StateRestore(int version)

357
src/boards/onebus.cpp
View File

@ -17,140 +17,161 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* OneBus system
* VR02/VT03 Console and OneBus System
*
* Street Dance (Dance pad) (Unl)
* 101-in-1 Arcade Action II
* DreamGEAR 75-in-1
* DreamGEAR 75-in-1, etc.
*
*/
#include "mapinc.h"
static uint8 isDance;
static uint8 regs[16],regc[6];
static uint8 IRQCount,IRQLatch,IRQa, IRQReload, pcm_enable = 0, pcm_irq = 0;
// General Purpose Registers
static uint8 cpu410x[16], ppu201x[16], apu40xx[64];
// IRQ Registers
static uint8 IRQCount, IRQa, IRQReload;
#define IRQLatch cpu410x[0x1]
// MMC3 Registers
static uint8 inv_hack = 0; // some OneBus Systems have swapped PRG reg commans in MMC3 inplementation,
// trying to autodetect unusual behavior, due not to add a new mapper.
#define mmc3cmd cpu410x[0x5]
#define mirror cpu410x[0x6]
// APU Registers
static uint8 pcm_enable = 0, pcm_irq = 0;
static int16 pcm_addr, pcm_size, pcm_latch, pcm_clock = 0xF6;
static writefunc old4011write, old4012write, old4013write, old4015write;
static readfunc old4015read;
static writefunc defapuwrite[64];
static readfunc defapuread[64];
static SFORMAT StateRegs[]=
{
{regc, 6, "REGC"},
{regs, 16, "REGS"},
{cpu410x, 16, "REGC"},
{ppu201x, 16, "REGS"},
{apu40xx, 64, "REGA"},
{&IRQReload, 1, "IRQR"},
{&IRQCount, 1, "IRQC"},
{&IRQLatch, 1, "IRQL"},
{&IRQa, 1, "IRQA"},
{&pcm_enable, 1, "PCME"},
{&pcm_irq, 1, "PCMIRQ"},
{&pcm_addr, 2, "PCMADDR"},
{&pcm_size, 2, "PCMSIZE"},
{&pcm_latch, 2, "PCMLATCH"},
{&pcm_clock, 2, "PCMCLOCK"},
{&pcm_irq, 1, "PCMI"},
{&pcm_addr, 2, "PCMA"},
{&pcm_size, 2, "PCMS"},
{&pcm_latch, 2, "PCML"},
{&pcm_clock, 2, "PCMC"},
{0}
};
static void Sync(void)
static void PSync(void)
{
uint16 cswap = (regs[0xf] & 0x80) << 5;
uint16 pswap = (regs[0xd]&1)?((regs[0xf] & 0x40) << 8):0;
uint16 pbase = (regs[0]&0xf0)<<4;
uint16 cbase = (((regs[0]&0x0f)<<8)|(regs[0xc]<<1)|((regs[0xd]&0xf8)>>3))<<3;
uint16 pmask = 0x3f>>(regs[0xb]&0xf);
uint8 bankmode = cpu410x[0xb] & 7;
uint8 mask = (bankmode == 0x7)?(0xff):(0x3f >> bankmode);
uint32 block = ((cpu410x[0x0] & 0xf0) << 4) + (cpu410x[0xa] & (~mask));
uint32 pswap = (mmc3cmd & 0x40) << 8;
setchr1(cswap^0x0000,cbase|(regc[0]&(~1)));
setchr1(cswap^0x0400,cbase|(regc[0]|1));
setchr1(cswap^0x0800,cbase|(regc[1]&(-1)));
setchr1(cswap^0x0c00,cbase|(regc[1]|1));
setchr1(cswap^0x1000,cbase|(regc[2]));
setchr1(cswap^0x1400,cbase|(regc[3]));
setchr1(cswap^0x1800,cbase|(regc[4]));
setchr1(cswap^0x1c00,cbase|(regc[5]));
// uint8 bank0 = (cpu410x[0xb] & 0x40)?(~1):(cpu410x[0x7]);
// uint8 bank1 = cpu410x[0x8];
// uint8 bank2 = (cpu410x[0xb] & 0x40)?(cpu410x[0x9]):(~1);
// uint8 bank3 = ~0;
uint8 bank0 = cpu410x[0x7^inv_hack];
uint8 bank1 = cpu410x[0x8^inv_hack];
uint8 bank2 = (cpu410x[0xb] & 0x40)?(cpu410x[0x9]):(~1);
uint8 bank3 = ~0;
if(regs[0xd]&2)
{
setprg8(pswap^0x8000, pbase|(regs[0x7]&pmask)|(regs[0xa]&(~pmask)));
setprg8( 0xA000, pbase|(regs[0x8]&pmask)|(regs[0xa]&(~pmask)));
setprg8(pswap^0xC000, pbase|(regs[0x9]&pmask)|(regs[0xa]&(~pmask)));
setprg8( 0xE000, pbase|regs[0xa]);
}
else
{
setprg8(pswap^0x8000, pbase|(regs[0x7]&pmask)|(regs[0xa]&(~pmask)));
setprg8( 0xA000, pbase|(regs[0x8]&pmask)|(regs[0xa]&(~pmask)));
setprg8(pswap^0xC000, pbase|((~1)&pmask)|(regs[0xa]&(~pmask)));
setprg8( 0xE000, pbase|((~0)&pmask)|(regs[0xa]&(~pmask)));
}
setmirror(regs[0xe]);
// FCEU_printf(" PRG: %04x [%02x]",0x8000^pswap,block | (bank0 & mask));
setprg8(0x8000^pswap, block | (bank0 & mask));
// FCEU_printf(" %04x [%02x]",0xa000^pswap,block | (bank1 & mask));
setprg8(0xa000, block | (bank1 & mask));
// FCEU_printf(" %04x [%02x]",0xc000^pswap,block | (bank2 & mask));
setprg8(0xc000^pswap, block | (bank2 & mask));
// FCEU_printf(" %04x [%02x]\n",0xe000^pswap,block | (bank3 & mask));
setprg8(0xe000, block | (bank3 & mask));
}
static DECLFW(UNLOneBusWrite20XX)
static void CSync(void)
{
// FCEU_printf("PPU %04x:%04x\n",A,V);
if(A == 0x201A)
regs[0xd] = V;
else if(A == 0x2018)
regs[0xc] = V;
static const uint8 midx[8] = {0, 1, 2, 0, 3, 4, 5, 0 };
uint8 mask = 0xff >> midx[ppu201x[0xa] & 7];
uint32 block = ((cpu410x[0x0] & 0x0f) << 11) + ((ppu201x[0x8] & 0x70) << 4) + (ppu201x[0xa] & (~mask));
uint32 cswap = (mmc3cmd & 0x80) << 5;
uint8 bank0 = ppu201x[0x6]&(~1);
uint8 bank1 = ppu201x[0x6]|1;
uint8 bank2 = ppu201x[0x7]&(~1);
uint8 bank3 = ppu201x[0x7]|1;
uint8 bank4 = ppu201x[0x2];
uint8 bank5 = ppu201x[0x3];
uint8 bank6 = ppu201x[0x4];
uint8 bank7 = ppu201x[0x5];
setchr1(0x0000^cswap, block | (bank0 & mask));
setchr1(0x0400^cswap, block | (bank1 & mask));
setchr1(0x0800^cswap, block | (bank2 & mask));
setchr1(0x0c00^cswap, block | (bank3 & mask));
setchr1(0x1000^cswap, block | (bank4 & mask));
setchr1(0x1400^cswap, block | (bank5 & mask));
setchr1(0x1800^cswap, block | (bank6 & mask));
setchr1(0x1c00^cswap, block | (bank7 & mask));
setmirror((mirror & 1) ^ 1);
}
static void Sync(void)
{
PSync();
CSync();
}
static DECLFW(UNLOneBusWriteCPU410X)
{
// FCEU_printf("CPU %04x:%04x\n",A,V);
switch(A & 0xf)
{
case 0x1: IRQLatch = V & 0xfe; break;
case 0x2: IRQReload = 1; break;
case 0x3: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break;
case 0x4: IRQa = 1; break;
default:
cpu410x[A & 0xf] = V;
Sync();
}
}
static DECLFW(UNLOneBusWritePPU201X)
{
// FCEU_printf("PPU %04x:%04x\n",A,V);
ppu201x[A & 0x0f] = V;
Sync();
}
static DECLFW(UNLOneBusWriteExp)
static DECLFW(UNLOneBusWriteMMC3)
{
// FCEU_printf("EXP %04x:%04x\n",A,V);
// switch(A & 0x0F)
// {
// case 2: pcm_latch = pcm_clock; FCEU_printf("write %04x:%04x\n",A,V); break;
// case 3: pcm_irqa = 0; X6502_IRQEnd(FCEU_IQEXT); pcm_irq = 0; FCEU_printf("write %04x:%04x\n",A,V); break;
// case 4: pcm_irqa = 1; FCEU_printf("write %04x:%04x\n",A,V); break;
// default:
regs[A & 0x0F] = V;
Sync();
// }
}
static DECLFW(UNLOneBusWriteDebug)
{
// FCEU_printf("write %04x:%04x\n",A,V);
}
static DECLFW(UNLOneBusWriteMMC)
{
// FCEU_printf("MMC %04x:%04x\n",A,V);
switch(A&0xE001)
// FCEU_printf("MMC %04x:%04x\n",A,V);
switch(A&0xe001)
{
case 0x8000: regs[0xf] = V; Sync(); break;
case 0x8000: mmc3cmd = (mmc3cmd & 0x38) | (V & 0xc7); Sync(); break;
case 0x8001:
{
uint8 mask = 0xff, mmc3cmd = regs[0xf]&7;
switch(mmc3cmd)
switch(mmc3cmd & 7)
{
case 0:
case 1:
case 2:
case 3:
case 4:
case 5:
if(regs[0xd]&4)
mask = 0x0f;
else
mask >>= ((regs[0xb]&0xf0)>>4);
regc[mmc3cmd] = V&mask;
break;
case 6:
case 7:
mask = (mask&0x3f)>>(regs[0xb]&0xf);
regs[mmc3cmd+1] = (regs[mmc3cmd+1]&(~mask))|(V&mask);
break;
case 0: ppu201x[0x6] = V; CSync(); break;
case 1: ppu201x[0x7] = V; CSync(); break;
case 2: ppu201x[0x2] = V; CSync(); break;
case 3: ppu201x[0x3] = V; CSync(); break;
case 4: ppu201x[0x4] = V; CSync(); break;
case 5: ppu201x[0x5] = V; CSync(); break;
case 6: cpu410x[0x7] = V; PSync(); break;
case 7: cpu410x[0x8] = V; PSync(); break;
}
Sync();
break;
}
case 0xA000: regs[0xe] = (V & 1)^1; Sync(); break;
case 0xC000: IRQLatch = V&0xfe; break;
case 0xC001: IRQReload = 1; break;
case 0xE000: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break;
case 0xE001: IRQa = 1; break;
case 0xa000: mirror = V; CSync(); break;
case 0xc000: IRQLatch = V & 0xfe; break;
case 0xc001: IRQReload = 1; break;
case 0xe000: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break;
case 0xe001: IRQa = 1; break;
}
}
@ -171,44 +192,51 @@ static void UNLOneBusIRQHook(void)
}
}
static DECLFW(UNLOneBusWriteAPU2)
static DECLFW(UNLOneBusWriteAPU40XX)
{
// FCEU_printf("APU2 %04x:%04x\n",A,V);
CartBW(A&0xffdf,V);
}
static DECLFW(UNLOneBusWrite4012)
{
// FCEU_printf("write %04x:%04x\n",A,V);
pcm_addr = V << 6;
old4012write(A,V);
}
static DECLFW(UNLOneBusWrite4013)
{
// FCEU_printf("write %04x:%04x\n",A,V);
pcm_size = (V << 4) + 1;
old4013write(A,V);
}
static DECLFW(UNLOneBusWrite4015)
{
// FCEU_printf("write %04x:%04x\n",A,V);
pcm_enable = V&0x10;
if(pcm_irq)
// FCEU_printf("APU %04x:%04x\n",A,V);
apu40xx[A & 0x3f] = V;
switch(A & 0x3f)
{
X6502_IRQEnd(FCEU_IQEXT);
pcm_irq = 0;
case 0x12:
if(apu40xx[0x30] & 0x10)
{
pcm_addr = V << 6;
}
case 0x13:
if(apu40xx[0x30] & 0x10)
{
pcm_size = (V << 4) + 1;
}
case 0x15:
if(apu40xx[0x30] & 0x10)
{
pcm_enable = V&0x10;
if(pcm_irq)
{
X6502_IRQEnd(FCEU_IQEXT);
pcm_irq = 0;
}
if(pcm_enable)
pcm_latch = pcm_clock;
V &= 0xef;
}
}
if(pcm_enable)
pcm_latch = pcm_clock;
old4015write(A,V&0xEF);
defapuwrite[A & 0x3f](A, V);
}
static DECLFR(UNLOneBusRead4015)
static DECLFR(UNLOneBusReadAPU40XX)
{
uint8 result = (old4015read(A) & 0x7F)|pcm_irq;
// FCEU_printf("read %04x, %02x\n",A,result);
uint8 result = defapuread[A & 0x3f](A);
// FCEU_printf("read %04x, %02x\n",A,result);
switch(A & 0x3f)
{
case 0x15:
if(apu40xx[0x30] & 0x10)
{
result = (result & 0x7f) | pcm_irq;
}
}
return result;
}
@ -230,7 +258,7 @@ static void UNLOneBusCpuHook(int a)
else
{
uint8 raw_pcm = ARead[pcm_addr](pcm_addr) >> 1;
old4011write(0x4011,raw_pcm);
defapuwrite[0x11](0x4011,raw_pcm);
pcm_addr++;
pcm_addr&=0x7FFF;
}
@ -240,43 +268,39 @@ static void UNLOneBusCpuHook(int a)
static void UNLOneBusPower(void)
{
IRQCount=IRQLatch=IRQa==0;
regs[0]=regs[1]=regs[1]=regs[2]=regs[3]=regs[4]=regs[5]=regs[6]=0;
regs[7]=regs[8]=regs[11]=regs[12]=regs[13]=regs[14]=regs[15]=0;
regs[0x09]=0x3E;
regs[0x0A]=0x3F;
uint32 i;
IRQReload = IRQCount = IRQa = 0;
SetupCartCHRMapping(0,PRGptr[0],4096 * 1024,0);
memset(cpu410x, 0x00, sizeof(cpu410x));
memset(ppu201x, 0x00, sizeof(ppu201x));
memset(apu40xx, 0x00, sizeof(apu40xx));
if(isDance) // quick workaround, TODO: figure out how it works together
SetupCartCHRMapping(0, PRGptr[0], PRGsize[0], 0);
for(i=0; i<64; i++)
{
old4015read=GetReadHandler(0x4015);
SetReadHandler(0x4015,0x4015,UNLOneBusRead4015);
old4011write=GetWriteHandler(0x4011);
old4012write=GetWriteHandler(0x4012);
SetWriteHandler(0x4012,0x4012,UNLOneBusWrite4012);
old4013write=GetWriteHandler(0x4013);
SetWriteHandler(0x4013,0x4013,UNLOneBusWrite4013);
old4015write=GetWriteHandler(0x4015);
SetWriteHandler(0x4015,0x4015,UNLOneBusWrite4015);
defapuread[i] = GetReadHandler(0x4000|i);
defapuwrite[i] = GetWriteHandler(0x4000|i);
}
SetReadHandler(0x4000,0x403f,UNLOneBusReadAPU40XX);
SetWriteHandler(0x4000,0x403f,UNLOneBusWriteAPU40XX);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x2009,0x2fff,UNLOneBusWrite20XX);
// SetWriteHandler(0x4020,0xffff,UNLOneBusWriteDebug);
// SetWriteHandler(0x4020,0x4040,UNLOneBusWriteAPU2);
SetWriteHandler(0x4100,0x410f,UNLOneBusWriteExp);
SetWriteHandler(0x8000,0xefff,UNLOneBusWriteMMC);
SetWriteHandler(0x2010,0x201f,UNLOneBusWritePPU201X);
SetWriteHandler(0x4100,0x410f,UNLOneBusWriteCPU410X);
SetWriteHandler(0x8000,0xffff,UNLOneBusWriteMMC3);
Sync();
}
static void UNLOneBusReset(void)
{
IRQCount=IRQLatch=IRQa=0;
regs[0]=regs[1]=regs[1]=regs[2]=regs[3]=regs[4]=regs[5]=regs[6]=0;
regs[7]=regs[8]=regs[11]=regs[12]=regs[13]=regs[14]=regs[15]=0;
regs[0x09]=0x3E;
regs[0x0A]=0x3F;
IRQReload = IRQCount = IRQa = 0;
memset(cpu410x, 0x00, sizeof(cpu410x));
memset(ppu201x, 0x00, sizeof(ppu201x));
memset(apu40xx, 0x00, sizeof(apu40xx));
Sync();
}
@ -287,20 +311,13 @@ static void StateRestore(int version)
void UNLOneBus_Init(CartInfo *info)
{
isDance = 0;
info->Power=UNLOneBusPower;
info->Reset=UNLOneBusReset;
GameHBIRQHook=UNLOneBusIRQHook;
// MapIRQHook=UNLOneBusCpuHook;
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
}
void UNLDANCE_Init(CartInfo *info)
{
isDance = 1;
info->Power=UNLOneBusPower;
info->Reset=UNLOneBusReset;
if(((*(uint32*)&(info->MD5)) == 0x305fcdc3) || // PowerJoy Supermax Carts
((*(uint32*)&(info->MD5)) == 0x6abfce8e) )
inv_hack = 0xf;
GameHBIRQHook=UNLOneBusIRQHook;
MapIRQHook=UNLOneBusCpuHook;
GameStateRestore=StateRestore;

3
src/boards/sl1632.cpp
View File

@ -25,7 +25,7 @@
static uint8 chrcmd[8], prg0, prg1, bbrk, mirr, swap;
static SFORMAT StateRegs[]=
{
{chrcmd, 8, "CHRCMD"},
{chrcmd, 8, "CHRC"},
{&prg0, 1, "PRG0"},
{&prg1, 1, "PRG1"},
{&bbrk, 1, "BRK"},
@ -110,7 +110,6 @@ static void StateRestore(int version)
static void UNLSL1632Power(void)
{
GenMMC3Power();
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x4100,0xFFFF,UNLSL1632CMDWrite);
}

2
src/boards/smb2j.cpp
View File

@ -18,6 +18,8 @@
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
* Super Mario Bros 2 J alt version
* as well as "Voleyball" FDS conversion, bank layot is similar but no bankswitching and CHR ROM present
*
* mapper seems wrongly researched by me ;( it should be mapper 43 modification
*/
#include "mapinc.h"

20
src/boards/subor.cpp
View File

@ -1,3 +1,23 @@
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 2005 CaH4e3
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "mapinc.h"
static uint8 mode;

4
src/boards/t-262.cpp
View File

@ -25,8 +25,8 @@ static uint8 datareg;
static uint8 busy;
static SFORMAT StateRegs[]=
{
{&addrreg, 2, "ADDRREG"},
{&datareg, 1, "DATAREG"},
{&addrreg, 2, "AREG"},
{&datareg, 1, "DREG"},
{&busy, 1, "BUSY"},
{0}
};

8
src/boards/tengen.cpp
View File

@ -104,7 +104,7 @@ static DECLFW(RAMBO1_write)
switch(A&0xF001)
{
case 0xa000: mir=V&1;
// if(!nomirror)
// if(!nomirror)
setmirror(mir^1);
break;
case 0x8000: cmd = V;
@ -138,7 +138,7 @@ static DECLFW(RAMBO1_write)
static void RAMBO1_Restore(int version)
{
Synco();
// if(!nomirror)
// if(!nomirror)
setmirror(mir^1);
}
@ -148,7 +148,7 @@ static void RAMBO1_init(void)
for(x=0;x<11;x++)
DRegs[x]=~0;
cmd=mir=0;
// if(!nomirror)
// if(!nomirror)
setmirror(1);
Synco();
GameHBIRQHook=RAMBO1_hb;
@ -166,7 +166,7 @@ static void CHRWrap(unsigned int A, unsigned int V)
void Mapper64_init(void)
{
setchr1wrap=CHRWrap;
// nomirror=0;
// nomirror=0;
RAMBO1_init();
}
/*

4
src/boards/tf-1201.cpp
View File

@ -35,8 +35,8 @@ static SFORMAT StateRegs[]=
{&mirr, 1, "MIRR"},
{&swap, 1, "SWAP"},
{chr, 8, "CHR"},
{&IRQCount, 1, "IRQCOUNT"},
{&IRQPre, 1, "IRQPRE"},
{&IRQCount, 1, "IRQC"},
{&IRQPre, 1, "IRQP"},
{&IRQa, 1, "IRQA"},
{0}
};

5
src/ines.cpp
View File

@ -612,7 +612,8 @@ static BMAPPINGLocal bmap[] = {
{"", 154, Mapper154_Init},
{"", 155, Mapper155_Init},
{"", 156, Mapper156_Init},
{"", 159, Mapper159_Init},
{"", 157, Mapper157_Init},
{"", 159, Mapper16_Init}, // Obsolete, remove me!
{"SA009", 160, SA009_Init},
{"", 162, UNLFS304_Init},
{"", 163, Mapper163_Init},
@ -1216,7 +1217,7 @@ void (*MapInitTab[256])(void)=
0, //Mapper154_init,
0,
0,
Mapper157_init,
0, //Mapper157_init,
0, //Mapper158_init, removed
0,
0,

3
src/ines.h
View File

@ -281,7 +281,7 @@ void Mapper151_init(void);
//void Mapper152_init(void);
//void Mapper153_init(void);
void Mapper154_init(void);
void Mapper157_init(void);
//void Mapper157_init(void);
//void Mapper158_init(void);
void Mapper159_init(void);
void Mapper160_init(void);
@ -421,6 +421,7 @@ void Mapper153_Init(CartInfo *);
void Mapper154_Init(CartInfo *);
void Mapper155_Init(CartInfo *);
void Mapper156_Init(CartInfo *);
void Mapper157_Init(CartInfo *);
void Mapper159_Init(CartInfo *);
void Mapper163_Init(CartInfo *);
void Mapper164_Init(CartInfo *);

303
src/mappers/16.cpp
View File

@ -1,303 +0,0 @@
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 1998 BERO
* Copyright (C) 2002 Xodnizel
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "mapinc.h"
static void BandaiIRQHook(int a)
{
if(IRQa)
{
IRQCount-=a;
if(IRQCount<0)
{
X6502_IRQBegin(FCEU_IQEXT);
//printf("IRQ: %d, %d\n",scanline,timestamp);
IRQa=0;
IRQCount=0xFFFF;
}
}
}
static DECLFW(Mapper16_write)
{
A&=0xF;
if(A<=0x7)
VROM_BANK1(A<<10,V);
else if(A==0x8)
ROM_BANK16(0x8000,V);
else switch(A) {
case 0x9: switch(V&3) {
case 0x00:MIRROR_SET2(1);break;
case 0x01:MIRROR_SET2(0);break;
case 0x02:onemir(0);break;
case 0x03:onemir(1);break;
}
break;
case 0xA:X6502_IRQEnd(FCEU_IQEXT);
IRQa=V&1;
IRQCount=IRQLatch;
break;
case 0xB:IRQLatch&=0xFF00; IRQLatch|=V;
break;
case 0xC:IRQLatch&=0xFF; IRQLatch|=V<<8;
break;
case 0xD: break;/* Serial EEPROM control port */
}
}
// Famicom jump 2:
// 0-7: Lower bit of data selects which 256KB PRG block is in use.
// This seems to be a hack on the developers' part, so I'll make emulation
// of it a hack(I think the current PRG block would depend on whatever the
// lowest bit of the CHR bank switching register that corresponds to the
// last CHR address read).
/*
static void PRGO(void)
{
uint32 base=(mapbyte1[0]&1)<<4;
ROM_BANK16(0x8000,(mapbyte2[0]&0xF)|base);
ROM_BANK16(0xC000,base|0xF);
}
static DECLFW(Mapper153_write)
{
A&=0xF;
if(A<=0x7)
{
mapbyte1[A&7]=V;
PRGO();
}
else if(A==0x8)
{
mapbyte2[0]=V;
PRGO();
}
else switch(A) {
case 0x9: switch(V&3) {
case 0x00:MIRROR_SET2(1);break;
case 0x01:MIRROR_SET2(0);break;
case 0x02:onemir(0);break;
case 0x03:onemir(1);break;
}
break;
case 0xA:X6502_IRQEnd(FCEU_IQEXT);
IRQa=V&1;
IRQCount=IRQLatch;
break;
case 0xB:IRQLatch&=0xFF00;
IRQLatch|=V;
break;
case 0xC:IRQLatch&=0xFF;
IRQLatch|=V<<8;
break;
}
}*/
//void Mapper16_init(void)
//{
// MapIRQHook=BandaiIRQHook;
//SetWriteHandler(0x6000,0xFFFF,Mapper16_write);
//}
//void Mapper153_init(void)
//{
// MapIRQHook=BandaiIRQHook;
// SetWriteHandler(0x8000,0xFFFF,Mapper153_write);
/* This mapper/board seems to have WRAM at $6000-$7FFF, so I'll let the
main ines code take care of that memory region. */
//}
static uint8 BarcodeData[256];
static int BarcodeReadPos;
static int BarcodeCycleCount;
static uint32 BarcodeOut;
int FCEUI_DatachSet(const uint8 *rcode)
{
int prefix_parity_type[10][6] = {
{0,0,0,0,0,0}, {0,0,1,0,1,1}, {0,0,1,1,0,1}, {0,0,1,1,1,0},
{0,1,0,0,1,1}, {0,1,1,0,0,1}, {0,1,1,1,0,0}, {0,1,0,1,0,1},
{0,1,0,1,1,0}, {0,1,1,0,1,0}
};
int data_left_odd[10][7] = {
{0,0,0,1,1,0,1}, {0,0,1,1,0,0,1}, {0,0,1,0,0,1,1}, {0,1,1,1,1,0,1},
{0,1,0,0,0,1,1}, {0,1,1,0,0,0,1}, {0,1,0,1,1,1,1}, {0,1,1,1,0,1,1},
{0,1,1,0,1,1,1}, {0,0,0,1,0,1,1}
};
int data_left_even[10][7] = {
{0,1,0,0,1,1,1}, {0,1,1,0,0,1,1}, {0,0,1,1,0,1,1}, {0,1,0,0,0,0,1},
{0,0,1,1,1,0,1}, {0,1,1,1,0,0,1}, {0,0,0,0,1,0,1}, {0,0,1,0,0,0,1},
{0,0,0,1,0,0,1}, {0,0,1,0,1,1,1}
};
int data_right[10][7] = {
{1,1,1,0,0,1,0}, {1,1,0,0,1,1,0}, {1,1,0,1,1,0,0}, {1,0,0,0,0,1,0},
{1,0,1,1,1,0,0}, {1,0,0,1,1,1,0}, {1,0,1,0,0,0,0}, {1,0,0,0,1,0,0},
{1,0,0,1,0,0,0}, {1,1,1,0,1,0,0}
};
uint8 code[13+1];
uint32 tmp_p=0;
int i, j;
int len;
for(i=len=0;i<13;i++)
{
if(!rcode[i]) break;
if((code[i]=rcode[i]-'0') > 9)
return(0);
len++;
}
if(len!=13 && len!=12 && len!=8 && len!=7) return(0);
#define BS(x) BarcodeData[tmp_p]=x;tmp_p++
for(j=0;j<32;j++)
{
BS(0x00);
}
/* Left guard bars */
BS(1); BS(0); BS(1);
if(len==13 || len==12)
{
uint32 csum;
for(i=0;i<6;i++)
if(prefix_parity_type[code[0]][i])
{
for(j=0;j<7;j++)
{
BS(data_left_even[code[i+1]][j]);
}
}
else
for(j=0;j<7;j++)
{
BS(data_left_odd[code[i+1]][j]);
}
/* Center guard bars */
BS(0); BS(1); BS(0); BS(1); BS(0);
for(i=7;i<12;i++)
for(j=0;j<7;j++)
{
BS(data_right[code[i]][j]);
}
csum=0;
for(i=0;i<12;i++) csum+=code[i]*((i&1)?3:1);
csum=(10-(csum%10))%10;
//printf("%d\n",csum);
for(j=0;j<7;j++)
{
BS(data_right[csum][j]);
}
}
else if(len==8 || len==7)
{
uint32 csum=0;
for(i=0;i<7;i++) csum+=(i&1)?code[i]:(code[i]*3);
csum=(10-(csum%10))%10;
for(i=0;i<4;i++)
for(j=0;j<7;j++)
{
BS(data_left_odd[code[i]][j]);
}
/* Center guard bars */
BS(0); BS(1); BS(0); BS(1); BS(0);
for(i=4;i<7;i++)
for(j=0;j<7;j++)
{
BS(data_right[code[i]][j]);
}
for(j=0;j<7;j++)
{ BS(data_right[csum][j]);}
}
/* Right guard bars */
BS(1); BS(0); BS(1);
for(j=0;j<32;j++)
{
BS(0x00);
}
BS(0xFF);
#undef BS
BarcodeReadPos=0;
BarcodeOut=0x8;
BarcodeCycleCount=0;
return(1);
}
static void BarcodeIRQHook(int a)
{
BandaiIRQHook(a);
BarcodeCycleCount+=a;
if(BarcodeCycleCount >= 1000)
{
BarcodeCycleCount -= 1000;
if(BarcodeData[BarcodeReadPos]==0xFF)
{
BarcodeOut=0;
}
else
{
BarcodeOut=(BarcodeData[BarcodeReadPos]^1)<<3;
BarcodeReadPos++;
}
}
}
static DECLFR(Mapper157_read)
{
uint8 ret;
ret=BarcodeOut;
return(ret);
}
void Mapper157_init(void)
{
GameInfo->cspecial = SIS_DATACH;
MapIRQHook=BarcodeIRQHook;
SetWriteHandler(0x6000,0xFFFF,Mapper16_write);
SetReadHandler(0x6000,0x7FFF,Mapper157_read);
BarcodeData[0]=0xFF;
BarcodeReadPos=0;
BarcodeOut=0;
BarcodeCycleCount=0;
}

207
src/unif.cpp
View File

@ -317,133 +317,112 @@ static int LoadCHR(FCEUFILE *fp)
static BMAPPING bmap[] = {
/* Sachen Carts */
{ "TC-U01-1.5M", TCU01_Init,0},
{ "13in1JY110", BMC13in1JY110_Init, 0},
{ "190in1", BMC190in1_Init, 0},
{ "22211", UNL22211_Init,0},
{ "3D-BLOCK", UNL3DBlock_Init, 0},
{ "411120-C",BMC411120C_Init, 0},
{ "603-5052", UNL6035052_Init,0},
{ "64in1NoRepeat", BMC64in1nr_Init, 0},
{ "70in1", BMC70in1_Init, 0},
{ "70in1B", BMC70in1B_Init, 0},
{ "8157", UNL8157_Init,0},
{ "8237", UNL8237_Init,0},
{ "8237A", UNL8237A_Init,0},
{ "830118C",BMC830118C_Init, 0},
{ "A65AS", BMCA65AS_Init,0},
{ "ANROM", ANROM_Init,0},
{ "AX5705", UNLAX5705_Init, 0},
{ "BS-5",BMCBS5_Init, 0},
{ "C-N22M", UNLCN22M_Init,0},
{ "CC-21", UNLCC21_Init,0},
{ "CITYFIGHT", UNLCITYFIGHT_Init, 0},
{ "CNROM", CNROM_Init,0},
{ "CPROM", CPROM_Init,BMCFLAG_16KCHRR},
{ "D1038", BMCD1038_Init, 0},
{ "DREAMTECH01", DreamTech01_Init,0},
{ "EDU2000", UNLEDU2000_Init,0},
{ "EKROM", EKROM_Init,0},
{ "ELROM", ELROM_Init,0},
{ "ETROM", ETROM_Init,0},
{ "EWROM", EWROM_Init,0},
{ "FK23C", BMCFK23C_Init,0},
{ "FK23C", BMCFK23C_Init,BMCFLAG_EXPCHRR},
{ "FK23CA", BMCFK23CA_Init,BMCFLAG_EXPCHRR},
{ "FS304", UNLFS304_Init,0},
{ "GK-192", BMCGK192_Init, 0},
{ "GS-2004", BMCGS2004_Init, 0},
{ "GS-2013", BMCGS2013_Init, 0},
{ "Ghostbusters63in1", BMCGhostbusters63in1_Init, 0},
{ "H2288", UNLH2288_Init,0},
{ "HKROM", HKROM_Init,0},
{ "KOF97", UNLKOF97_Init,0},
{ "KONAMI-QTAI", Mapper190_Init,0},
{ "KS7032", UNLKS7032_Init, 0},
{ "KS7057", UNLKS7057_Init, 0},
{ "MARIO1-MALEE2", MALEE_Init,0},
{ "MHROM", MHROM_Init,0},
{ "N625092", UNLN625092_Init,0},
{ "NROM", NROM_Init,0 },
{ "NROM-128", NROM_Init,0 },
{ "NROM-256", NROM_Init,0 },
{ "NTBROM", Mapper68_Init,0},
{ "NovelDiamond9999999in1", Novel_Init,0},
{ "OneBus", UNLOneBus_Init,0},
{ "RROM", NROM_Init,0 },
{ "RROM-128", NROM_Init,0 },
{ "SA-002", TCU02_Init, 0},
{ "SA-0036", SA0036_Init,0},
{ "SA-0037", SA0037_Init,0},
{ "SA-009", SA009_Init,0},
{ "SA-016-1M", SA0161M_Init,0},
{ "SA-72007", SA72007_Init,0},
{ "SA-72008", SA72008_Init,0},
{ "SA-NROM", TCA01_Init,0},
{ "SAROM", SAROM_Init,0},
{ "SBROM", SBROM_Init,0},
{ "SC-127", UNLSC127_Init,0},
{ "SCROM", SCROM_Init,0},
{ "SEROM", SEROM_Init,0},
{ "SGROM", SGROM_Init,0},
{ "SHERO", UNLSHeroes_Init,0},
{ "SKROM", SKROM_Init,0},
{ "SL1632", UNLSL1632_Init,0},
{ "SL1ROM", SL1ROM_Init,0},
{ "SLROM", SLROM_Init,0},
{ "SMB2J", UNLSMB2J_Init, 0},
{ "SNROM", SNROM_Init,0},
{ "SOROM", SOROM_Init,0},
{ "SUNSOFT_UNROM", SUNSOFT_UNROM_Init,0},
{ "Sachen-74LS374N", S74LS374N_Init,0},
{ "Sachen-74LS374NA", S74LS374NA_Init,0}, //seems to be custom mapper
{ "Sachen-8259A", S8259A_Init,0},
{ "Sachen-8259B", S8259B_Init,0},
{ "Sachen-8259C", S8259C_Init,0},
{ "Sachen-8259D", S8259D_Init,0},
{ "Sachen-74LS374N", S74LS374N_Init,0},
{ "Sachen-74LS374NA", S74LS374NA_Init,0}, //seems to be custom mapper
{ "SA-002", TCU02_Init, 0},
{ "SA-016-1M", SA0161M_Init,0},
{ "SA-72007", SA72007_Init,0},
{ "SA-72008", SA72008_Init,0},
{ "SA-009", SA009_Init,0},
{ "SA-0036", SA0036_Init,0},
{ "SA-0037", SA0037_Init,0},
{ "SA-NROM", TCA01_Init,0},
// /* AVE carts. */
// { "MB-91", MB91_Init,0}, // DeathBots
// { "NINA-06", NINA06_Init,0}, // F-15 City War
// { "NINA-03", NINA03_Init,0}, // Tiles of Fate
// { "NINA-001", NINA001_Init,0}, // Impossible Mission 2
{ "ANROM", ANROM_Init,0},
{ "HKROM", HKROM_Init,0},
{ "EWROM", EWROM_Init,0},
{ "EKROM", EKROM_Init,0},
{ "ELROM", ELROM_Init,0},
{ "ETROM", ETROM_Init,0},
{ "SAROM", SAROM_Init,0},
{ "SBROM", SBROM_Init,0},
{ "SCROM", SCROM_Init,0},
{ "SEROM", SEROM_Init,0},
{ "SGROM", SGROM_Init,0},
{ "SKROM", SKROM_Init,0},
{ "SLROM", SLROM_Init,0},
{ "SL1ROM", SL1ROM_Init,0},
{ "SNROM", SNROM_Init,0},
{ "SOROM", SOROM_Init,0},
{ "TGROM", TGROM_Init,0},
{ "TR1ROM", TFROM_Init,BMCFLAG_FORCE4},
{ "Super24in1SC03", Super24_Init,0},
{ "SuperHIK8in1", Mapper45_Init,0},
{ "Supervision16in1", Supervision16_Init,0},
{ "T-227-1",BMCT2271_Init,0},
{ "T-230", UNLT230_Init, 0},
{ "T-262", BMCT262_Init,0},
{ "TBROM", TBROM_Init,0},
{ "TC-U01-1.5M", TCU01_Init,0},
{ "TEK90", Mapper90_Init,0},
{ "TEROM", TEROM_Init,0},
{ "TF1201", UNLTF1201_Init, 0},
{ "TFROM", TFROM_Init,0},
{ "TLROM", TLROM_Init,0},
{ "TGROM", TGROM_Init,0},
{ "TKROM", TKROM_Init,0},
{ "TSROM", TSROM_Init,0},
{ "TLSROM", TLSROM_Init,0},
{ "TKSROM", TKSROM_Init,0},
{ "TLROM", TLROM_Init,0},
{ "TLSROM", TLSROM_Init,0},
{ "TQROM", TQROM_Init,0},
{ "TR1ROM", TFROM_Init,BMCFLAG_FORCE4},
{ "TSROM", TSROM_Init,0},
{ "TVROM", TLROM_Init,BMCFLAG_FORCE4},
{ "NTBROM", Mapper68_Init,0},
{ "CPROM", CPROM_Init,BMCFLAG_16KCHRR},
{ "CNROM", CNROM_Init,0},
{ "NROM", NROM_Init,0 }, //NROM256_Init,0 },
{ "NROM-128", NROM_Init,0 }, //NROM128_Init,0 },
{ "NROM-256", NROM_Init,0 }, //NROM256_Init,0 },
{ "RROM", NROM_Init,0 }, //NROM128_Init,0 },
{ "RROM-128", NROM_Init,0 }, //NROM128_Init,0 },
{ "MHROM", MHROM_Init,0},
{ "UNROM", UNROM_Init,0},
{ "UOROM", UNROM_Init,0},
{ "SUNSOFT_UNROM", SUNSOFT_UNROM_Init,0},
{ "MARIO1-MALEE2", MALEE_Init,0},
{ "3D-BLOCK", UNL3DBlock_Init, 0},
{ "SMB2J", UNLSMB2J_Init, 0},
{ "AX5705", UNLAX5705_Init, 0},
{ "CC-21", UNLCC21_Init,0},
{ "H2288", UNLH2288_Init,0},
{ "KOF97", UNLKOF97_Init,0},
{ "SL1632", UNLSL1632_Init,0},
{ "SHERO", UNLSHeroes_Init,0},
{ "8237", UNL8237_Init,0},
{ "8237A", UNL8237A_Init,0},
{ "8157", UNL8157_Init,0},
{ "T-262", BMCT262_Init,0},
{ "FK23C", BMCFK23C_Init,0},
{ "FS304", UNLFS304_Init,0},
{ "A65AS", BMCA65AS_Init,0},
{ "C-N22M", UNLCN22M_Init,0},
{ "EDU2000", UNLEDU2000_Init,0},
{ "603-5052", UNL6035052_Init,0},
{ "N625092", UNLN625092_Init,0},
{ "Supervision16in1", Supervision16_Init,0},
{ "NovelDiamond9999999in1", Novel_Init,0},
{ "Super24in1SC03", Super24_Init,0},
{ "64in1NoRepeat", BMC64in1nr_Init, 0},
{ "13in1JY110", BMC13in1JY110_Init, 0},
{ "70in1", BMC70in1_Init, 0},
{ "70in1B", BMC70in1B_Init, 0},
{ "D1038", BMCD1038_Init, 0},
{ "GK-192", BMCGK192_Init, 0},
{ "SuperHIK8in1", Mapper45_Init,0},
{ "22211", UNL22211_Init,0},
{ "TF1201", UNLTF1201_Init, 0},
{ "GS-2004", BMCGS2004_Init, 0},
{ "GS-2013", BMCGS2013_Init, 0},
{ "KS7032", UNLKS7032_Init, 0},
{ "KS7057", UNLKS7057_Init, 0},
{ "T-230", UNLT230_Init, 0},
{ "CITYFIGHT", UNLCITYFIGHT_Init, 0},
{ "190in1", BMC190in1_Init, 0},
{ "Ghostbusters63in1", BMCGhostbusters63in1_Init, 0},
{ "BS-5",BMCBS5_Init, 0},
{ "411120-C",BMC411120C_Init, 0},
{ "830118C",BMC830118C_Init, 0},
{ "T-227-1",BMCT2271_Init,0},
{ "DREAMTECH01", DreamTech01_Init,0},
{ "KONAMI-QTAI", Mapper190_Init,0},
{ "DANCE", UNLDANCE_Init,0},
{ "OneBus", UNLOneBus_Init,0},
{ "SC-127", UNLSC127_Init,0},
{ "TEK90", Mapper90_Init,0},
{ "FK23C", BMCFK23C_Init,BMCFLAG_EXPCHRR},
{ "FK23CA", BMCFK23CA_Init,BMCFLAG_EXPCHRR},
{0,0,0}
};

154
src/unif.h
View File

@ -19,118 +19,104 @@
*/
void ANROM_Init(CartInfo *info);
void HKROM_Init(CartInfo *info);
void ETROM_Init(CartInfo *info);
void BMC13in1JY110_Init(CartInfo *info);
void BMC190in1_Init(CartInfo *info);
void BMC411120C_Init(CartInfo *info);
void BMC64in1nr_Init(CartInfo *info);
void BMC70in1B_Init(CartInfo *info);
void BMC70in1_Init(CartInfo *info);
void BMC830118C_Init(CartInfo *info);
void BMCA65AS_Init(CartInfo *info);
void BMCBS5_Init(CartInfo *info);
void BMCD1038_Init(CartInfo *info);
void BMCFK23CA_Init(CartInfo *info);
void BMCFK23C_Init(CartInfo *info);
void BMCGK192_Init(CartInfo *info);
void BMCGS2004_Init(CartInfo *info);
void BMCGS2013_Init(CartInfo *info);
void BMCGhostbusters63in1_Init(CartInfo *info);
void BMCT2271_Init(CartInfo *info);
void BMCT262_Init(CartInfo *info);
void CNROM_Init(CartInfo *info);
void CPROM_Init(CartInfo *info);
void DEIROM_Init(CartInfo *info);
void DreamTech01_Init(CartInfo *info);
void EKROM_Init(CartInfo *info);
void ELROM_Init(CartInfo *info);
void ETROM_Init(CartInfo *info);
void EWROM_Init(CartInfo *info);
void GNROM_Init(CartInfo *info);
void HKROM_Init(CartInfo *info);
void MALEE_Init(CartInfo *info);
void MHROM_Init(CartInfo *info);
void Mapper190_Init(CartInfo *info);
void NROM_Init(CartInfo *info);
void Novel_Init(CartInfo *info);
void S74LS374NA_Init(CartInfo *info);
void S74LS374N_Init(CartInfo *info);
void S8259A_Init(CartInfo *info);
void S8259B_Init(CartInfo *info);
void S8259C_Init(CartInfo *info);
void S8259D_Init(CartInfo *info);
void SA0036_Init(CartInfo *info);
void SA0037_Init(CartInfo *info);
void SA009_Init(CartInfo *info);
void SA0161M_Init(CartInfo *info);
void SA72007_Init(CartInfo *info);
void SA72008_Init(CartInfo *info);
void SAROM_Init(CartInfo *info);
void SBROM_Init(CartInfo *info);
void SCROM_Init(CartInfo *info);
void SEROM_Init(CartInfo *info);
void SGROM_Init(CartInfo *info);
void SKROM_Init(CartInfo *info);
void SLROM_Init(CartInfo *info);
void SL1ROM_Init(CartInfo *info);
void SLROM_Init(CartInfo *info);
void SNROM_Init(CartInfo *info);
void SOROM_Init(CartInfo *info);
void NROM_Init(CartInfo *info);
void MHROM_Init(CartInfo *info);
void UNROM_Init(CartInfo *info);
void SUNSOFT_UNROM_Init(CartInfo *info); // "Shanghi" original version mapper
void MALEE_Init(CartInfo *info);
void CNROM_Init(CartInfo *info);
void CPROM_Init(CartInfo *info);
void GNROM_Init(CartInfo *info);
void UNL3DBlock_Init(CartInfo *info);
void Super24_Init(CartInfo *info);
void Supervision16_Init(CartInfo *info);
void TBROM_Init(CartInfo *info);
void TCA01_Init(CartInfo *info);
void TCU01_Init(CartInfo *info);
void TCU02_Init(CartInfo *info);
void TEROM_Init(CartInfo *info);
void TFROM_Init(CartInfo *info);
void TGROM_Init(CartInfo *info);
void TKROM_Init(CartInfo *info);
void TSROM_Init(CartInfo *info);
void TKSROM_Init(CartInfo *info);
void TLROM_Init(CartInfo *info);
void TLSROM_Init(CartInfo *info);
void TKSROM_Init(CartInfo *info);
void TQROM_Init(CartInfo *info);
void TQROM_Init(CartInfo *info);
void DEIROM_Init(CartInfo *info);
void TCA01_Init(CartInfo *info);
void TCU01_Init(CartInfo *info);
void TCU02_Init(CartInfo *info);
void S8259A_Init(CartInfo *info);
void S8259B_Init(CartInfo *info);
void S8259C_Init(CartInfo *info);
void S8259D_Init(CartInfo *info);
void S74LS374N_Init(CartInfo *info);
void S74LS374NA_Init(CartInfo *info);
void SA0161M_Init(CartInfo *info);
void SA72007_Init(CartInfo *info);
void SA72008_Init(CartInfo *info);
void SA009_Init(CartInfo *info);
void SA0036_Init(CartInfo *info);
void SA0037_Init(CartInfo *info);
void Supervision16_Init(CartInfo *info);
void Super24_Init(CartInfo *info);
void Novel_Init(CartInfo *info);
void BMC64in1nr_Init(CartInfo *info);
void BMC70in1_Init(CartInfo *info);
void BMC70in1B_Init(CartInfo *info);
void BMC13in1JY110_Init(CartInfo *info);
void BMCT262_Init(CartInfo *info);
void BMCFK23C_Init(CartInfo *info);
void BMCFK23CA_Init(CartInfo *info);
void BMCD1038_Init(CartInfo *info);
void BMCA65AS_Init(CartInfo *info);
void BMCGK192_Init(CartInfo *info);
void BMCGS2004_Init(CartInfo *info);
void BMCGS2013_Init(CartInfo *info);
void BMC190in1_Init(CartInfo *info);
void BMCGhostbusters63in1_Init(CartInfo *info);
void BMCBS5_Init(CartInfo *info);
void DreamTech01_Init(CartInfo *info);
void UNLFS304_Init(CartInfo *info);
void Mapper190_Init(CartInfo *info);
void UNLCC21_Init(CartInfo *info);
void UNLCN22M_Init(CartInfo *info);
void UNLSL1632_Init(CartInfo *info);
void UNLKOF97_Init(CartInfo *info);
void UNLA9746_Init(CartInfo *info);
void UNLSHeroes_Init(CartInfo *info);
void UNLH2288_Init(CartInfo *info);
void UNL8237_Init(CartInfo *info);
void UNL8237A_Init(CartInfo *info);
void UNL8157_Init(CartInfo *info);
void TSROM_Init(CartInfo *info);
void UNL22211_Init(CartInfo *info);
void UNLTF1201_Init(CartInfo *info);
void UNL3DBlock_Init(CartInfo *info);
void UNL6035052_Init(CartInfo *info);
void UNL8157_Init(CartInfo *info);
void UNL8237A_Init(CartInfo *info);
void UNL8237_Init(CartInfo *info);
void UNLA9746_Init(CartInfo *info);
void UNLAX5705_Init(CartInfo *info);
void UNLCC21_Init(CartInfo *info);
void UNLCITYFIGHT_Init(CartInfo *info);
void UNLCN22M_Init(CartInfo *info);
void UNLEDU2000_Init(CartInfo *info);
void UNLFS304_Init(CartInfo *info);
void UNLH2288_Init(CartInfo *info);
void UNLKOF97_Init(CartInfo *info);
void UNLKS7032_Init(CartInfo *info);
void UNLKS7057_Init(CartInfo *info);
void UNLT230_Init(CartInfo *info);
void UNLCITYFIGHT_Init(CartInfo *info);
void UNLAX5705_Init(CartInfo *info);
void UNLDANCE_Init(CartInfo *info);
void UNLN625092_Init(CartInfo *info);
void UNLOneBus_Init(CartInfo *info);
void UNLSC127_Init(CartInfo *info);
void UNLEDU2000_Init(CartInfo *info);
void UNL6035052_Init(CartInfo *info);
void UNLN625092_Init(CartInfo *info);
void UNLSHeroes_Init(CartInfo *info);
void UNLSL1632_Init(CartInfo *info);
void UNLSMB2J_Init(CartInfo *info);
//void UNL09034A_Init(CartInfo *info);
void BMC411120C_Init(CartInfo *info);
void BMC830118C_Init(CartInfo *info);
void BMCT2271_Init(CartInfo *info);
void UNLT230_Init(CartInfo *info);
void UNLTF1201_Init(CartInfo *info);
void UNROM_Init(CartInfo *info);
extern uint8 *UNIFchrrama; // Meh. So I can stop CHR RAM
// bank switcherooing with certain boards...

1
vc/vc10_fceux.vcxproj
View File

@ -539,7 +539,6 @@
<ClCompile Include="..\src\input\zapper.cpp" />
<ClCompile Include="..\src\mappers\151.cpp" />
<ClCompile Include="..\src\mappers\156.cpp" />
<ClCompile Include="..\src\mappers\16.cpp" />
<ClCompile Include="..\src\mappers\17.cpp" />
<ClCompile Include="..\src\mappers\18.cpp" />
<ClCompile Include="..\src\mappers\193.cpp" />

3
vc/vc10_fceux.vcxproj.filters
View File

@ -650,9 +650,6 @@
<ClCompile Include="..\src\mappers\151.cpp">
<Filter>mappers</Filter>
</ClCompile>
<ClCompile Include="..\src\mappers\16.cpp">
<Filter>mappers</Filter>
</ClCompile>
<ClCompile Include="..\src\mappers\17.cpp">
<Filter>mappers</Filter>
</ClCompile>

4
vc/vc8_fceux.vcproj
View File

@ -4004,10 +4004,6 @@
RelativePath="..\src\mappers\151.cpp"
>
</File>
<File
RelativePath="..\src\mappers\16.cpp"
>
</File>
<File
RelativePath="..\src\mappers\17.cpp"
>

4
vc/vc9_fceux.vcproj
View File

@ -2217,10 +2217,6 @@
RelativePath="..\src\mappers\156.cpp"
>
</File>
<File
RelativePath="..\src\mappers\16.cpp"
>
</File>
<File
RelativePath="..\src\mappers\17.cpp"
>