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fk23c fixes

This commit is contained in:
CaH4e3 2017-10-27 20:03:43 +00:00
parent 3240303cba
commit 7d800d4b30
1 changed files with 129 additions and 130 deletions
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259
trunk/src/boards/fk23c.cpp
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@ -30,26 +30,22 @@ static uint32 CHRRAMSize;
static void BMCFK23CCW(uint32 A, uint8 V) static void BMCFK23CCW(uint32 A, uint8 V)
{ {
if(EXPREGS[0]&0x40) if(EXPREGS[0]&0x40)
setchr8(EXPREGS[2]|unromchr); setchr8(EXPREGS[2]|unromchr);
else if(EXPREGS[0]&0x20) { else if(EXPREGS[0]&0x20) {
setchr1r(0x10, A, V); setchr1r(0x10, A, V);
} } else {
else uint16 base=(EXPREGS[2]&0x7F)<<3;
{ if(EXPREGS[3]&2) {
uint16 base=(EXPREGS[2]&0x7F)<<3; int cbase=(MMC3_cmd&0x80)<<5;
if(EXPREGS[3]&2) setchr1(A,V|base);
{ setchr1(0x0000^cbase,DRegBuf[0]|base);
int cbase=(MMC3_cmd&0x80)<<5; setchr1(0x0400^cbase,EXPREGS[6]|base);
setchr1(A,V|base); setchr1(0x0800^cbase,DRegBuf[1]|base);
setchr1(0x0000^cbase,DRegBuf[0]|base); setchr1(0x0c00^cbase,EXPREGS[7]|base);
setchr1(0x0400^cbase,EXPREGS[6]|base); } else
setchr1(0x0800^cbase,DRegBuf[1]|base); setchr1(A,V|base);
setchr1(0x0c00^cbase,EXPREGS[7]|base); }
}
else
setchr1(A,V|base);
}
} }
//some games are wired differently, and this will need to be changed. //some games are wired differently, and this will need to be changed.
@ -86,110 +82,110 @@ static int prg_mask;
//PRG wrapper //PRG wrapper
static void BMCFK23CPW(uint32 A, uint8 V) static void BMCFK23CPW(uint32 A, uint8 V)
{ {
uint32 bank = (EXPREGS[1] & 0x1F); uint32 bank = (EXPREGS[1] & 0x1F);
uint32 hiblock = ((EXPREGS[0] & 8) << 4)|((EXPREGS[0] & 0x80) << 1)|(UNIFchrrama?((EXPREGS[2] & 0x40)<<3):0); uint32 hiblock = ((EXPREGS[0] & 8) << 4)|((EXPREGS[0] & 0x80) << 1)|(UNIFchrrama?((EXPREGS[2] & 0x40)<<3):0);
uint32 block = (EXPREGS[1] & 0x60) | hiblock; uint32 block = (EXPREGS[1] & 0x60) | hiblock;
uint32 extra = (EXPREGS[3] & 2); uint32 extra = (EXPREGS[3] & 2);
// FCEU_printf("0:%04X:%02X\n",A,V);
if((EXPREGS[0]&7)==4) if((EXPREGS[0]&7)==4)
setprg32(0x8000,EXPREGS[1]>>1); setprg32(0x8000,EXPREGS[1]>>1);
else if ((EXPREGS[0]&7)==3) else if ((EXPREGS[0]&7)==3) {
{ setprg16(0x8000,EXPREGS[1]);
setprg16(0x8000,EXPREGS[1]); setprg16(0xC000,EXPREGS[1]);
setprg16(0xC000,EXPREGS[1]); } else {
} if(EXPREGS[0]&3) {
else
{
if(EXPREGS[0]&3)
{
uint32 blocksize = (6)-(EXPREGS[0]&3); uint32 blocksize = (6)-(EXPREGS[0]&3);
uint32 mask = (1<<blocksize)-1; uint32 mask = (1<<blocksize)-1;
V &= mask; V &= mask;
//V &= 63; //? is this a good idea? //V &= 63; //? is this a good idea?
V |= (EXPREGS[1]<<1); V |= (EXPREGS[1]<<1);
setprg8(A,V); // FCEU_printf("1:%04X:%02X\n",A,V);
setprg8(A,V);
} else {
setprg8(A,V & prg_mask);
// FCEU_printf("2:%04X:%02X\n",A,V);
} }
else
setprg8(A,V & prg_mask);
if(EXPREGS[3]&2) if(EXPREGS[3]&2) {
{ setprg8(0xC000,EXPREGS[4]);
setprg8(0xC000,EXPREGS[4]); setprg8(0xE000,EXPREGS[5]);
setprg8(0xE000,EXPREGS[5]); }
} }
}
setprg8r(0x10,0x6000,A001B&3); setprg8r(0x10,0x6000,A001B&3);
} }
//PRG handler ($8000-$FFFF) //PRG handler ($8000-$FFFF)
static DECLFW(BMCFK23CHiWrite) static DECLFW(BMCFK23CHiWrite)
{ {
if(EXPREGS[0]&0x40) // FCEU_printf("K4:(exp0=%02x)\n",EXPREGS[0]);
{ // FCEU_printf("W0:%04X:%02X (exp0=%02x)\n",A,V,EXPREGS[0]);
if((EXPREGS[0]&0x60)==0x40) {
// FCEU_printf("W2:%04X:%02X (exp0=%02x)\n",A,V,EXPREGS[0]);
if(EXPREGS[0]&0x30) if(EXPREGS[0]&0x30)
unromchr=0; unromchr=0;
else else {
{
unromchr=V&3; unromchr=V&3;
FixMMC3CHR(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
} }
} } else {
else if((A==0x8001)&&(EXPREGS[3]&2)&&(MMC3_cmd&8)) {
{ // FCEU_printf("W3:%04X:%02X (exp0=%02x)\n",A,V,EXPREGS[0]);
if((A==0x8001)&&(EXPREGS[3]&2&&MMC3_cmd&8))
{
EXPREGS[4|(MMC3_cmd&3)]=V; EXPREGS[4|(MMC3_cmd&3)]=V;
FixMMC3PRG(MMC3_cmd); FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
} } else
else if(A<0xC000) {
if(A<0xC000) { if(UNIFchrrama) { // hacky... strange behaviour, must be bit scramble due to pcb layot restrictions
if(UNIFchrrama) { // hacky... strange behaviour, must be bit scramble due to pcb layot restrictions // check if it not interfer with other dumps
// check if it not interfer with other dumps if((A==0x8000)&&(V==0x46))
if((A==0x8000)&&(V==0x46)) V=0x47;
V=0x47; else if((A==0x8000)&&(V==0x47))
else if((A==0x8000)&&(V==0x47)) V=0x46;
V=0x46; }
} // FCEU_printf("W1:%04X:%02X\n",A,V);
MMC3_CMDWrite(A,V); MMC3_CMDWrite(A,V);
FixMMC3PRG(MMC3_cmd); FixMMC3PRG(MMC3_cmd);
} } else {
else MMC3_IRQWrite(A,V);
MMC3_IRQWrite(A,V); // FCEU_printf("W4:%04X:%02X (exp0=%02x)\n",A,V,EXPREGS[0]);
} }
}
} }
//EXP handler ($5000-$5FFF) //EXP handler ($5000-$5FFF)
static DECLFW(BMCFK23CWrite) static DECLFW(BMCFK23CWrite)
{ {
if(A&(1<<(dipswitch+4))) if(A&(1<<(dipswitch+4))) {
{
//printf("+ "); //printf("+ ");
EXPREGS[A&3]=V; EXPREGS[A&3]=V;
// BUT WHY is there any rom that need it actually?
bool remap = false; bool remap = false;
// FCEU_printf("K3:(exp0=%02x)\n",EXPREGS[0]);
// FCEU_printf("WH0:%04X:%02X\n",A,V);
//sometimes writing to reg0 causes remappings to occur. we think the 2 signifies this. //sometimes writing to reg0 causes remappings to occur. we think the 2 signifies this.
//if not, 0x24 is a value that is known to work //if not, 0x24 is a value that is known to work
//however, the low 4 bits are known to control the mapping mode, so 0x20 is more likely to be the immediate remap flag //however, the low 4 bits are known to control the mapping mode, so 0x20 is more likely to be the immediate remap flag
remap |= ((EXPREGS[0]&0xF0)==0x20); // remap |= ((EXPREGS[0]&0xF0)==0x20);
//this is an actual mapping reg. i think reg0 controls what happens when reg1 is written. anyway, we have to immediately remap these //this is an actual mapping reg. i think reg0 controls what happens when reg1 is written. anyway, we have to immediately remap these
remap |= (A&3)==1; // remap |= (A&3)==1;
//this too. //this too.
remap |= (A&3)==2; // remap |= (A&3)==2;
if(remap) // if(remap) {
{ // FCEU_printf("WH1:%04X:%02X\n",A,V);
FixMMC3PRG(MMC3_cmd); FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
} // }
} }
if(is_BMCFK23CA) if(is_BMCFK23CA) {
{
if(EXPREGS[3]&2) if(EXPREGS[3]&2)
EXPREGS[0] &= ~7; // hacky hacky! if someone wants extra banking, then for sure doesn't want mode 4 for it! (allow to run A version boards on normal mapper) // FCEU_printf("EXTRA!\n",A);
EXPREGS[0] &= ~7; // hacky hacky! if someone wants extra banking, then for sure doesn't want mode 4 for it! (allow to run A version boards on normal mapper)
} }
//printf("%04X = $%02X\n",A,V); //printf("%04X = $%02X\n",A,V);
@ -199,62 +195,65 @@ static DECLFW(BMCFK23CWrite)
static void BMCFK23CReset(void) static void BMCFK23CReset(void)
{ {
//NOT NECESSARY ANYMORE //NOT NECESSARY ANYMORE
// BUT WHY?
//this little hack makes sure that we try all the dip switch settings eventually, if we reset enough //this little hack makes sure that we try all the dip switch settings eventually, if we reset enough
// dipswitch++; dipswitch++;
// dipswitch&=7; dipswitch&=7;
//printf("BMCFK23C dipswitch set to %d\n",dipswitch); printf("BMCFK23C dipswitch set to %d\n",dipswitch);
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0; EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0;
EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF; EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF;
MMC3RegReset(); // FCEU_printf("K0:(exp0=%02x)\n",EXPREGS[0]);
FixMMC3PRG(MMC3_cmd); MMC3RegReset();
FixMMC3CHR(MMC3_cmd); FixMMC3PRG(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} }
static void BMCFK23CPower(void) static void BMCFK23CPower(void)
{ {
GenMMC3Power();
dipswitch = 0; dipswitch = 0;
GenMMC3Power(); EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0;
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0; EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF;
EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF; // FCEU_printf("K1:(exp0=%02x)\n",EXPREGS[0]);
GenMMC3Power(); FixMMC3PRG(MMC3_cmd);
SetWriteHandler(0x5000,0x5fff,BMCFK23CWrite); FixMMC3CHR(MMC3_cmd);
SetWriteHandler(0x8000,0xFFFF,BMCFK23CHiWrite); SetWriteHandler(0x5000,0x5fff,BMCFK23CWrite);
FixMMC3PRG(MMC3_cmd); SetWriteHandler(0x8000,0xFFFF,BMCFK23CHiWrite);
FixMMC3CHR(MMC3_cmd);
} }
static void BMCFK23CAPower(void) static void BMCFK23CAPower(void)
{ {
GenMMC3Power(); GenMMC3Power();
dipswitch = 0; dipswitch = 0;
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0; EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=EXPREGS[3]=0;
EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF; EXPREGS[4]=EXPREGS[5]=EXPREGS[6]=EXPREGS[7]=0xFF;
SetWriteHandler(0x5000,0x5fff,BMCFK23CWrite); // FCEU_printf("K2:(exp0=%02x)\n",EXPREGS[0]);
SetWriteHandler(0x8000,0xFFFF,BMCFK23CHiWrite); FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
FixMMC3CHR(MMC3_cmd); SetWriteHandler(0x5000,0x5fff,BMCFK23CWrite);
SetWriteHandler(0x8000,0xFFFF,BMCFK23CHiWrite);
} }
static void BMCFK23CAClose(void) static void BMCFK23CAClose(void)
{ {
if(CHRRAM) if(CHRRAM)
FCEU_gfree(CHRRAM); FCEU_gfree(CHRRAM);
CHRRAM=NULL; CHRRAM=NULL;
} }
void BMCFK23C_Init(CartInfo *info) void BMCFK23C_Init(CartInfo *info)
{ {
is_BMCFK23CA = false; is_BMCFK23CA = false;
GenMMC3_Init(info, 512, 256, 8, 0); GenMMC3_Init(info, 512, 256, 8, 0);
cwrap=BMCFK23CCW; cwrap=BMCFK23CCW;
pwrap=BMCFK23CPW; pwrap=BMCFK23CPW;
info->Power=BMCFK23CPower; info->Power=BMCFK23CPower;
info->Reset=BMCFK23CReset; info->Reset=BMCFK23CReset;
AddExState(EXPREGS, 8, 0, "EXPR"); AddExState(EXPREGS, 8, 0, "EXPR");
AddExState(&unromchr, 1, 0, "UCHR"); AddExState(&unromchr, 1, 0, "UCHR");
AddExState(&dipswitch, 1, 0, "DPSW"); AddExState(&dipswitch, 1, 0, "DPSW");
prg_bonus = 1; prg_bonus = 1;
if(MasterRomInfoParams.find("bonus") != MasterRomInfoParams.end()) if(MasterRomInfoParams.find("bonus") != MasterRomInfoParams.end())
@ -267,21 +266,21 @@ void BMCFK23CA_Init(CartInfo *info)
{ {
is_BMCFK23CA = true; is_BMCFK23CA = true;
GenMMC3_Init(info, 512, 256, 8, 0); GenMMC3_Init(info, 512, 256, 8, 0);
cwrap=BMCFK23CCW; cwrap=BMCFK23CCW;
pwrap=BMCFK23CPW; pwrap=BMCFK23CPW;
info->Power=BMCFK23CAPower; info->Power=BMCFK23CAPower;
info->Reset=BMCFK23CReset; info->Reset=BMCFK23CReset;
info->Close=BMCFK23CAClose; info->Close=BMCFK23CAClose;
CHRRAMSize=8192; CHRRAMSize=8192;
CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSize); CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSize);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSize, 1); SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSize, 1);
AddExState(CHRRAM, CHRRAMSize, 0, "CRAM"); AddExState(CHRRAM, CHRRAMSize, 0, "CRAM");
AddExState(EXPREGS, 8, 0, "EXPR"); AddExState(EXPREGS, 8, 0, "EXPR");
AddExState(&unromchr, 1, 0, "UCHR"); AddExState(&unromchr, 1, 0, "UCHR");
AddExState(&dipswitch, 1, 0, "DPSW"); AddExState(&dipswitch, 1, 0, "DPSW");
prg_bonus = 1; prg_bonus = 1;
if(MasterRomInfoParams.find("bonus") != MasterRomInfoParams.end()) if(MasterRomInfoParams.find("bonus") != MasterRomInfoParams.end())