rainbow: v2 first commit
- prg banking OK - chr banking OK - NT mapping OK - prg self-flashing in mode 3 OK - chr self-flashing in mode 3 OK - scanline IRQ OK - CPU Cycle IRQ ok - multiplication OK - version OK
This commit is contained in:
contact@brokestudio.fr
parent
964e6144a4
commit
707db9ea05
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@ -40,46 +40,50 @@ void MMC5RunSoundHQ(void);
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static INLINE void MMC5SPRVROM_BANK1(uint32 A, uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask1[0];
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MMC5SPRVPage[(A) >> 10] = &CHRptr[0][(V) << 10] - (A);
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MMC5SPRVPage[(A) >> 9] = MMC5SPRVPage[((A) >> 9) + 1] = &CHRptr[0][(V) << 10] - (A);
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}
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}
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static INLINE void MMC5BGVROM_BANK1(uint32 A, uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask1[0]; MMC5BGVPage[(A) >> 10] = &CHRptr[0][(V) << 10] - (A);
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V &= CHRmask1[0]; MMC5BGVPage[(A) >> 9] = MMC5BGVPage[((A) >> 9) + 1] = &CHRptr[0][(V) << 10] - (A);
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}
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}
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static INLINE void MMC5SPRVROM_BANK2(uint32 A, uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask2[0]; MMC5SPRVPage[(A) >> 10] = MMC5SPRVPage[((A) >> 10) + 1] = &CHRptr[0][(V) << 11] - (A);
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V &= CHRmask2[0]; MMC5SPRVPage[(A) >> 9] = MMC5SPRVPage[((A) >> 9) + 1] = MMC5SPRVPage[((A) >> 9) + 2] = MMC5SPRVPage[((A) >> 9) + 3] = &CHRptr[0][(V) << 11] - (A);
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}
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}
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static INLINE void MMC5BGVROM_BANK2(uint32 A, uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask2[0]; MMC5BGVPage[(A) >> 10] = MMC5BGVPage[((A) >> 10) + 1] = &CHRptr[0][(V) << 11] - (A);
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V &= CHRmask2[0]; MMC5BGVPage[(A) >> 9] = MMC5BGVPage[((A) >> 9) + 1] = MMC5BGVPage[((A) >> 9) + 2] = MMC5BGVPage[((A) >> 9) + 3] = &CHRptr[0][(V) << 11] - (A);
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}
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}
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static INLINE void MMC5SPRVROM_BANK4(uint32 A, uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask4[0]; MMC5SPRVPage[(A) >> 10] = MMC5SPRVPage[((A) >> 10) + 1] = MMC5SPRVPage[((A) >> 10) + 2] = MMC5SPRVPage[((A) >> 10) + 3] = &CHRptr[0][(V) << 12] - (A);
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V &= CHRmask4[0]; MMC5SPRVPage[(A) >> 9] = MMC5SPRVPage[((A) >> 9) + 1] = MMC5SPRVPage[((A) >> 9) + 2] = MMC5SPRVPage[((A) >> 9) + 3] =
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MMC5SPRVPage[((A) >> 9) + 4] = MMC5SPRVPage[((A) >> 9) + 5] = MMC5SPRVPage[((A) >> 9) + 6] = MMC5SPRVPage[((A) >> 9) + 7] = &CHRptr[0][(V) << 12] - (A);
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}
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}
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static INLINE void MMC5BGVROM_BANK4(uint32 A, uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask4[0]; MMC5BGVPage[(A) >> 10] = MMC5BGVPage[((A) >> 10) + 1] = MMC5BGVPage[((A) >> 10) + 2] = MMC5BGVPage[((A) >> 10) + 3] = &CHRptr[0][(V) << 12] - (A);
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V &= CHRmask4[0]; MMC5BGVPage[(A) >> 9] = MMC5BGVPage[((A) >> 9) + 1] = MMC5BGVPage[((A) >> 9) + 2] = MMC5BGVPage[((A) >> 9) + 3] =
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MMC5BGVPage[((A) >> 9) + 4] = MMC5BGVPage[((A) >> 9) + 5] = MMC5BGVPage[((A) >> 9) + 6] = MMC5BGVPage[((A) >> 9) + 7] = &CHRptr[0][(V) << 12] - (A);
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}
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}
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static INLINE void MMC5SPRVROM_BANK8(uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask8[0]; MMC5SPRVPage[0] = MMC5SPRVPage[1] = MMC5SPRVPage[2] = MMC5SPRVPage[3] = MMC5SPRVPage[4] = MMC5SPRVPage[5] = MMC5SPRVPage[6] = MMC5SPRVPage[7] = &CHRptr[0][(V) << 13];
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V &= CHRmask8[0]; MMC5SPRVPage[0] = MMC5SPRVPage[1] = MMC5SPRVPage[2] = MMC5SPRVPage[3] = MMC5SPRVPage[4] = MMC5SPRVPage[5] = MMC5SPRVPage[6] = MMC5SPRVPage[7] =
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MMC5SPRVPage[8] = MMC5SPRVPage[9] = MMC5SPRVPage[10] = MMC5SPRVPage[11] = MMC5SPRVPage[12] = MMC5SPRVPage[13] = MMC5SPRVPage[14] = MMC5SPRVPage[15] = &CHRptr[0][(V) << 13];
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}
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}
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static INLINE void MMC5BGVROM_BANK8(uint32 V) {
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if (CHRptr[0]) {
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V &= CHRmask8[0]; MMC5BGVPage[0] = MMC5BGVPage[1] = MMC5BGVPage[2] = MMC5BGVPage[3] = MMC5BGVPage[4] = MMC5BGVPage[5] = MMC5BGVPage[6] = MMC5BGVPage[7] = &CHRptr[0][(V) << 13];
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V &= CHRmask8[0]; MMC5BGVPage[0] = MMC5BGVPage[1] = MMC5BGVPage[2] = MMC5BGVPage[3] = MMC5BGVPage[4] = MMC5BGVPage[5] = MMC5BGVPage[6] = MMC5BGVPage[7] =
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MMC5BGVPage[8] = MMC5BGVPage[9] = MMC5BGVPage[10] = MMC5BGVPage[11] = MMC5BGVPage[12] = MMC5BGVPage[13] = MMC5BGVPage[14] = MMC5BGVPage[15] = &CHRptr[0][(V) << 13];
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}
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}
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@ -119,7 +123,7 @@ typedef struct __cartdata {
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uint8 size;
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} cartdata;
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#define MMC5SPRVRAMADR(V) &MMC5SPRVPage[(V) >> 10][(V)]
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#define MMC5SPRVRAMADR(V) &MMC5SPRVPage[(V) >> 9][(V)]
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uint8* MMC5BGVRAMADR(uint32 A)
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{
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@ -129,23 +133,23 @@ uint8* MMC5BGVRAMADR(uint32 A)
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{
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bool isPattern = PPUON != 0;
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if (ppuphase == PPUPHASE_OBJ && isPattern)
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return &ABANKS[(A) >> 10][(A)];
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return &ABANKS[(A) >> 9][(A)];
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if (ppuphase == PPUPHASE_BG && isPattern)
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return &BBANKS[(A) >> 10][(A)];
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return &BBANKS[(A) >> 9][(A)];
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else if(mmc5ABMode == 0)
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return &ABANKS[(A) >> 10][(A)];
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return &ABANKS[(A) >> 9][(A)];
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else
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return &BBANKS[(A) >> 10][(A)];
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return &BBANKS[(A) >> 9][(A)];
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}
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else return &ABANKS[(A) >> 10][(A)];;
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else return &ABANKS[(A) >> 9][(A)];;
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}
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if (!Sprite16) {
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if (mmc5ABMode == 0)
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return &ABANKS[(A) >> 10][(A)];
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return &ABANKS[(A) >> 9][(A)];
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else
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return &BBANKS[(A) >> 10][(A)];
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} else return &BBANKS[(A) >> 10][(A)];
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return &BBANKS[(A) >> 9][(A)];
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} else return &BBANKS[(A) >> 9][(A)];
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}
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static void mmc5_PPUWrite(uint32 A, uint8 V) {
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@ -164,8 +168,8 @@ static void mmc5_PPUWrite(uint32 A, uint8 V) {
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} else
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PALRAM[tmp & 0x1F] = V & 0x3F;
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} else if (tmp < 0x2000) {
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if (PPUCHRRAM & (1 << (tmp >> 10)))
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VPage[tmp >> 10][tmp] = V;
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if (PPUCHRRAM & (3 << (tmp >> 9)))
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VPage[tmp >> 9][tmp] = V;
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} else {
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if (PPUNTARAM & (1 << ((tmp & 0xF00) >> 10)))
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vnapage[((tmp & 0xF00) >> 10)][tmp & 0x3FF] = V;
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@ -201,7 +205,7 @@ uint8 FASTCALL mmc5_PPURead(uint32 A)
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{
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bool isPattern = !!PPUON;
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if (ppuphase == PPUPHASE_OBJ && isPattern)
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return ABANKS[(A) >> 10][(A)];
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return ABANKS[(A) >> 9][(A)];
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if (ppuphase == PPUPHASE_BG && isPattern)
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{
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if(split)
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@ -212,12 +216,12 @@ uint8 FASTCALL mmc5_PPURead(uint32 A)
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if (MMC5HackCHRMode == 1)
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return *FCEUPPU_GetCHR(A,NTRefreshAddr);
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return BBANKS[(A) >> 10][(A)];
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return BBANKS[(A) >> 9][(A)];
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}
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else if(mmc5ABMode == 0)
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return ABANKS[(A) >> 10][(A)];
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return ABANKS[(A) >> 9][(A)];
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else
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return BBANKS[(A) >> 10][(A)];
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return BBANKS[(A) >> 9][(A)];
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}
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else
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{
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@ -232,7 +236,7 @@ uint8 FASTCALL mmc5_PPURead(uint32 A)
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return *FCEUPPU_GetCHR(A,NTRefreshAddr);
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}
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return ABANKS[(A) >> 10][(A)];
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return ABANKS[(A) >> 9][(A)];
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}
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}
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else
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@ -82,8 +82,16 @@ const uint32 CHRRAMSIZE = 32 * 1024;
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extern uint8 *ExtraNTARAM;
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extern uint8 IRQCount, IRQLatch, IRQa;
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extern uint8 IRQReload;
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// Scanline IRQ
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static uint8 S_IRQCount, S_IRQLatch, S_IRQa, S_IRQp;
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static uint8 S_IRQReload;
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// CPU Cycle IRQ
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static bool C_IRQa, C_IRQr, C_IRQp;
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static int32 C_IRQLatch, C_IRQCount;
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// ESP message IRQ
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static uint8 ESP_IRQp;
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static uint8 flash_mode[2];
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static uint8 flash_sequence[2];
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@ -106,11 +114,22 @@ static SFORMAT FlashRegs[] =
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static SFORMAT Rainbow13StateRegs[] =
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{
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{ prg, 3, "PRG" },
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{ chr, 8, "CHR" },
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{ &IRQReload, 1, "IRQR" },
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{ &IRQCount, 1, "IRQC" },
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{ &IRQLatch, 1, "IRQL" },
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{ &IRQa, 1, "IRQA" },
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{ chr, 16, "CHR" },
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{ &S_IRQReload, 1, "SCAR" },
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{ &S_IRQCount, 1, "SCAC" },
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{ &S_IRQLatch, 1, "SCAL" },
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{ &S_IRQa, 1, "SCAA" },
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{ &S_IRQp, 1, "SCAP" },
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{ &C_IRQa, 1, "CPUA" },
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{ &C_IRQp, 1, "CPUP" },
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{ &C_IRQr, 1, "CPUR" },
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{ &C_IRQLatch, 4, "CPUL" },
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{ &C_IRQCount, 4, "CPUC" },
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{ &ESP_IRQp, 1, "ESPP" },
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{ 0 }
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};
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@ -158,18 +177,58 @@ static void clear_esp_message_received() {
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has_esp_message_received = false;
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}
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static void Rainbow13EspMapIrq(int32) {
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static void Rainbow13hb() {
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int count = S_IRQCount;
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if (!count || S_IRQReload)
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{
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S_IRQCount = S_IRQLatch;
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S_IRQReload = 0;
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}
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else
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S_IRQCount--;
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if ((count | 1) && !S_IRQCount)
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{
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if (S_IRQa)
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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static void IRQEnd() {
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if (!C_IRQp && !S_IRQp && !ESP_IRQp)
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{
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X6502_IRQEnd(FCEU_IQEXT);
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}
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}
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static void Rainbow13IRQ(int a) {
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// Cycle Counter IRQ
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if (C_IRQa) {
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C_IRQCount -= a;
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if (C_IRQCount <= 0) {
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C_IRQa = C_IRQr;
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C_IRQp = true;
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C_IRQCount = C_IRQLatch;
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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// ESP / new message IRQ
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if (esp_irq_enable)
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{
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if (esp_message_received())
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{
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X6502_IRQBegin(FCEU_IQEXT);
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ESP_IRQp = 1;
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}
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else
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{
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X6502_IRQEnd(FCEU_IQEXT);
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ESP_IRQp = 0;
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}
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}
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IRQEnd();
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}
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static void Sync(void) {
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@ -414,6 +473,7 @@ static DECLFR(Rainbow13Read) {
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static DECLFW(Rainbow13Write) {
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switch (A)
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{
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// ESP
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case 0x4100:
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esp_enable = V & 0x01;
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esp_irq_enable = V & 0x02;
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@ -445,15 +505,7 @@ static DECLFW(Rainbow13Write) {
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case 0x4105:
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rx_index = V;
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break;
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case 0x4120: prg[0] = V; Sync(); break;
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case 0x4121: prg[1] = V & 0x3f; Sync(); break;
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case 0x4122: prg[2] = V & 0x3f; Sync(); break;
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case 0x4123: fpga_wram_bank = V & 0x01; Sync(); break;
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case 0x4124:
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wram_bank = V & 0x3f;
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wram_chip_select = (V & 0xc0) >> 6;
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Sync();
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break;
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// Mapper configuration
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case 0x4110:
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prg_mode = V & 0x01;
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chr_chip = (V & 0x08) >> 3;
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@ -462,6 +514,17 @@ static DECLFW(Rainbow13Write) {
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nt_set = (V & 0xC0) >> 6;
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Sync();
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break;
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// PRG banking
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case 0x4120: prg[0] = V & 0xbf; Sync(); break;
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case 0x4121: prg[1] = V & 0xbf; Sync(); break;
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case 0x4122: prg[2] = V & 0xbf; Sync(); break;
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case 0x4123: fpga_wram_bank = V & 0x01; Sync(); break;
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case 0x4124:
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wram_bank = V & 0x3f;
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wram_chip_select = (V & 0xc0) >> 6;
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Sync();
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break;
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// CHR banking
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case 0x4130:
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case 0x4131:
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case 0x4132:
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@ -480,39 +543,34 @@ static DECLFW(Rainbow13Write) {
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break;
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}
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case 0x4138: chr_upper_bank = V & 0x01; Sync(); break;
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case 0x4140: IRQLatch = V; break;
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case 0x4141: IRQReload = 1; break;
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// Scanline IRQ
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case 0x4140: S_IRQLatch = V; break;
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case 0x4141: S_IRQReload = 1; break;
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case 0x4142:
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X6502_IRQEnd(FCEU_IQEXT);
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IRQa = 0;
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S_IRQa = 0;
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S_IRQp = 0;
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IRQEnd();
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break;
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case 0x4143: IRQa = 1; break;
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case 0x4143: S_IRQa = 1; break;
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// CPU Cycle IRQ
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case 0x4144: C_IRQLatch &= 0xFF00; C_IRQLatch |= V; C_IRQCount = C_IRQLatch; break;
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case 0x4145: C_IRQLatch &= 0x00FF; C_IRQLatch |= V << 8; C_IRQCount = C_IRQLatch; break;
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case 0x4146:
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C_IRQa = V & 0x01;
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C_IRQr = (V & 0x02) >> 1;
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if (C_IRQa)
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C_IRQCount = C_IRQLatch;
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break;
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case 0x4147:
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C_IRQp = false;
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IRQEnd();
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break;
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// Multiplier
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case 0x4160: mul_a = V; mul_result = mul_a * mul_b; break;
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case 0x4161: mul_b = V; mul_result = mul_a * mul_b; break;
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}
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}
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static void ClockRainbow13Counter(void) {
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int count = IRQCount;
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if (!count || IRQReload)
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{
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IRQCount = IRQLatch;
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IRQReload = 0;
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}
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else
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IRQCount--;
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if ((count | 1) && !IRQCount)
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{
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if (IRQa)
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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static void Rainbow13hb() {
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ClockRainbow13Counter();
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}
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uint8 FASTCALL Rainbow13PPURead(uint32 A) {
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// if CHR-RAM, check if CHR-RAM exists, if not return data bus cache
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if (chr_chip == CHR_CHIP_RAM && CHRRAM == NULL)
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@ -583,7 +641,7 @@ void Rainbow13FlashIDEnter(uint8 chip)
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if (flash_id[chip])
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return;
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flash_id[chip] = 1;
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if(bootloader)
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if (bootloader)
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SetReadHandler(0x8000, 0xDFFF, Rainbow13FlashPrgID);
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else
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SetReadHandler(0x8000, 0xFFFF, Rainbow13FlashPrgID);
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@ -826,13 +884,17 @@ static void Rainbow13Reset(void) {
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rx_address = 0;
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tx_address = 0;
|
||||
rx_index = 0;
|
||||
IRQa = 0;
|
||||
S_IRQa = S_IRQp = 0;
|
||||
C_IRQa = C_IRQp = C_IRQr = 0;
|
||||
ESP_IRQp = 0;
|
||||
}
|
||||
|
||||
static void Rainbow13Power(void) {
|
||||
|
||||
// mapper
|
||||
IRQCount = IRQLatch = IRQa = 0;
|
||||
S_IRQCount = S_IRQLatch = S_IRQa = 0;
|
||||
C_IRQCount = C_IRQLatch = C_IRQa = C_IRQr = 0;
|
||||
S_IRQp = C_IRQp = ESP_IRQp = 0;
|
||||
chr_mode &= 0x03;
|
||||
prg_mode &= 0x01;
|
||||
chr_upper_bank &= 0x01;
|
||||
|
|
@ -1282,5 +1344,5 @@ void RAINBOW13_Init(CartInfo *info) {
|
|||
AddExState(&Rainbow13StateRegs, ~0, 0, 0);
|
||||
|
||||
// set a hook on hblank to be able periodically check if we have to send an interupt
|
||||
MapIRQHook = Rainbow13EspMapIrq;
|
||||
MapIRQHook = Rainbow13IRQ;
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -40,7 +40,7 @@ typedef SSIZE_T ssize_t;
|
|||
|
||||
using easywsclient::WebSocket;
|
||||
|
||||
#define RAINBOW_DEBUG 0
|
||||
#define RAINBOW_DEBUG 1
|
||||
|
||||
#if RAINBOW_DEBUG >= 1
|
||||
#define UDBG(...) FCEU_printf(__VA_ARGS__)
|
||||
|
|
@ -1955,9 +1955,9 @@ std::pair<uint8, uint8> BrokeStudioFirmware::curle_to_net_error(CURLcode curle)
|
|||
void BrokeStudioFirmware::downloadFile(std::string const& url, uint8 path, uint8 file) {
|
||||
UDBG("RAINBOW BrokeStudioFirmware download %s -> (%u,%u)\n", url.c_str(), (unsigned int)path, (unsigned int)file);
|
||||
//TODO asynchronous download using curl_multi_* (and maybe a thread, or regular ticks on rx/tx/getDataReadyIO)
|
||||
|
||||
// Directly fail if the curl handle was not properly initialized
|
||||
if (this->curl_handle == nullptr) {
|
||||
/*
|
||||
// Directly fail if the curl handle was not properly initialized or if WiFi is not enabled (wifiConfig bit 0)
|
||||
if ((this->curl_handle == nullptr) || (wifiConfig & wifi_config_t::WIFI_ENABLED == 0)) {
|
||||
UDBG("RAINBOW BrokeStudioFirmware download failed: no handle\n");
|
||||
this->tx_messages.push_back({
|
||||
2,
|
||||
|
|
@ -1968,6 +1968,7 @@ void BrokeStudioFirmware::downloadFile(std::string const& url, uint8 path, uint8
|
|||
});
|
||||
return;
|
||||
}
|
||||
*/
|
||||
|
||||
// Download file
|
||||
std::vector<uint8> data;
|
||||
|
|
|
|||
58
src/cart.cpp
58
src/cart.cpp
|
|
@ -38,11 +38,11 @@
|
|||
#include <cstdio>
|
||||
#include <climits>
|
||||
|
||||
uint8 *Page[32], *VPage[8];
|
||||
uint8 *Page[32], *VPage[16];
|
||||
uint8 **VPageR = VPage;
|
||||
uint8 *VPageG[8];
|
||||
uint8 *MMC5SPRVPage[8];
|
||||
uint8 *MMC5BGVPage[8];
|
||||
uint8 *VPageG[16];
|
||||
uint8 *MMC5SPRVPage[16];
|
||||
uint8 *MMC5BGVPage[16];
|
||||
|
||||
static uint8 PRGIsRAM[32]; /* This page is/is not PRG RAM. */
|
||||
|
||||
|
|
@ -62,6 +62,7 @@ uint32 PRGmask8[32];
|
|||
uint32 PRGmask16[32];
|
||||
uint32 PRGmask32[32];
|
||||
|
||||
uint32 CHRmask512[32];
|
||||
uint32 CHRmask1[32];
|
||||
uint32 CHRmask2[32];
|
||||
uint32 CHRmask4[32];
|
||||
|
|
@ -105,8 +106,8 @@ void ResetCartMapping(void) {
|
|||
PRGptr[x] = CHRptr[x] = 0;
|
||||
PRGsize[x] = CHRsize[x] = 0;
|
||||
}
|
||||
for (x = 0; x < 8; x++) {
|
||||
MMC5SPRVPage[x] = MMC5BGVPage[x] = VPageR[x] = nothing - 0x400 * x;
|
||||
for (x = 0; x < 16; x++) {
|
||||
MMC5SPRVPage[x] = MMC5BGVPage[x] = VPageR[x] = nothing - 0x200 * x;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -127,11 +128,13 @@ void SetupCartCHRMapping(int chip, uint8 *p, uint32 size, int ram) {
|
|||
CHRptr[chip] = p;
|
||||
CHRsize[chip] = size;
|
||||
|
||||
CHRmask512[chip] = (size >> 9) - 1;
|
||||
CHRmask1[chip] = (size >> 10) - 1;
|
||||
CHRmask2[chip] = (size >> 11) - 1;
|
||||
CHRmask4[chip] = (size >> 12) - 1;
|
||||
CHRmask8[chip] = (size >> 13) - 1;
|
||||
|
||||
if (CHRmask512[chip] >= (unsigned int)(-1)) CHRmask512[chip] = 0;
|
||||
if (CHRmask1[chip] >= (unsigned int)(-1)) CHRmask1[chip] = 0;
|
||||
if (CHRmask2[chip] >= (unsigned int)(-1)) CHRmask2[chip] = 0;
|
||||
if (CHRmask4[chip] >= (unsigned int)(-1)) CHRmask4[chip] = 0;
|
||||
|
|
@ -225,38 +228,51 @@ void setprg32(uint32 A, uint32 V) {
|
|||
setprg32r(0, A, V);
|
||||
}
|
||||
|
||||
void setchr512r(int r, uint32 A, uint32 V) {
|
||||
if (!CHRptr[r]) return;
|
||||
FCEUPPU_LineUpdate();
|
||||
V &= CHRmask512[r];
|
||||
if (CHRram[r])
|
||||
PPUCHRRAM |= (1 << (A >> 9));
|
||||
else
|
||||
PPUCHRRAM &= ~(1 << (A >> 9));
|
||||
VPageR[(A) >> 9] = &CHRptr[r][(V) << 9] - (A);
|
||||
}
|
||||
|
||||
void setchr1r(int r, uint32 A, uint32 V) {
|
||||
if (!CHRptr[r]) return;
|
||||
FCEUPPU_LineUpdate();
|
||||
V &= CHRmask1[r];
|
||||
if (CHRram[r])
|
||||
PPUCHRRAM |= (1 << (A >> 10));
|
||||
PPUCHRRAM |= (3 << (A >> 9));
|
||||
else
|
||||
PPUCHRRAM &= ~(1 << (A >> 10));
|
||||
VPageR[(A) >> 10] = &CHRptr[r][(V) << 10] - (A);
|
||||
PPUCHRRAM &= ~(3 << (A >> 9));
|
||||
VPageR[(A) >> 9] = VPageR[((A) >> 9) + 1] = &CHRptr[r][(V) << 10] - (A);
|
||||
}
|
||||
|
||||
void setchr2r(int r, uint32 A, uint32 V) {
|
||||
if (!CHRptr[r]) return;
|
||||
FCEUPPU_LineUpdate();
|
||||
V &= CHRmask2[r];
|
||||
VPageR[(A) >> 10] = VPageR[((A) >> 10) + 1] = &CHRptr[r][(V) << 11] - (A);
|
||||
VPageR[(A) >> 9] = VPageR[((A) >> 9) + 1] = VPageR[((A) >> 9) + 2] = VPageR[((A) >> 9) + 3] = &CHRptr[r][(V) << 11] - (A);
|
||||
if (CHRram[r])
|
||||
PPUCHRRAM |= (3 << (A >> 10));
|
||||
PPUCHRRAM |= (15 << (A >> 9));
|
||||
else
|
||||
PPUCHRRAM &= ~(3 << (A >> 10));
|
||||
PPUCHRRAM &= ~(15 << (A >> 9));
|
||||
}
|
||||
|
||||
void setchr4r(int r, unsigned int A, unsigned int V) {
|
||||
if (!CHRptr[r]) return;
|
||||
FCEUPPU_LineUpdate();
|
||||
V &= CHRmask4[r];
|
||||
VPageR[(A) >> 10] = VPageR[((A) >> 10) + 1] =
|
||||
VPageR[((A) >> 10) + 2] = VPageR[((A) >> 10) + 3] = &CHRptr[r][(V) << 12] - (A);
|
||||
VPageR[(A) >> 9] = VPageR[((A) >> 9) + 1] =
|
||||
VPageR[((A) >> 9) + 2] = VPageR[((A) >> 9) + 3] =
|
||||
VPageR[((A) >> 9) + 4] = VPageR[((A) >> 9) + 5] =
|
||||
VPageR[((A) >> 9) + 6] = VPageR[((A) >> 9) + 7] = &CHRptr[r][(V) << 12] - (A);
|
||||
if (CHRram[r])
|
||||
PPUCHRRAM |= (15 << (A >> 10));
|
||||
PPUCHRRAM |= (255 << (A >> 9));
|
||||
else
|
||||
PPUCHRRAM &= ~(15 << (A >> 10));
|
||||
PPUCHRRAM &= ~(255 << (A >> 9));
|
||||
}
|
||||
|
||||
void setchr8r(int r, uint32 V) {
|
||||
|
|
@ -265,10 +281,10 @@ void setchr8r(int r, uint32 V) {
|
|||
if (!CHRptr[r]) return;
|
||||
FCEUPPU_LineUpdate();
|
||||
V &= CHRmask8[r];
|
||||
for (x = 7; x >= 0; x--)
|
||||
for (x = 15; x >= 0; x--)
|
||||
VPageR[x] = &CHRptr[r][V << 13];
|
||||
if (CHRram[r])
|
||||
PPUCHRRAM |= (255);
|
||||
PPUCHRRAM |= (65535);
|
||||
else
|
||||
PPUCHRRAM = 0;
|
||||
}
|
||||
|
|
@ -495,7 +511,7 @@ void FixGenieMap(void) {
|
|||
|
||||
geniestage = 2;
|
||||
|
||||
for (x = 0; x < 8; x++)
|
||||
for (x = 0; x < 16; x++)
|
||||
VPage[x] = VPageG[x];
|
||||
|
||||
VPageR = VPage;
|
||||
|
|
@ -526,8 +542,8 @@ void FCEU_GeniePower(void) {
|
|||
SetWriteHandler(0x8000, 0xFFFF, GenieWrite);
|
||||
SetReadHandler(0x8000, 0xFFFF, GenieRead);
|
||||
|
||||
for (x = 0; x < 8; x++)
|
||||
VPage[x] = GENIEROM + 4096 - 0x400 * x;
|
||||
for (x = 0; x < 16; x++)
|
||||
VPage[x] = GENIEROM + 4096 - 0x200 * x;
|
||||
|
||||
if (AllocGenieRW())
|
||||
VPageR = VPageG;
|
||||
|
|
|
|||
|
|
@ -86,7 +86,7 @@ void FCEU_SaveGameSave(CartInfo *LocalHWInfo);
|
|||
void FCEU_LoadGameSave(CartInfo *LocalHWInfo);
|
||||
void FCEU_ClearGameSave(CartInfo *LocalHWInfo);
|
||||
|
||||
extern uint8 *Page[32], *VPage[8], *MMC5SPRVPage[8], *MMC5BGVPage[8];
|
||||
extern uint8 *Page[32], *VPage[16], *MMC5SPRVPage[16], *MMC5BGVPage[16];
|
||||
|
||||
void ResetCartMapping(void);
|
||||
void SetupCartPRGMapping(int chip, uint8 *p, uint32 size, int ram);
|
||||
|
|
@ -129,6 +129,7 @@ void setprg8r(int r, unsigned int A, unsigned int V);
|
|||
void setprg16r(int r, unsigned int A, unsigned int V);
|
||||
void setprg32r(int r, unsigned int A, unsigned int V);
|
||||
|
||||
void setchr512r(int r, unsigned int A, unsigned int V);
|
||||
void setchr1r(int r, unsigned int A, unsigned int V);
|
||||
void setchr2r(int r, unsigned int A, unsigned int V);
|
||||
void setchr4r(int r, unsigned int A, unsigned int V);
|
||||
|
|
|
|||
|
|
@ -366,7 +366,7 @@ uint8 GetMem(uint16 A) {
|
|||
uint8 GetPPUMem(uint8 A) {
|
||||
uint16 tmp = FCEUPPU_PeekAddress() & 0x3FFF;
|
||||
|
||||
if (tmp<0x2000) return VPage[tmp>>10][tmp];
|
||||
if (tmp<0x2000) return VPage[tmp>>9][tmp];
|
||||
if (tmp>=0x3F00) return PALRAM[tmp&0x1F];
|
||||
return vnapage[(tmp>>10)&0x3][tmp&0x3FF];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -119,7 +119,7 @@ extern void IncrementInstructionsCounters();
|
|||
//-------------
|
||||
|
||||
//internal variables that debuggers will want access to
|
||||
extern uint8 *vnapage[4],*VPage[8];
|
||||
extern uint8 *vnapage[4],*VPage[16];
|
||||
extern uint8 PPU[4],PALRAM[0x20],UPALRAM[3],SPRAM[0x100],VRAMBuffer,PPUGenLatch,XOffset;
|
||||
extern uint32 FCEUPPU_PeekAddress();
|
||||
extern uint8 READPAL_MOTHEROFALL(uint32 A);
|
||||
|
|
|
|||
|
|
@ -259,7 +259,7 @@ static int getPPU( unsigned int i )
|
|||
return 0;
|
||||
}
|
||||
i &= 0x3FFF;
|
||||
if (i < 0x2000)return VPage[(i) >> 10][(i)];
|
||||
if (i < 0x2000)return VPage[(i) >> 9][(i)];
|
||||
//NSF PPU Viewer crash here (UGETAB) (Also disabled by 'MaxSize = 0x2000')
|
||||
if (GameInfo->type == GIT_NSF)
|
||||
return 0;
|
||||
|
|
@ -356,7 +356,7 @@ static int writeMem( int mode, unsigned int addr, int value )
|
|||
addr &= 0x3FFF;
|
||||
if (addr < 0x2000)
|
||||
{
|
||||
VPage[addr >> 10][addr] = value; //todo: detect if this is vrom and turn it red if so
|
||||
VPage[addr >> 9][addr] = value; //todo: detect if this is vrom and turn it red if so
|
||||
}
|
||||
if ((addr >= 0x2000) && (addr < 0x3F00))
|
||||
{
|
||||
|
|
|
|||
|
|
@ -1323,7 +1323,7 @@ void ppuPatternView_t::paintEvent(QPaintEvent *event)
|
|||
static int getPPU( unsigned int i )
|
||||
{
|
||||
i &= 0x3FFF;
|
||||
if (i < 0x2000)return VPage[(i) >> 10][(i)];
|
||||
if (i < 0x2000)return VPage[(i) >> 9][(i)];
|
||||
//NSF PPU Viewer crash here (UGETAB) (Also disabled by 'MaxSize = 0x2000')
|
||||
if (GameInfo->type == GIT_NSF)
|
||||
return 0;
|
||||
|
|
@ -1363,7 +1363,7 @@ static int writeMemPPU( unsigned int addr, int value )
|
|||
addr &= 0x3FFF;
|
||||
if (addr < 0x2000)
|
||||
{
|
||||
VPage[addr >> 10][addr] = value; //todo: detect if this is vrom and turn it red if so
|
||||
VPage[addr >> 9][addr] = value; //todo: detect if this is vrom and turn it red if so
|
||||
}
|
||||
if ((addr >= 0x2000) && (addr < 0x3F00))
|
||||
{
|
||||
|
|
@ -1626,8 +1626,8 @@ void FCEUD_UpdatePPUView(int scanline, int refreshchr)
|
|||
int i10, x10;
|
||||
for (i = 0, x=0x1000; i < 0x1000; i++, x++)
|
||||
{
|
||||
i10 = i>>10;
|
||||
x10 = x>>10;
|
||||
i10 = i>>9;
|
||||
x10 = x>>9;
|
||||
|
||||
if ( VPage[i10] == NULL )
|
||||
{
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ static int getRAM( unsigned int i )
|
|||
static int getPPU( unsigned int i )
|
||||
{
|
||||
i &= 0x3FFF;
|
||||
if (i < 0x2000)return VPage[(i) >> 10][(i)];
|
||||
if (i < 0x2000)return VPage[(i) >> 9][(i)];
|
||||
//NSF PPU Viewer crash here (UGETAB) (Also disabled by 'MaxSize = 0x2000')
|
||||
if (GameInfo->type == GIT_NSF)
|
||||
return 0;
|
||||
|
|
@ -255,7 +255,7 @@ struct memViewWin_t
|
|||
addr &= 0x3FFF;
|
||||
if (addr < 0x2000)
|
||||
{
|
||||
VPage[addr >> 10][addr] = value; //todo: detect if this is vrom and turn it red if so
|
||||
VPage[addr >> 9][addr] = value; //todo: detect if this is vrom and turn it red if so
|
||||
}
|
||||
if ((addr >= 0x2000) && (addr < 0x3F00))
|
||||
{
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -27,7 +27,7 @@
|
|||
|
||||
HWND hPPUView;
|
||||
|
||||
extern uint8 *VPage[8];
|
||||
extern uint8 *VPage[16];
|
||||
extern uint8 PALRAM[0x20];
|
||||
extern uint8 UPALRAM[3];
|
||||
|
||||
|
|
@ -158,16 +158,16 @@ void FCEUD_UpdatePPUView(int scanline, int refreshchr)
|
|||
{
|
||||
for (i = 0, x=0x1000; i < 0x1000; i++, x++)
|
||||
{
|
||||
chrcache0[i] = VPage[i>>10][i];
|
||||
chrcache1[i] = VPage[x>>10][x];
|
||||
chrcache0[i] = VPage[i>>9][i];
|
||||
chrcache1[i] = VPage[x>>9][x];
|
||||
if (debug_loggingCD) {
|
||||
if (cdloggerVideoDataSize)
|
||||
{
|
||||
int addr;
|
||||
addr = &VPage[i >> 10][i] - CHRptr[0];
|
||||
addr = &VPage[i >> 9][i] - CHRptr[0];
|
||||
if ((addr >= 0) && (addr < (int)cdloggerVideoDataSize))
|
||||
logcache0[i] = cdloggervdata[addr];
|
||||
addr = &VPage[x >> 10][x] - CHRptr[0];
|
||||
addr = &VPage[x >> 9][x] - CHRptr[0];
|
||||
if ((addr >= 0) && (addr < (int)cdloggerVideoDataSize))
|
||||
logcache1[i] = cdloggervdata[addr];
|
||||
} else {
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ extern void FCEUD_BlitScreen(uint8 *XBuf); //needed for pause, not sure where th
|
|||
extern uint8 PALRAM[0x20];
|
||||
extern uint8 PPU[4];
|
||||
extern uint8 *vnapage[4];
|
||||
extern uint8 *VPage[8];
|
||||
extern uint8 *VPage[16];
|
||||
//------------------------------
|
||||
HWND hTextHooker;
|
||||
|
||||
|
|
@ -303,14 +303,14 @@ void UpdateTextHooker() {
|
|||
if ( EmulationPaused == 1 ) {
|
||||
//if the selection has changed since we paused
|
||||
if ( tileToggles[x][y] != pausedTileToggles[x][y] ) {
|
||||
DrawTextHookerChr(pbitmap,&VPage[(ptable+chr)>>10][ptable+chr],tileattr,1);
|
||||
DrawTextHookerChr(pbitmap,&VPage[(ptable+chr)>>9][ptable+chr],tileattr,1);
|
||||
} else { //nothing has changed since we paused
|
||||
DrawTextHookerChr(pbitmap,&VPage[(ptable+chr)>>10][ptable+chr],tileattr,0);
|
||||
DrawTextHookerChr(pbitmap,&VPage[(ptable+chr)>>9][ptable+chr],tileattr,0);
|
||||
}
|
||||
//after updates have been made to tileToggles, reset pausedTileToggles
|
||||
pausedTileToggles[x][y] = tileToggles[x][y];
|
||||
} else { //we aren't paused, do a normal call
|
||||
DrawTextHookerChr(pbitmap,&VPage[(ptable+chr)>>10][ptable+chr],tileattr,tileToggles[x][y]);
|
||||
DrawTextHookerChr(pbitmap,&VPage[(ptable+chr)>>9][ptable+chr],tileattr,tileToggles[x][y]);
|
||||
}
|
||||
pbitmap += (8*3);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -799,6 +799,7 @@ BMAPPINGLocal bmap[] = {
|
|||
{"KONAMI QTAi Board", 547, QTAi_Init },
|
||||
|
||||
{"RAINBOW13", 3872, RAINBOW13_Init },
|
||||
{"RAINBOW2", 3873, RAINBOW2_Init },
|
||||
|
||||
{"", 0, NULL}
|
||||
};
|
||||
|
|
@ -1182,7 +1183,7 @@ static int iNES_Init(int num) {
|
|||
}
|
||||
if (CHRRAMSize > 0)
|
||||
{
|
||||
int mCHRRAMSize = (CHRRAMSize < 1024) ? 1024 : CHRRAMSize; // VPage has a resolution of 1k banks, ensure minimum allocation to prevent malicious access from NES software
|
||||
int mCHRRAMSize = (CHRRAMSize < 512) ? 512 : CHRRAMSize; // VPage has a resolution of 512B banks, ensure minimum allocation to prevent malicious access from NES software
|
||||
if ((UNIFchrrama = VROM = (uint8*)FCEU_dmalloc(mCHRRAMSize)) == NULL) return 2;
|
||||
FCEU_MemoryRand(VROM, CHRRAMSize);
|
||||
SetupCartCHRMapping(0, VROM, CHRRAMSize, 1);
|
||||
|
|
|
|||
2054
src/ppu.cpp
2054
src/ppu.cpp
File diff suppressed because it is too large
Load Diff
|
|
@ -16,7 +16,7 @@ void newppu_hacky_emergency_reset();
|
|||
/* For cart.c and banksw.h, mostly */
|
||||
extern uint8 NTARAM[0x800], *vnapage[4];
|
||||
extern uint8 PPUNTARAM;
|
||||
extern uint8 PPUCHRRAM;
|
||||
extern uint16 PPUCHRRAM;
|
||||
|
||||
void FCEUPPU_SaveState(void);
|
||||
void FCEUPPU_LoadState(int version);
|
||||
|
|
|
|||
|
|
@ -63,6 +63,7 @@ void QTAi_Init(CartInfo *info);
|
|||
void NROM_Init(CartInfo *info);
|
||||
void Novel_Init(CartInfo *info);
|
||||
void RAINBOW13_Init(CartInfo *info);
|
||||
void RAINBOW2_Init(CartInfo *info);
|
||||
void S74LS374NA_Init(CartInfo *info);
|
||||
void S74LS374N_Init(CartInfo *info);
|
||||
void S8259A_Init(CartInfo *info);
|
||||
|
|
|
|||
|
|
@ -505,6 +505,7 @@ xcopy /y /d "$(ProjectDir)\..\src\drivers\win\7z_64.dll" "$(OutDir)"</Command>
|
|||
<ClCompile Include="..\src\boards\mmc2and4.cpp" />
|
||||
<ClCompile Include="..\src\boards\onebus.cpp" />
|
||||
<ClCompile Include="..\src\boards\pec-586.cpp" />
|
||||
<ClCompile Include="..\src\boards\rainbow2.cpp" />
|
||||
<ClCompile Include="..\src\boards\rainbow_esp.cpp" />
|
||||
<ClCompile Include="..\src\boards\rainbow13.cpp" />
|
||||
<ClCompile Include="..\src\boards\RNBW\easywsclient.cpp" />
|
||||
|
|
|
|||
|
|
@ -1142,6 +1142,9 @@
|
|||
<ClCompile Include="..\src\boards\RNBW\pping.c">
|
||||
<Filter>boards</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\src\boards\rainbow2.cpp">
|
||||
<Filter>boards</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="..\src\drivers\common\args.h">
|
||||
|
|
|
|||
Loading…
Reference in New Issue