Merge pull request #596 from Kagamiin/feature/vrc-irq-cycle-mode
Implementing cycle IRQ mode for Konami VRC mappers
This commit is contained in:
commit
552be94c1a
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@ -23,7 +23,7 @@
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static bool isPirate;
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static bool isPirate;
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static uint8 is22, reg1mask, reg2mask;
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static uint8 is22, reg1mask, reg2mask;
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static uint16 IRQCount;
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static uint16 IRQCount;
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static uint8 IRQLatch, IRQa;
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static uint8 IRQLatch, IRQa, IRQMode;
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static uint8 prgreg[2], chrreg[8];
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static uint8 prgreg[2], chrreg[8];
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static uint16 chrhi[8];
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static uint16 chrhi[8];
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static uint8 regcmd, irqcmd, mirr, big_bank;
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static uint8 regcmd, irqcmd, mirr, big_bank;
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@ -45,6 +45,7 @@ static SFORMAT StateRegs[] =
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{ &IRQCount, 2, "IRQC" },
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{ &IRQCount, 2, "IRQC" },
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{ &IRQLatch, 1, "IRQL" },
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{ &IRQLatch, 1, "IRQL" },
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{ &IRQa, 1, "IRQA" },
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{ &IRQa, 1, "IRQA" },
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{ &IRQMode, 1, "IRQM" },
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{ 0 }
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{ 0 }
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};
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};
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@ -115,7 +116,7 @@ static DECLFW(VRC24Write) {
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case 0x9003: regcmd = V; Sync(); break;
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case 0x9003: regcmd = V; Sync(); break;
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case 0xF000: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0xF0; IRQLatch |= V & 0xF; break;
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case 0xF000: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0xF0; IRQLatch |= V & 0xF; break;
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case 0xF001: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0x0F; IRQLatch |= V << 4; break;
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case 0xF001: X6502_IRQEnd(FCEU_IQEXT); IRQLatch &= 0x0F; IRQLatch |= V << 4; break;
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case 0xF002: X6502_IRQEnd(FCEU_IQEXT); acount = 0; IRQCount = IRQLatch; IRQa = V & 2; irqcmd = V & 1; break;
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case 0xF002: X6502_IRQEnd(FCEU_IQEXT); acount = 0; IRQCount = IRQLatch; IRQMode = V & 4; IRQa = V & 2; irqcmd = V & 1; break;
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case 0xF003: X6502_IRQEnd(FCEU_IQEXT); IRQa = irqcmd; break;
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case 0xF003: X6502_IRQEnd(FCEU_IQEXT); IRQa = irqcmd; break;
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}
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}
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}
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}
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@ -136,16 +137,28 @@ static void VRC24Power(void) {
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void VRC24IRQHook(int a) {
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void VRC24IRQHook(int a) {
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#define LCYCS 341
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#define LCYCS 341
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if (IRQa) {
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if (IRQa) {
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acount += a * 3;
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if (IRQMode) {
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if (acount >= LCYCS) {
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acount += a;
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while (acount >= LCYCS) {
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while (acount > 0) {
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acount -= LCYCS;
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acount--;
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IRQCount++;
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IRQCount++;
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if (IRQCount & 0x100) {
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if (IRQCount & 0x100) {
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X6502_IRQBegin(FCEU_IQEXT);
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X6502_IRQBegin(FCEU_IQEXT);
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IRQCount = IRQLatch;
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IRQCount = IRQLatch;
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}
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}
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}
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}
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} else {
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acount += a * 3;
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if (acount >= LCYCS) {
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while (acount >= LCYCS) {
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acount -= LCYCS;
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IRQCount++;
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if (IRQCount & 0x100) {
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X6502_IRQBegin(FCEU_IQEXT);
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IRQCount = IRQLatch;
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}
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}
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}
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}
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}
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}
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}
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}
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}
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@ -25,7 +25,7 @@
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static uint8 is26;
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static uint8 is26;
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static uint8 prg[2], chr[8], mirr;
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static uint8 prg[2], chr[8], mirr;
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static uint8 IRQLatch, IRQa, IRQd;
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static uint8 IRQLatch, IRQa, IRQd, IRQMode;
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static int32 IRQCount, CycleCount;
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static int32 IRQCount, CycleCount;
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static uint8 *WRAM = NULL;
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static uint8 *WRAM = NULL;
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static uint32 WRAMSIZE;
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static uint32 WRAMSIZE;
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@ -40,6 +40,7 @@ static SFORMAT StateRegs[] =
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{ &IRQLatch, 1, "IRQL" },
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{ &IRQLatch, 1, "IRQL" },
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{ &IRQCount, 4, "IRQC" },
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{ &IRQCount, 4, "IRQC" },
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{ &CycleCount, 4, "CYCC" },
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{ &CycleCount, 4, "CYCC" },
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{ &IRQMode, 1, "IRQM" },
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{ 0 }
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{ 0 }
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};
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};
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@ -109,6 +110,7 @@ static DECLFW(VRC6Write) {
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case 0xE003: chr[7] = V; Sync(); break;
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case 0xE003: chr[7] = V; Sync(); break;
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case 0xF000: IRQLatch = V; X6502_IRQEnd(FCEU_IQEXT); break;
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case 0xF000: IRQLatch = V; X6502_IRQEnd(FCEU_IQEXT); break;
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case 0xF001:
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case 0xF001:
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IRQMode = V & 4;
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IRQa = V & 2;
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IRQa = V & 2;
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IRQd = V & 1;
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IRQd = V & 1;
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if (V & 2)
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if (V & 2)
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@ -132,13 +134,25 @@ static void VRC6Power(void) {
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static void VRC6IRQHook(int a) {
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static void VRC6IRQHook(int a) {
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if (IRQa) {
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if (IRQa) {
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CycleCount += a * 3;
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if (IRQMode) {
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while(CycleCount >= 341) {
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CycleCount += a;
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CycleCount -= 341;
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while (CycleCount > 0) {
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IRQCount++;
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CycleCount--;
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if (IRQCount == 0x100) {
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IRQCount++;
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IRQCount = IRQLatch;
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if (IRQCount & 0x100) {
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X6502_IRQBegin(FCEU_IQEXT);
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X6502_IRQBegin(FCEU_IQEXT);
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IRQCount = IRQLatch;
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}
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}
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} else {
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CycleCount += a * 3;
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while(CycleCount >= 341) {
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CycleCount -= 341;
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IRQCount++;
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if (IRQCount == 0x100) {
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IRQCount = IRQLatch;
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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}
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}
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}
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}
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}
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@ -21,7 +21,7 @@
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#include "mapinc.h"
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#include "mapinc.h"
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static uint8 vrc7idx, preg[3], creg[8], mirr;
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static uint8 vrc7idx, preg[3], creg[8], mirr;
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static uint8 IRQLatch, IRQa, IRQd;
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static uint8 IRQLatch, IRQa, IRQd, IRQMode;
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static int32 IRQCount, CycleCount;
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static int32 IRQCount, CycleCount;
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static uint8 *WRAM = NULL;
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static uint8 *WRAM = NULL;
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static uint32 WRAMSIZE;
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static uint32 WRAMSIZE;
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@ -44,6 +44,7 @@ static SFORMAT StateRegs[] =
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{ &IRQCount, 4, "IRQC" },
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{ &IRQCount, 4, "IRQC" },
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{ &CycleCount, 4, "CYCC" },
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{ &CycleCount, 4, "CYCC" },
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{ (void**)VRC7Sound_saveptr, sizeof(*VRC7Sound) | FCEUSTATE_INDIRECT, "VRC7" },
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{ (void**)VRC7Sound_saveptr, sizeof(*VRC7Sound) | FCEUSTATE_INDIRECT, "VRC7" },
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{ &IRQMode, 1, "IRQM" },
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{0}
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{0}
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};
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};
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@ -134,6 +135,7 @@ static DECLFW(VRC7Write) {
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case 0xE000: mirr = V & 3; Sync(); break;
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case 0xE000: mirr = V & 3; Sync(); break;
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case 0xE010: IRQLatch = V; X6502_IRQEnd(FCEU_IQEXT); break;
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case 0xE010: IRQLatch = V; X6502_IRQEnd(FCEU_IQEXT); break;
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case 0xF000:
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case 0xF000:
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IRQMode = V & 4;
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IRQa = V & 2;
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IRQa = V & 2;
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IRQd = V & 1;
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IRQd = V & 1;
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if (V & 2)
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if (V & 2)
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@ -165,13 +167,25 @@ static void VRC7Close(void)
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static void VRC7IRQHook(int a) {
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static void VRC7IRQHook(int a) {
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if (IRQa) {
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if (IRQa) {
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CycleCount += a * 3;
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if (IRQMode) {
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while(CycleCount >= 341) {
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CycleCount += a;
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CycleCount -= 341;
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while (CycleCount > 0) {
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IRQCount++;
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CycleCount--;
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if (IRQCount == 0x100) {
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IRQCount++;
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IRQCount = IRQLatch;
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if (IRQCount & 0x100) {
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X6502_IRQBegin(FCEU_IQEXT);
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X6502_IRQBegin(FCEU_IQEXT);
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IRQCount = IRQLatch;
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}
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}
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} else {
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CycleCount += a * 3;
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while(CycleCount >= 341) {
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CycleCount -= 341;
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IRQCount++;
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if (IRQCount == 0x100) {
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IRQCount = IRQLatch;
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X6502_IRQBegin(FCEU_IQEXT);
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}
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}
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}
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}
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}
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}
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}
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