more mapper madness
This commit is contained in:
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4d763e782f
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@ -16,88 +16,94 @@
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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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* TXC mappers
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*
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* TXC mappers, originally much complex banksitching
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*
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* 01-22111-000 (05-00002-010) (132, 22211) - MGC-001 Qi Wang
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* 01-22110-000 (52S ) - MGC-002 2-in-1 Gun
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* 01-22111-100 (02-00002-010) (173 ) - MGC-008 Mahjong Block
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* (079 ) - MGC-012 Poke Block
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* 01-22110-200 (05-00002-010) (036 ) - MGC-014 Strike Wolf
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* 01-22000-400 (05-00002-010) (036 ) - MGC-015 Policeman
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* 01-22017-000 (05-PT017-080) (189 ) - MGC-017 Thunder Warrior
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* 01-11160-000 (04-02310-000) ( , 11160) - MGC-023 6-in-1
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* 01-22270-000 (05-00002-010) (132, 22211) - MGC-xxx Creatom
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* 01-22200-400 (------------) (079 ) - ET.03 F-15 City War
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* (172 ) - 1991 Du Ma Racing
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*
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*/
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*/
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#include "mapinc.h"
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#include "mapinc.h"
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static uint8 reg[4], cmd, is172, is173;
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static uint8 reg[4], cmd, is172, is173;
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static SFORMAT StateRegs[]=
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static SFORMAT StateRegs[] =
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{
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{
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{reg, 4, "REGS"},
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{ reg, 4, "REGS" },
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{&cmd, 1, "CMD"},
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{ &cmd, 1, "CMD" },
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{0}
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{ 0 }
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};
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};
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static void Sync(void)
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static void Sync(void) {
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{
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setprg32(0x8000, (reg[2] >> 2) & 1);
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setprg32(0x8000,(reg[2]>>2)&1);
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if (is172)
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if(is172)
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setchr8((((cmd ^ reg[2]) >> 3) & 2) | (((cmd ^ reg[2]) >> 5) & 1)); // 1991 DU MA Racing probably CHR bank sequence is WRONG, so it is possible to
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setchr8((((cmd^reg[2])>>3)&2)|(((cmd^reg[2])>>5)&1)); // 1991 DU MA Racing probably CHR bank sequence is WRONG, so it is possible to
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// rearrange CHR banks for normal UNIF board and mapper 172 is unneccessary
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// rearrange CHR banks for normal UNIF board and mapper 172 is unneccessary
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else
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else
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setchr8(reg[2]&3);
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setchr8(reg[2] & 3);
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}
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}
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static DECLFW(UNL22211WriteLo)
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static DECLFW(UNL22211WriteLo) {
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{
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// FCEU_printf("bs %04x %02x\n",A,V);
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// FCEU_printf("bs %04x %02x\n",A,V);
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reg[A&3]=V;
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reg[A & 3] = V;
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}
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}
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static DECLFW(UNL22211WriteHi)
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static DECLFW(UNL22211WriteHi) {
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{
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// FCEU_printf("bs %04x %02x\n",A,V);
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// FCEU_printf("bs %04x %02x\n",A,V);
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cmd=V;
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cmd = V;
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Sync();
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Sync();
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}
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}
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static DECLFR(UNL22211ReadLo)
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static DECLFR(UNL22211ReadLo) {
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{
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return (reg[1] ^ reg[2]) | (is173 ? 0x01 : 0x40);
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return (reg[1]^reg[2])|(is173?0x01:0x40);
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// if(reg[3])
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// if(reg[3])
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// return reg[2];
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// return reg[2];
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// else
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// else
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// return X.DB;
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// return X.DB;
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}
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}
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static void UNL22211Power(void)
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static void UNL22211Power(void) {
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{
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Sync();
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Sync();
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SetReadHandler(0x8000,0xFFFF,CartBR);
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SetReadHandler(0x8000, 0xFFFF, CartBR);
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SetReadHandler(0x4100,0x4100,UNL22211ReadLo);
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SetReadHandler(0x4100, 0x4100, UNL22211ReadLo);
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SetWriteHandler(0x4100,0x4103,UNL22211WriteLo);
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SetWriteHandler(0x4100, 0x4103, UNL22211WriteLo);
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SetWriteHandler(0x8000,0xFFFF,UNL22211WriteHi);
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SetWriteHandler(0x8000, 0xFFFF, UNL22211WriteHi);
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}
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}
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static void StateRestore(int version)
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static void StateRestore(int version) {
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{
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Sync();
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Sync();
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}
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}
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void UNL22211_Init(CartInfo *info)
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void UNL22211_Init(CartInfo *info) {
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{
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is172 = 0;
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is172=0;
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is173 = 0;
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is173=0;
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info->Power = UNL22211Power;
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info->Power=UNL22211Power;
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GameStateRestore = StateRestore;
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GameStateRestore=StateRestore;
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AddExState(&StateRegs, ~0, 0, 0);
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AddExState(&StateRegs, ~0, 0, 0);
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}
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}
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void Mapper172_Init(CartInfo *info)
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void Mapper172_Init(CartInfo *info) {
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{
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is172 = 1;
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is172=1;
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is173 = 0;
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is173=0;
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info->Power = UNL22211Power;
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info->Power=UNL22211Power;
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GameStateRestore = StateRestore;
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GameStateRestore=StateRestore;
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AddExState(&StateRegs, ~0, 0, 0);
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AddExState(&StateRegs, ~0, 0, 0);
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}
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}
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void Mapper173_Init(CartInfo *info)
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void Mapper173_Init(CartInfo *info) {
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{
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is172 = 0;
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is172=0;
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is173 = 1;
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is173=1;
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info->Power = UNL22211Power;
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info->Power=UNL22211Power;
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GameStateRestore = StateRestore;
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GameStateRestore=StateRestore;
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AddExState(&StateRegs, ~0, 0, 0);
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AddExState(&StateRegs, ~0, 0, 0);
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}
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}
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@ -16,35 +16,41 @@
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* You should have received a copy of the GNU General Public License
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* Many-in-one hacked mapper crap.
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*
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* Original BNROM is actually AxROM variations without mirroring control,
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* and haven't SRAM on-board, so it must be removed from here
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*
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* Difficult banking is what NINA board doing, most hacks for 34 mapper are
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* NINA hacks, so this is actually 34 mapper
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*
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*/
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*/
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#include "mapinc.h"
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#include "mapinc.h"
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static uint8 regs[3];
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static uint8 regs[3];
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static uint8 *WRAM=NULL;
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static uint8 *WRAM = NULL;
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static uint32 WRAMSIZE;
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static uint32 WRAMSIZE;
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static SFORMAT StateRegs[]=
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static SFORMAT StateRegs[] =
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{
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{
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{regs, 3, "REGS"},
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{ regs, 3, "REGS" },
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{0}
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{ 0 }
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};
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};
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static void Sync(void)
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static void Sync(void) {
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{
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setprg8r(0x10, 0x6000, 0);
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setprg8r(0x10,0x6000,0);
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setprg32(0x8000, regs[0]);
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setprg32(0x8000,regs[0]);
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setchr4(0x0000, regs[1]);
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setchr4(0x0000,regs[1]);
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setchr4(0x1000, regs[2]);
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setchr4(0x1000,regs[2]);
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}
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}
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static DECLFW(M34Write)
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static DECLFW(M34Write) {
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{
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if (A >= 0x8000)
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if(A>=0x8000)
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regs[0] = V;
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regs[0] = V;
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else
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else
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switch(A)
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switch (A) {
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{
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case 0x7ffd: regs[0] = V; break;
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case 0x7ffd: regs[0] = V; break;
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case 0x7ffe: regs[1] = V; break;
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case 0x7ffe: regs[1] = V; break;
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case 0x7fff: regs[2] = V; break;
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case 0x7fff: regs[2] = V; break;
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@ -52,37 +58,34 @@ static DECLFW(M34Write)
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Sync();
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Sync();
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}
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}
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static void M34Power(void)
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static void M34Power(void) {
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{
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regs[0] = regs[1] = 0;
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regs[0] = 0;
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regs[2] = 1;
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Sync();
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Sync();
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SetReadHandler(0x6000,0x7ffc,CartBR);
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SetReadHandler(0x6000, 0x7ffc, CartBR);
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SetWriteHandler(0x6000,0x7ffc,CartBW);
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SetWriteHandler(0x6000, 0x7ffc, CartBW);
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SetReadHandler(0x8000,0xffff,CartBR);
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SetReadHandler(0x8000, 0xffff, CartBR);
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SetWriteHandler(0x7ffd,0xffff,M34Write);
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SetWriteHandler(0x7ffd, 0xffff, M34Write);
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}
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}
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static void M34Close(void)
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static void M34Close(void) {
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{
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if (WRAM)
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if(WRAM)
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FCEU_gfree(WRAM);
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FCEU_gfree(WRAM);
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WRAM=NULL;
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WRAM = NULL;
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}
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}
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static void StateRestore(int version)
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static void StateRestore(int version) {
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{
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Sync();
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Sync();
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}
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}
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void Mapper34_Init(CartInfo *info)
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void Mapper34_Init(CartInfo *info) {
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{
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info->Power = M34Power;
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info->Power=M34Power;
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info->Close = M34Close;
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info->Close=M34Close;
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GameStateRestore = StateRestore;
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GameStateRestore=StateRestore;
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WRAMSIZE=8192;
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WRAMSIZE = 8192;
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WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
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WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
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SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);
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SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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AddExState(WRAM, WRAMSIZE, 0, "WRAM");
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AddExState(&StateRegs, ~0, 0, 0);
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AddExState(&StateRegs, ~0, 0, 0);
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@ -44,8 +44,8 @@ static void LatchPower(void) {
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if (WRAM) {
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if (WRAM) {
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SetReadHandler(0x6000, 0x7FFF, CartBR);
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SetReadHandler(0x6000, 0x7FFF, CartBR);
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SetWriteHandler(0x6000, 0x7FFF, CartBW);
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SetWriteHandler(0x6000, 0x7FFF, CartBW);
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}
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} else
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SetReadHandler(0x8000, 0xFFFF, defread);
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SetReadHandler(0x6000, 0xFFFF, defread);
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SetWriteHandler(addrreg0, addrreg1, LatchWrite);
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SetWriteHandler(addrreg0, addrreg1, LatchWrite);
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}
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}
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@ -67,7 +67,7 @@ static void Latch_Init(CartInfo *info, void (*proc)(void), readfunc func, uint16
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if (func != NULL)
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if (func != NULL)
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defread = func;
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defread = func;
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else
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else
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defread = CartBR;
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defread = CartBROB;
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info->Power = LatchPower;
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info->Power = LatchPower;
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info->Reset = LatchReset;
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info->Reset = LatchReset;
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info->Close = LatchClose;
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info->Close = LatchClose;
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@ -103,7 +103,7 @@ static void BMCD1038Sync(void) {
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if (latche & 0x80) {
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if (latche & 0x80) {
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setprg16(0x8000, (latche & 0x70) >> 4);
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setprg16(0x8000, (latche & 0x70) >> 4);
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setprg16(0xC000, (latche & 0x70) >> 4);
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setprg16(0xC000, (latche & 0x70) >> 4);
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}else
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} else
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setprg32(0x8000, (latche & 0x60) >> 5);
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setprg32(0x8000, (latche & 0x60) >> 5);
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setchr8(latche & 7);
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setchr8(latche & 7);
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setmirror(((latche & 8) >> 3) ^ 1);
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setmirror(((latche & 8) >> 3) ^ 1);
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@ -132,7 +132,7 @@ void BMCD1038_Init(CartInfo *info) {
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static void UNL43272Sync(void) {
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static void UNL43272Sync(void) {
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if ((latche & 0x81) == 0x81) {
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if ((latche & 0x81) == 0x81) {
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setprg32(0x8000, (latche & 0x38) >> 3);
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setprg32(0x8000, (latche & 0x38) >> 3);
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}else
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} else
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FCEU_printf("unrecognized command %04!\n", latche);
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FCEU_printf("unrecognized command %04!\n", latche);
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setchr8(0);
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setchr8(0);
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setmirror(0);
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setmirror(0);
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@ -162,7 +162,7 @@ static void BMCGK192Sync(void) {
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if (latche & 0x40) {
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if (latche & 0x40) {
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setprg16(0x8000, latche & 7);
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setprg16(0x8000, latche & 7);
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setprg16(0xC000, latche & 7);
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setprg16(0xC000, latche & 7);
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}else
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} else
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setprg32(0x8000, (latche >> 1) & 3);
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setprg32(0x8000, (latche >> 1) & 3);
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setchr8((latche >> 3) & 7);
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setchr8((latche >> 3) & 7);
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setmirror(((latche & 0x80) >> 7) ^ 1);
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setmirror(((latche & 0x80) >> 7) ^ 1);
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@ -205,7 +205,7 @@ static void M92Sync(void) {
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case 0xD0: setprg16(0xc000, latche & 15); break;
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case 0xD0: setprg16(0xc000, latche & 15); break;
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case 0xE0: setchr8(latche & 15); break;
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case 0xE0: setchr8(latche & 15); break;
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}
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}
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}else {
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} else {
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switch (reg) {
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switch (reg) {
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case 0xB0: setprg16(0xc000, latche & 15); break;
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case 0xB0: setprg16(0xc000, latche & 15); break;
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case 0x70: setchr8(latche & 15); break;
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case 0x70: setchr8(latche & 15); break;
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@ -249,11 +249,14 @@ void Mapper201_Init(CartInfo *info) {
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//------------------ Map 202 ---------------------------
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//------------------ Map 202 ---------------------------
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static void M202Sync(void) {
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static void M202Sync(void) {
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int32 tmp = (latche >> 1) & 0x7;
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// According to more carefull hardware tests and PCB study
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setmirror((latche & 1)^1);
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int32 mirror = latche & 1;
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setprg16(0x8000, tmp);
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int32 bank = (latche >> 1) & 0x7;
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setprg16(0xc000, tmp + (((tmp & 0x6) == 0x6) ? 1 : 0));
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int32 select = (mirror & (bank >> 2));
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setchr8(tmp);
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setprg16(0x8000, select ? (bank & 6) | 0 : bank);
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setprg16(0xc000, select ? (bank & 6) | 1 : bank);
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setmirror(mirror ^ 1);
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setchr8(bank);
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}
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}
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void Mapper202_Init(CartInfo *info) {
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void Mapper202_Init(CartInfo *info) {
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@ -277,6 +280,13 @@ void Mapper204_Init(CartInfo *info) {
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//------------------ Map 212 ---------------------------
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//------------------ Map 212 ---------------------------
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static DECLFR(M212Read) {
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uint8 ret = CartBROB(A);
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if ((A & 0xE010) == 0x6000)
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ret |= 0x80;
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return ret;
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}
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static void M212Sync(void) {
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static void M212Sync(void) {
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if(latche & 0x4000) {
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if(latche & 0x4000) {
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setprg32(0x8000, (latche >> 1) & 3);
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setprg32(0x8000, (latche >> 1) & 3);
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@ -289,7 +299,7 @@ static void M212Sync(void) {
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}
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}
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void Mapper212_Init(CartInfo *info) {
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void Mapper212_Init(CartInfo *info) {
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Latch_Init(info, M212Sync, NULL, 0xFFFF, 0x8000, 0xFFFF, 0);
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Latch_Init(info, M212Sync, M212Read, 0xFFFF, 0x8000, 0xFFFF, 0);
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}
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}
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//------------------ Map 213 ---------------------------
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//------------------ Map 213 ---------------------------
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@ -315,6 +325,17 @@ void Mapper214_Init(CartInfo *info) {
|
||||||
Latch_Init(info, M214Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
Latch_Init(info, M214Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//------------------ Map 217 ---------------------------
|
||||||
|
|
||||||
|
static void M217Sync(void) {
|
||||||
|
setprg32(0x8000, (latche >> 2) & 3);
|
||||||
|
setchr8(latche & 7);
|
||||||
|
}
|
||||||
|
|
||||||
|
void Mapper217_Init(CartInfo *info) {
|
||||||
|
Latch_Init(info, M217Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||||
|
}
|
||||||
|
|
||||||
//------------------ Map 227 ---------------------------
|
//------------------ Map 227 ---------------------------
|
||||||
|
|
||||||
static void M227Sync(void) {
|
static void M227Sync(void) {
|
||||||
|
@ -408,9 +429,9 @@ void Mapper242_Init(CartInfo *info) {
|
||||||
//------------------ 190in1 ---------------------------
|
//------------------ 190in1 ---------------------------
|
||||||
|
|
||||||
static void BMC190in1Sync(void) {
|
static void BMC190in1Sync(void) {
|
||||||
setprg16(0x8000, (latche >> 2) & 0x07);
|
setprg16(0x8000, (latche >> 2) & 7);
|
||||||
setprg16(0xC000, (latche >> 2) & 0x07);
|
setprg16(0xC000, (latche >> 2) & 7);
|
||||||
setchr8((latche >> 2) & 0x07);
|
setchr8((latche >> 2) & 7);
|
||||||
setmirror((latche & 1) ^ 1);
|
setmirror((latche & 1) ^ 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -448,7 +469,7 @@ static void BMCNTD03Sync(void) {
|
||||||
if (latche & 0x80) {
|
if (latche & 0x80) {
|
||||||
setprg16(0x8000, prg | ((latche >> 6) & 1));
|
setprg16(0x8000, prg | ((latche >> 6) & 1));
|
||||||
setprg16(0xC000, prg | ((latche >> 6) & 1));
|
setprg16(0xC000, prg | ((latche >> 6) & 1));
|
||||||
}else
|
} else
|
||||||
setprg32(0x8000, prg >> 1);
|
setprg32(0x8000, prg >> 1);
|
||||||
setchr8(chr);
|
setchr8(chr);
|
||||||
setmirror(((latche >> 10) & 1) ^ 1);
|
setmirror(((latche >> 10) & 1) ^ 1);
|
||||||
|
@ -457,3 +478,25 @@ static void BMCNTD03Sync(void) {
|
||||||
void BMCNTD03_Init(CartInfo *info) {
|
void BMCNTD03_Init(CartInfo *info) {
|
||||||
Latch_Init(info, BMCNTD03Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
Latch_Init(info, BMCNTD03Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//-------------- BMCG-146 ------------------------
|
||||||
|
|
||||||
|
static void BMCG146Sync(void) {
|
||||||
|
setchr8(0);
|
||||||
|
if (latche & 0x800) { // UNROM mode
|
||||||
|
setprg16(0x8000, (latche & 0x1F) | (latche & ((latche & 0x40) >> 6)));
|
||||||
|
setprg16(0xC000, (latche & 0x18) | 7);
|
||||||
|
} else {
|
||||||
|
if (latche & 0x40) { // 16K mode
|
||||||
|
setprg16(0x8000, latche & 0x1F);
|
||||||
|
setprg16(0xC000, latche & 0x1F);
|
||||||
|
} else {
|
||||||
|
setprg32(0x8000, (latche >> 1) & 0x0F);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
setmirror(((latche & 0x80) >> 7) ^ 1);
|
||||||
|
}
|
||||||
|
|
||||||
|
void BMCG146_Init(CartInfo *info) {
|
||||||
|
Latch_Init(info, BMCG146Sync, NULL, 0x0000, 0x8000, 0xFFFF, 0);
|
||||||
|
}
|
||||||
|
|
|
@ -42,7 +42,7 @@ static void LatchPower(void) {
|
||||||
if (WRAM) {
|
if (WRAM) {
|
||||||
SetReadHandler(0x6000, 0xFFFF, CartBR);
|
SetReadHandler(0x6000, 0xFFFF, CartBR);
|
||||||
SetWriteHandler(0x6000, 0x7FFF, CartBW);
|
SetWriteHandler(0x6000, 0x7FFF, CartBW);
|
||||||
}else {
|
} else {
|
||||||
SetReadHandler(0x8000, 0xFFFF, CartBR);
|
SetReadHandler(0x8000, 0xFFFF, CartBR);
|
||||||
}
|
}
|
||||||
SetWriteHandler(addrreg0, addrreg1, LatchWrite);
|
SetWriteHandler(addrreg0, addrreg1, LatchWrite);
|
||||||
|
@ -478,3 +478,16 @@ void BMCA65AS_Init(CartInfo *info) {
|
||||||
Latch_Init(info, BMCA65ASSync, 0, 0x8000, 0xFFFF, 0, 0);
|
Latch_Init(info, BMCA65ASSync, 0, 0x8000, 0xFFFF, 0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
//------------------ BMC-11160 ---------------------------
|
||||||
|
// Simple BMC discrete mapper by TXC
|
||||||
|
|
||||||
|
static void BMC11160Sync(void) {
|
||||||
|
uint32 bank = (latche >> 4) & 7;
|
||||||
|
setprg32(0x8000, bank);
|
||||||
|
setchr8((bank << 2) | (latche & 3));
|
||||||
|
setmirror((latche >> 7) & 1);
|
||||||
|
}
|
||||||
|
|
||||||
|
void BMC11160_Init(CartInfo *info) {
|
||||||
|
Latch_Init(info, BMC11160Sync, 0, 0x8000, 0xFFFF, 0, 0);
|
||||||
|
}
|
||||||
|
|
|
@ -178,6 +178,7 @@
|
||||||
{0x5b457641, 157, 8}, /* Datach Ultraman Club */
|
{0x5b457641, 157, 8}, /* Datach Ultraman Club */
|
||||||
{0xf51a7f46, 157, 8}, /* Datach Yuu Yuu Hakusho */
|
{0xf51a7f46, 157, 8}, /* Datach Yuu Yuu Hakusho */
|
||||||
{0x58152b42, 160, 1}, /* Pipe 5 (Sachen) */
|
{0x58152b42, 160, 1}, /* Pipe 5 (Sachen) */
|
||||||
|
{0x1c098942, 162, -1}, /* Xi You Ji Hou Zhuan (Ch) */
|
||||||
{0x081caaff, 163, -1}, /* Commandos (Ch) */
|
{0x081caaff, 163, -1}, /* Commandos (Ch) */
|
||||||
{0x02c41438, 176, -1}, /* Xing He Zhan Shi (C) */
|
{0x02c41438, 176, -1}, /* Xing He Zhan Shi (C) */
|
||||||
{0x558c0dc3, 178, -1}, /* Super 2in1 (unl)[!] {mapper unsupported} */
|
{0x558c0dc3, 178, -1}, /* Super 2in1 (unl)[!] {mapper unsupported} */
|
||||||
|
@ -226,11 +227,21 @@
|
||||||
{0xd323b806, 210, 1}, /* Wagyan Land 3 */
|
{0xd323b806, 210, 1}, /* Wagyan Land 3 */
|
||||||
{0xbd523011, 210, 2}, /* Dream Master */
|
{0xbd523011, 210, 2}, /* Dream Master */
|
||||||
{0x5daae69a, 211, -1}, /* Aladdin - Return of Jaffar, The (Unl) [!] */
|
{0x5daae69a, 211, -1}, /* Aladdin - Return of Jaffar, The (Unl) [!] */
|
||||||
|
{0x046d70cc, 217, -1}, /* 500-in-1 (Anim Splash, Alt Mapper)[p1][!] */
|
||||||
|
{0x12f86a4d, 217, -1}, /* 500-in-1 (Static Splash, Alt Mapper)[p1][!] */
|
||||||
|
{0xd09f778d, 217, -1}, /* 9999999-in-1 (Static Splash, Alt Mapper)[p1][!] */
|
||||||
{0x62ef6c79, 232, 8}, /* Quattro Sports -Aladdin */
|
{0x62ef6c79, 232, 8}, /* Quattro Sports -Aladdin */
|
||||||
{0x2705eaeb, 234, -1}, /* Maxi 15 */
|
{0x2705eaeb, 234, -1}, /* Maxi 15 */
|
||||||
{0x6f12afc5, 235, -1}, /* Golden Game 150-in-1 */
|
{0x6f12afc5, 235, -1}, /* Golden Game 150-in-1 */
|
||||||
{0xfb2b6b10, 241, -1}, /* Fan Kong Jing Ying (Ch) */
|
{0xfb2b6b10, 241, -1}, /* Fan Kong Jing Ying (Ch) */
|
||||||
{0xb5e83c9a, 241, -1}, /* Xing Ji Zheng Ba (Ch) */
|
{0xb5e83c9a, 241, -1}, /* Xing Ji Zheng Ba (Ch) */
|
||||||
|
{0x2537b3e6, 241, -1}, /* Dance Xtreme - Prima (Unl) */
|
||||||
|
{0x11611e89, 241, -1}, /* Darkseed (Unl) [p1] */
|
||||||
|
{0x81a37827, 241, -1}, /* Darkseed (Unl) [p1][b1] */
|
||||||
|
{0xc2730c30, 241, -1}, /* Deadly Towers (U) [!] */
|
||||||
|
{0x368c19a8, 241, -1}, /* LIKO Study Cartridge 3-in-1 (Unl) [!] */
|
||||||
|
{0xa21e675c, 241, -1}, /* Mashou (J) [!] */
|
||||||
|
{0x54d98b79, 241, -1}, /* Titanic 1912 (Unl) */
|
||||||
{0x6bea1235, 245, -1}, /* MMC3 cart, but with nobanking applied to CHR-RAM, so let it be there */
|
{0x6bea1235, 245, -1}, /* MMC3 cart, but with nobanking applied to CHR-RAM, so let it be there */
|
||||||
{0x345ee51a, 245, -1}, /* DQ4c */
|
{0x345ee51a, 245, -1}, /* DQ4c */
|
||||||
{0x57514c6c, 245, -1}, /* Yong Zhe Dou E Long - Dragon Quest VI (Ch) */
|
{0x57514c6c, 245, -1}, /* Yong Zhe Dou E Long - Dragon Quest VI (Ch) */
|
||||||
|
|
|
@ -740,7 +740,7 @@ static BMAPPINGLocal bmap[] = {
|
||||||
{"", 214, Mapper214_Init},
|
{"", 214, Mapper214_Init},
|
||||||
{"", 215, UNL8237_Init},
|
{"", 215, UNL8237_Init},
|
||||||
{"", 216, Mapper216_Init},
|
{"", 216, Mapper216_Init},
|
||||||
// {"", 217, UNL8237A_Init},
|
{"", 217, Mapper217_Init}, // Redefined to a new Discrete BMC mapper
|
||||||
// {"", 218, Mapper218_Init},
|
// {"", 218, Mapper218_Init},
|
||||||
{"UNLA9746", 219, UNLA9746_Init},
|
{"UNLA9746", 219, UNLA9746_Init},
|
||||||
{"Debug Mapper", 220, UNLKS7057_Init},
|
{"Debug Mapper", 220, UNLKS7057_Init},
|
||||||
|
@ -774,11 +774,11 @@ static BMAPPINGLocal bmap[] = {
|
||||||
// {"", 248, Mapper248_Init},
|
// {"", 248, Mapper248_Init},
|
||||||
{"", 249, Mapper249_Init},
|
{"", 249, Mapper249_Init},
|
||||||
{"", 250, Mapper250_Init},
|
{"", 250, Mapper250_Init},
|
||||||
// {"", 251, Mapper251_Init},
|
// {"", 251, Mapper251_Init}, // No good dumps for this mapper, use UNIF version
|
||||||
{"SAN GUO ZHI PIRATE", 252, Mapper252_Init},
|
{"SAN GUO ZHI PIRATE", 252, Mapper252_Init},
|
||||||
{"DRAGON BALL PIRATE", 253, Mapper253_Init},
|
{"DRAGON BALL PIRATE", 253, Mapper253_Init},
|
||||||
{"", 254, Mapper254_Init},
|
{"", 254, Mapper254_Init},
|
||||||
// {"", 255, Mapper255_Init}, // Doesn't have any good dump for this mapper
|
// {"", 255, Mapper255_Init}, // No good dumps for this mapper
|
||||||
{"", 0, NULL}
|
{"", 0, NULL}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -485,6 +485,7 @@ void Mapper212_Init(CartInfo *);
|
||||||
void Mapper213_Init(CartInfo *);
|
void Mapper213_Init(CartInfo *);
|
||||||
void Mapper214_Init(CartInfo *);
|
void Mapper214_Init(CartInfo *);
|
||||||
void Mapper216_Init(CartInfo *);
|
void Mapper216_Init(CartInfo *);
|
||||||
|
void Mapper217_Init(CartInfo *);
|
||||||
void Mapper220_Init(CartInfo *);
|
void Mapper220_Init(CartInfo *);
|
||||||
void Mapper222_Init(CartInfo *);
|
void Mapper222_Init(CartInfo *);
|
||||||
void Mapper225_Init(CartInfo *);
|
void Mapper225_Init(CartInfo *);
|
||||||
|
|
262
src/unif.cpp
262
src/unif.cpp
|
@ -317,136 +317,138 @@ static int LoadCHR(FCEUFILE *fp)
|
||||||
|
|
||||||
static BMAPPING bmap[] = {
|
static BMAPPING bmap[] = {
|
||||||
|
|
||||||
{ "12-IN-1",BMC12IN1_Init,0},
|
{ "11160", BMC11160_Init, 0 },
|
||||||
{ "13in1JY110", BMC13in1JY110_Init, 0},
|
{ "12-IN-1", BMC12IN1_Init, 0 },
|
||||||
{ "190in1", BMC190in1_Init, 0},
|
{ "13in1JY110", BMC13in1JY110_Init, 0 },
|
||||||
{ "22211", UNL22211_Init,0},
|
{ "190in1", BMC190in1_Init, 0 },
|
||||||
{ "3D-BLOCK", UNL3DBlock_Init, 0},
|
{ "22211", UNL22211_Init, 0 },
|
||||||
{ "411120-C",BMC411120C_Init, 0},
|
{ "3D-BLOCK", UNL3DBlock_Init, 0 },
|
||||||
{ "42in1ResetSwitch", Mapper226_Init, 0},
|
{ "411120-C", BMC411120C_Init, 0 },
|
||||||
{ "43272", UNL43272_Init,0},
|
{ "42in1ResetSwitch", Mapper226_Init, 0 },
|
||||||
{ "603-5052", UNL6035052_Init,0},
|
{ "43272", UNL43272_Init, 0 },
|
||||||
{ "64in1NoRepeat", BMC64in1nr_Init, 0},
|
{ "603-5052", UNL6035052_Init, 0 },
|
||||||
{ "70in1", BMC70in1_Init, 0},
|
{ "64in1NoRepeat", BMC64in1nr_Init, 0 },
|
||||||
{ "70in1B", BMC70in1B_Init, 0},
|
{ "70in1", BMC70in1_Init, 0 },
|
||||||
{ "810544-C-A1", BMC810544CA1_Init,0},
|
{ "70in1B", BMC70in1B_Init, 0 },
|
||||||
{ "8157", UNL8157_Init,0},
|
{ "810544-C-A1", BMC810544CA1_Init, 0 },
|
||||||
{ "8237", UNL8237_Init,0},
|
{ "8157", UNL8157_Init, 0 },
|
||||||
{ "8237A", UNL8237A_Init,0},
|
{ "8237", UNL8237_Init, 0 },
|
||||||
{ "830118C",BMC830118C_Init, 0},
|
{ "8237A", UNL8237A_Init, 0 },
|
||||||
{ "A65AS", BMCA65AS_Init,0},
|
{ "830118C", BMC830118C_Init, 0 },
|
||||||
{ "AC08", AC08_Init,0},
|
{ "A65AS", BMCA65AS_Init, 0 },
|
||||||
{ "ANROM", ANROM_Init,0},
|
{ "AC08", AC08_Init, 0 },
|
||||||
{ "AX5705", UNLAX5705_Init, 0},
|
{ "ANROM", ANROM_Init, 0 },
|
||||||
{ "BB", UNLBB_Init,0},
|
{ "AX5705", UNLAX5705_Init, 0 },
|
||||||
{ "BS-5",BMCBS5_Init, 0},
|
{ "BB", UNLBB_Init, 0 },
|
||||||
{ "CC-21", UNLCC21_Init,0},
|
{ "BS-5", BMCBS5_Init, 0 },
|
||||||
{ "CITYFIGHT", UNLCITYFIGHT_Init, 0},
|
{ "CC-21", UNLCC21_Init, 0 },
|
||||||
{ "CNROM", CNROM_Init,0},
|
{ "CITYFIGHT", UNLCITYFIGHT_Init, 0 },
|
||||||
{ "CPROM", CPROM_Init,BMCFLAG_16KCHRR},
|
{ "CNROM", CNROM_Init, 0 },
|
||||||
{ "D1038", BMCD1038_Init, 0},
|
{ "CPROM", CPROM_Init, BMCFLAG_16KCHRR },
|
||||||
{ "DANCE", UNLOneBus_Init,0}, // redundant
|
{ "D1038", BMCD1038_Init, 0 },
|
||||||
{ "DANCE2000", UNLD2000_Init,0},
|
{ "DANCE", UNLOneBus_Init, 0 }, // redundant
|
||||||
{ "DREAMTECH01", DreamTech01_Init,0},
|
{ "DANCE2000", UNLD2000_Init, 0 },
|
||||||
{ "EDU2000", UNLEDU2000_Init,0},
|
{ "DREAMTECH01", DreamTech01_Init, 0 },
|
||||||
{ "EKROM", EKROM_Init,0},
|
{ "EDU2000", UNLEDU2000_Init, 0 },
|
||||||
{ "ELROM", ELROM_Init,0},
|
{ "EKROM", EKROM_Init, 0 },
|
||||||
{ "ETROM", ETROM_Init,0},
|
{ "ELROM", ELROM_Init, 0 },
|
||||||
{ "EWROM", EWROM_Init,0},
|
{ "ETROM", ETROM_Init, 0 },
|
||||||
{ "FK23C", BMCFK23C_Init,BMCFLAG_EXPCHRR},
|
{ "EWROM", EWROM_Init, 0 },
|
||||||
{ "FK23CA", BMCFK23CA_Init,BMCFLAG_EXPCHRR},
|
{ "FK23C", BMCFK23C_Init, BMCFLAG_EXPCHRR },
|
||||||
{ "FS304", UNLFS304_Init,0},
|
{ "FK23CA", BMCFK23CA_Init, BMCFLAG_EXPCHRR },
|
||||||
{ "GK-192", BMCGK192_Init, 0},
|
{ "FS304", UNLFS304_Init, 0 },
|
||||||
{ "GS-2004", BMCGS2004_Init, 0},
|
{ "G-146", BMCG146_Init, 0 },
|
||||||
{ "GS-2013", BMCGS2013_Init, 0},
|
{ "GK-192", BMCGK192_Init, 0 },
|
||||||
{ "Ghostbusters63in1", BMCGhostbusters63in1_Init, 0},
|
{ "GS-2004", BMCGS2004_Init, 0 },
|
||||||
{ "H2288", UNLH2288_Init,0},
|
{ "GS-2013", BMCGS2013_Init, 0 },
|
||||||
{ "HKROM", HKROM_Init,0},
|
{ "Ghostbusters63in1", BMCGhostbusters63in1_Init, 0 },
|
||||||
{ "KOF97", UNLKOF97_Init,0},
|
{ "H2288", UNLH2288_Init, 0 },
|
||||||
{ "KONAMI-QTAI", Mapper190_Init,0},
|
{ "HKROM", HKROM_Init, 0 },
|
||||||
{ "KS7012", UNLKS7012_Init, 0},
|
{ "KOF97", UNLKOF97_Init, 0 },
|
||||||
{ "KS7013B", UNLKS7013B_Init, 0},
|
{ "KONAMI-QTAI", Mapper190_Init, 0 },
|
||||||
{ "KS7017", UNLKS7017_Init, 0},
|
{ "KS7012", UNLKS7012_Init, 0 },
|
||||||
{ "KS7030", UNLKS7030_Init, 0},
|
{ "KS7013B", UNLKS7013B_Init, 0 },
|
||||||
{ "KS7031", UNLKS7031_Init, 0},
|
{ "KS7017", UNLKS7017_Init, 0 },
|
||||||
{ "KS7032", UNLKS7032_Init, 0},
|
{ "KS7030", UNLKS7030_Init, 0 },
|
||||||
{ "KS7037", UNLKS7037_Init, 0},
|
{ "KS7031", UNLKS7031_Init, 0 },
|
||||||
{ "KS7057", UNLKS7057_Init, 0},
|
{ "KS7032", UNLKS7032_Init, 0 },
|
||||||
{ "LE05", LE05_Init,0},
|
{ "KS7037", UNLKS7037_Init, 0 },
|
||||||
{ "LH10", LH10_Init,0},
|
{ "KS7057", UNLKS7057_Init, 0 },
|
||||||
{ "LH32", LH32_Init,0},
|
{ "LE05", LE05_Init, 0 },
|
||||||
{ "LH53", LH53_Init,0},
|
{ "LH10", LH10_Init, 0 },
|
||||||
{ "MARIO1-MALEE2", MALEE_Init,0},
|
{ "LH32", LH32_Init, 0 },
|
||||||
{ "MHROM", MHROM_Init,0},
|
{ "LH53", LH53_Init, 0 },
|
||||||
{ "N625092", UNLN625092_Init,0},
|
{ "MARIO1-MALEE2", MALEE_Init, 0 },
|
||||||
{ "NROM", NROM_Init,0 },
|
{ "MHROM", MHROM_Init, 0 },
|
||||||
{ "NROM-128", NROM_Init,0 },
|
{ "N625092", UNLN625092_Init, 0 },
|
||||||
{ "NROM-256", NROM_Init,0 },
|
{ "NROM", NROM_Init, 0 },
|
||||||
{ "NTBROM", Mapper68_Init,0},
|
{ "NROM-128", NROM_Init, 0 },
|
||||||
{ "NTD-03", BMCNTD03_Init,0},
|
{ "NROM-256", NROM_Init, 0 },
|
||||||
{ "NovelDiamond9999999in1", Novel_Init,0},
|
{ "NTBROM", Mapper68_Init, 0 },
|
||||||
{ "OneBus", UNLOneBus_Init,0},
|
{ "NTD-03", BMCNTD03_Init, 0 },
|
||||||
{ "PEC-586",UNLPEC586Init,0},
|
{ "NovelDiamond9999999in1", Novel_Init, 0 },
|
||||||
{ "RROM", NROM_Init,0 },
|
{ "OneBus", UNLOneBus_Init, 0 },
|
||||||
{ "RROM-128", NROM_Init,0 },
|
{ "PEC-586", UNLPEC586Init, 0 },
|
||||||
{ "SA-002", TCU02_Init, 0},
|
{ "RROM", NROM_Init, 0 },
|
||||||
{ "SA-0036", SA0036_Init,0},
|
{ "RROM-128", NROM_Init, 0 },
|
||||||
{ "SA-0037", SA0037_Init,0},
|
{ "SA-002", TCU02_Init, 0 },
|
||||||
{ "SA-009", SA009_Init,0},
|
{ "SA-0036", SA0036_Init, 0 },
|
||||||
{ "SA-016-1M", SA0161M_Init,0},
|
{ "SA-0037", SA0037_Init, 0 },
|
||||||
{ "SA-72007", SA72007_Init,0},
|
{ "SA-009", SA009_Init, 0 },
|
||||||
{ "SA-72008", SA72008_Init,0},
|
{ "SA-016-1M", SA0161M_Init, 0 },
|
||||||
{ "SA-9602B", SA9602B_Init, BMCFLAG_32KCHRR},
|
{ "SA-72007", SA72007_Init, 0 },
|
||||||
{ "SA-NROM", TCA01_Init,0},
|
{ "SA-72008", SA72008_Init, 0 },
|
||||||
{ "SAROM", SAROM_Init,0},
|
{ "SA-9602B", SA9602B_Init, BMCFLAG_32KCHRR },
|
||||||
{ "SBROM", SBROM_Init,0},
|
{ "SA-NROM", TCA01_Init, 0 },
|
||||||
{ "SC-127", UNLSC127_Init,0},
|
{ "SAROM", SAROM_Init, 0 },
|
||||||
{ "SCROM", SCROM_Init,0},
|
{ "SBROM", SBROM_Init, 0 },
|
||||||
{ "SEROM", SEROM_Init,0},
|
{ "SC-127", UNLSC127_Init, 0 },
|
||||||
{ "SGROM", SGROM_Init,0},
|
{ "SCROM", SCROM_Init, 0 },
|
||||||
{ "SHERO", UNLSHeroes_Init,0},
|
{ "SEROM", SEROM_Init, 0 },
|
||||||
{ "SKROM", SKROM_Init,0},
|
{ "SGROM", SGROM_Init, 0 },
|
||||||
{ "SL12", UNLSL12_Init,0},
|
{ "SHERO", UNLSHeroes_Init, 0 },
|
||||||
{ "SL1632", UNLSL1632_Init,0},
|
{ "SKROM", SKROM_Init, 0 },
|
||||||
{ "SL1ROM", SL1ROM_Init,0},
|
{ "SL12", UNLSL12_Init, 0 },
|
||||||
{ "SLROM", SLROM_Init,0},
|
{ "SL1632", UNLSL1632_Init, 0 },
|
||||||
{ "SMB2J", UNLSMB2J_Init, 0},
|
{ "SL1ROM", SL1ROM_Init, 0 },
|
||||||
{ "SNROM", SNROM_Init,0},
|
{ "SLROM", SLROM_Init, 0 },
|
||||||
{ "SOROM", SOROM_Init,0},
|
{ "SMB2J", UNLSMB2J_Init, 0 },
|
||||||
{ "SSS-NROM-256", SSSNROM_Init,0 },
|
{ "SNROM", SNROM_Init, 0 },
|
||||||
{ "SUNSOFT_UNROM", SUNSOFT_UNROM_Init,0},
|
{ "SOROM", SOROM_Init, 0 },
|
||||||
{ "Sachen-74LS374N", S74LS374N_Init,0},
|
{ "SSS-NROM-256", SSSNROM_Init, 0 },
|
||||||
{ "Sachen-74LS374NA", S74LS374NA_Init,0}, //seems to be custom mapper
|
{ "SUNSOFT_UNROM", SUNSOFT_UNROM_Init, 0 },
|
||||||
{ "Sachen-8259A", S8259A_Init,0},
|
{ "Sachen-74LS374N", S74LS374N_Init, 0 },
|
||||||
{ "Sachen-8259B", S8259B_Init,0},
|
{ "Sachen-74LS374NA", S74LS374NA_Init, 0 }, //seems to be custom mapper
|
||||||
{ "Sachen-8259C", S8259C_Init,0},
|
{ "Sachen-8259A", S8259A_Init, 0 },
|
||||||
{ "Sachen-8259D", S8259D_Init,0},
|
{ "Sachen-8259B", S8259B_Init, 0 },
|
||||||
{ "Super24in1SC03", Super24_Init,0},
|
{ "Sachen-8259C", S8259C_Init, 0 },
|
||||||
{ "SuperHIK8in1", Mapper45_Init,0},
|
{ "Sachen-8259D", S8259D_Init, 0 },
|
||||||
{ "Supervision16in1", Supervision16_Init,0},
|
{ "Super24in1SC03", Super24_Init, 0 },
|
||||||
{ "T-227-1",BMCT2271_Init,0},
|
{ "SuperHIK8in1", Mapper45_Init, 0 },
|
||||||
{ "T-230", UNLT230_Init, 0},
|
{ "Supervision16in1", Supervision16_Init, 0 },
|
||||||
{ "T-262", BMCT262_Init,0},
|
{ "T-227-1", BMCT2271_Init, 0 },
|
||||||
{ "TBROM", TBROM_Init,0},
|
{ "T-230", UNLT230_Init, 0 },
|
||||||
{ "TC-U01-1.5M", TCU01_Init,0},
|
{ "T-262", BMCT262_Init, 0 },
|
||||||
{ "TEK90", Mapper90_Init,0},
|
{ "TBROM", TBROM_Init, 0 },
|
||||||
{ "TEROM", TEROM_Init,0},
|
{ "TC-U01-1.5M", TCU01_Init, 0 },
|
||||||
{ "TF1201", UNLTF1201_Init, 0},
|
{ "TEK90", Mapper90_Init, 0 },
|
||||||
{ "TFROM", TFROM_Init,0},
|
{ "TEROM", TEROM_Init, 0 },
|
||||||
{ "TGROM", TGROM_Init,0},
|
{ "TF1201", UNLTF1201_Init, 0 },
|
||||||
{ "TKROM", TKROM_Init,0},
|
{ "TFROM", TFROM_Init, 0 },
|
||||||
{ "TKSROM", TKSROM_Init,0},
|
{ "TGROM", TGROM_Init, 0 },
|
||||||
{ "TLROM", TLROM_Init,0},
|
{ "TKROM", TKROM_Init, 0 },
|
||||||
{ "TLSROM", TLSROM_Init,0},
|
{ "TKSROM", TKSROM_Init, 0 },
|
||||||
{ "TQROM", TQROM_Init,0},
|
{ "TLROM", TLROM_Init, 0 },
|
||||||
{ "TR1ROM", TFROM_Init,BMCFLAG_FORCE4},
|
{ "TLSROM", TLSROM_Init, 0 },
|
||||||
{ "TSROM", TSROM_Init,0},
|
{ "TQROM", TQROM_Init, 0 },
|
||||||
{ "TVROM", TLROM_Init,BMCFLAG_FORCE4},
|
{ "TR1ROM", TFROM_Init, BMCFLAG_FORCE4 },
|
||||||
{ "Transformer", Transformer_Init, 0},
|
{ "TSROM", TSROM_Init, 0 },
|
||||||
{ "UNROM", UNROM_Init,0},
|
{ "TVROM", TLROM_Init, BMCFLAG_FORCE4 },
|
||||||
{ "UOROM", UNROM_Init,0},
|
{ "Transformer", Transformer_Init, 0 },
|
||||||
{ "VRC7", UNLVRC7_Init,0},
|
{ "UNROM", UNROM_Init, 0 },
|
||||||
{ "YOKO", UNLYOKO_Init,0},
|
{ "UOROM", UNROM_Init, 0 },
|
||||||
|
{ "VRC7", UNLVRC7_Init, 0 },
|
||||||
|
{ "YOKO", UNLYOKO_Init, 0 },
|
||||||
|
|
||||||
{0,0,0}
|
{0,0,0}
|
||||||
};
|
};
|
||||||
|
|
|
@ -20,6 +20,7 @@
|
||||||
|
|
||||||
void AC08_Init(CartInfo *info);
|
void AC08_Init(CartInfo *info);
|
||||||
void ANROM_Init(CartInfo *info);
|
void ANROM_Init(CartInfo *info);
|
||||||
|
void BMC11160_Init(CartInfo *info);
|
||||||
void BMC12IN1_Init(CartInfo *info);
|
void BMC12IN1_Init(CartInfo *info);
|
||||||
void BMC13in1JY110_Init(CartInfo *info);
|
void BMC13in1JY110_Init(CartInfo *info);
|
||||||
void BMC190in1_Init(CartInfo *info);
|
void BMC190in1_Init(CartInfo *info);
|
||||||
|
@ -34,6 +35,7 @@ void BMCBS5_Init(CartInfo *info);
|
||||||
void BMCD1038_Init(CartInfo *info);
|
void BMCD1038_Init(CartInfo *info);
|
||||||
void BMCFK23CA_Init(CartInfo *info);
|
void BMCFK23CA_Init(CartInfo *info);
|
||||||
void BMCFK23C_Init(CartInfo *info);
|
void BMCFK23C_Init(CartInfo *info);
|
||||||
|
void BMCG146_Init(CartInfo *info);
|
||||||
void BMCGK192_Init(CartInfo *info);
|
void BMCGK192_Init(CartInfo *info);
|
||||||
void BMCGS2004_Init(CartInfo *info);
|
void BMCGS2004_Init(CartInfo *info);
|
||||||
void BMCGS2013_Init(CartInfo *info);
|
void BMCGS2013_Init(CartInfo *info);
|
||||||
|
|
Loading…
Reference in New Issue