Mapper 268, support for ROMs with 1 MiB CHR-ROM
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@ -29,7 +29,7 @@
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* |||| ||||
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* |||| |+++-- PRG offset (PRG A19, A18, A17)
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* |||| +----- Alternate CHR A17
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* ||++------- PRG offset (PRG A24, A23)
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* ||++------- PRG offset (PRG A24, A23), CHR offset (CHR A19, A18)
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* |+--------- PRG mask (PRG A17 from 0: MMC3; 1: offset)
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* +---------- CHR mask (CHR A17 from 0: MMC3; 1: alternate)
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*
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@ -134,6 +134,7 @@ static void AA6023CW(uint32 A, uint8 V) {
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(V & 0x80 & mask) | ((((EXPREGS[0] & 0b00001000) << 4) & ~mask)) // 7th bit
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| ((EXPREGS[2] & 0x0F) << 3) // 6-3 bits
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| ((A >> 10) & 7) // 2-0 bits
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| ((EXPREGS[0] & 0b00110000) << 4) // There are some ROMs with 1 MiB CHR-ROM
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);
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}
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else {
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@ -148,7 +149,10 @@ static void AA6023CW(uint32 A, uint8 V) {
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}
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// Simple MMC3 mode
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// Highest bit goes from MMC3 registers when EXPREGS[0]&0x80==0 or from EXPREGS[0]&0x08 otherwise
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setchr1(A, (V & mask) | (((EXPREGS[0] & 0x08) << 4) & ~mask));
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setchr1(A,
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(V & mask)
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| (((EXPREGS[0] & 0x08) << 4) & ~mask)
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| ((EXPREGS[0] & 0b00110000) << 4)); // There are some ROMs with 1 MiB CHR-ROM
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}
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}
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@ -223,7 +227,7 @@ static void AA6023PW(uint32 A, uint8 V) {
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}
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if (!(CREGS[3] & 0x10)) {
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// Regular MMC3 mode but can be extended to 2MByte
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// Regular MMC3 mode but can be extended to 2MiB
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setprg8r(chip, A, (((base << 4) & ~mask)) | (V & mask));
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}
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else {
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