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formatting sync, cleanup

This commit is contained in:
CaH4e3 2012-12-12 18:30:16 +00:00
parent 13d63e5af2
commit 3a5e90fcc2
101 changed files with 6003 additions and 7287 deletions
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139
src/boards/103.cpp
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@ -21,105 +21,92 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg0, reg1, reg2; static uint8 reg0, reg1, reg2;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg0, 1, "REG0"}, { &reg0, 1, "REG0" },
{&reg1, 1, "REG1"}, { &reg1, 1, "REG1" },
{&reg2, 1, "REG2"}, { &reg2, 1, "REG2" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr8(0);
setchr8(0); setprg8(0x8000, 0xc);
setprg8(0x8000,0xc); setprg8(0xe000, 0xf);
setprg8(0xe000,0xf); if (reg2 & 0x10) {
if(reg2&0x10) setprg8(0x6000, reg0);
{ setprg8(0xa000, 0xd);
setprg8(0x6000,reg0); setprg8(0xc000, 0xe);
setprg8(0xa000,0xd); } else {
setprg8(0xc000,0xe); setprg8r(0x10, 0x6000, 0);
} setprg4(0xa000, (0xd << 1));
else setprg2(0xb000, (0xd << 2) + 2);
{ setprg2r(0x10, 0xb800, 4);
setprg8r(0x10,0x6000,0); setprg2r(0x10, 0xc000, 5);
setprg4(0xa000,(0xd<<1)); setprg2r(0x10, 0xc800, 6);
setprg2(0xb000,(0xd<<2)+2); setprg2r(0x10, 0xd000, 7);
setprg2r(0x10,0xb800,4); setprg2(0xd800, (0xe << 2) + 3);
setprg2r(0x10,0xc000,5); }
setprg2r(0x10,0xc800,6); setmirror(reg1 ^ 1);
setprg2r(0x10,0xd000,7);
setprg2(0xd800,(0xe<<2)+3);
}
setmirror(reg1^1);
} }
static DECLFW(M103RamWrite0) static DECLFW(M103RamWrite0) {
{ WRAM[A & 0x1FFF] = V;
WRAM[A&0x1FFF]=V;
} }
static DECLFW(M103RamWrite1) static DECLFW(M103RamWrite1) {
{ WRAM[0x2000 + ((A - 0xB800) & 0x1FFF)] = V;
WRAM[0x2000+((A-0xB800)&0x1FFF)]=V;
} }
static DECLFW(M103Write0) static DECLFW(M103Write0) {
{ reg0 = V & 0xf;
reg0=V&0xf; Sync();
Sync();
} }
static DECLFW(M103Write1) static DECLFW(M103Write1) {
{ reg1 = (V >> 3) & 1;
reg1=(V>>3)&1; Sync();
Sync();
} }
static DECLFW(M103Write2) static DECLFW(M103Write2) {
{ reg2 = V;
reg2=V; Sync();
Sync();
} }
static void M103Power(void) static void M103Power(void) {
{ reg0 = reg1 = 0; reg2 = 0;
reg0=reg1=0; reg2=0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, M103RamWrite0);
SetWriteHandler(0x6000,0x7FFF,M103RamWrite0); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0xB800, 0xD7FF, M103RamWrite1);
SetWriteHandler(0xB800,0xD7FF,M103RamWrite1); SetWriteHandler(0x8000, 0x8FFF, M103Write0);
SetWriteHandler(0x8000,0x8FFF,M103Write0); SetWriteHandler(0xE000, 0xEFFF, M103Write1);
SetWriteHandler(0xE000,0xEFFF,M103Write1); SetWriteHandler(0xF000, 0xFFFF, M103Write2);
SetWriteHandler(0xF000,0xFFFF,M103Write2);
} }
static void M103Close(void) static void M103Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper103_Init(CartInfo *info) void Mapper103_Init(CartInfo *info) {
{ info->Power = M103Power;
info->Power=M103Power; info->Close = M103Close;
info->Close=M103Close; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=16384; WRAMSIZE = 16384;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

135
src/boards/106.cpp
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@ -22,98 +22,87 @@
static uint8 reg[16], IRQa; static uint8 reg[16], IRQa;
static uint32 IRQCount; static uint32 IRQCount;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 4, "IRQC"}, { &IRQCount, 4, "IRQC" },
{reg, 16, "REGS"}, { reg, 16, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr1(0x0000, reg[0] & 0xfe);
setchr1(0x0000,reg[0]&0xfe); setchr1(0x0400, reg[1] | 1);
setchr1(0x0400,reg[1]|1); setchr1(0x0800, reg[2] & 0xfe);
setchr1(0x0800,reg[2]&0xfe); setchr1(0x0c00, reg[3] | 1);
setchr1(0x0c00,reg[3]|1); setchr1(0x1000, reg[4]);
setchr1(0x1000,reg[4]); setchr1(0x1400, reg[5]);
setchr1(0x1400,reg[5]); setchr1(0x1800, reg[6]);
setchr1(0x1800,reg[6]); setchr1(0x1c00, reg[7]);
setchr1(0x1c00,reg[7]); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg8(0x8000, (reg[0x8] & 0xf) | 0x10);
setprg8(0x8000,(reg[0x8]&0xf)|0x10); setprg8(0xA000, (reg[0x9] & 0x1f));
setprg8(0xA000,(reg[0x9]&0x1f)); setprg8(0xC000, (reg[0xa] & 0x1f));
setprg8(0xC000,(reg[0xa]&0x1f)); setprg8(0xE000, (reg[0xb] & 0xf) | 0x10);
setprg8(0xE000,(reg[0xb]&0xf)|0x10); setmirror((reg[0xc] & 1) ^ 1);
setmirror((reg[0xc]&1)^1);
} }
static DECLFW(M106Write) static DECLFW(M106Write) {
{ A &= 0xF;
A&=0xF; switch (A) {
switch(A) case 0xD: IRQa = 0; IRQCount = 0; X6502_IRQEnd(FCEU_IQEXT); break;
{ case 0xE: IRQCount = (IRQCount & 0xFF00) | V; break;
case 0xD: IRQa=0; IRQCount=0; X6502_IRQEnd(FCEU_IQEXT); break; case 0xF: IRQCount = (IRQCount & 0x00FF) | (V << 8); IRQa = 1; break;
case 0xE: IRQCount=(IRQCount&0xFF00)|V; break; default: reg[A] = V; Sync(); break;
case 0xF: IRQCount=(IRQCount&0x00FF)|(V<<8); IRQa=1; break; }
default: reg[A]=V; Sync(); break;
}
} }
static void M106Power(void) static void M106Power(void) {
{ reg[8] = reg[9] = reg[0xa] = reg[0xb] = -1;
reg[8]=reg[9]=reg[0xa]=reg[0xb]=-1; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetWriteHandler(0x8000, 0xFFFF, M106Write);
SetWriteHandler(0x8000,0xFFFF,M106Write);
} }
static void M106Reset(void) static void M106Reset(void) {
{
} }
static void M106Close(void) static void M106Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
void M106CpuHook(int a) void M106CpuHook(int a) {
{ if (IRQa) {
if(IRQa) IRQCount += a;
{ if (IRQCount > 0x10000) {
IRQCount+=a; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount>0x10000) IRQa = 0;
{ }
X6502_IRQBegin(FCEU_IQEXT); }
IRQa=0;
}
}
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper106_Init(CartInfo *info) void Mapper106_Init(CartInfo *info) {
{ info->Reset = M106Reset;
info->Reset=M106Reset; info->Power = M106Power;
info->Power=M106Power; info->Close = M106Close;
info->Close=M106Close; MapIRQHook = M106CpuHook;
MapIRQHook=M106CpuHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

49
src/boards/108.cpp
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@ -22,42 +22,37 @@
static uint8 reg; static uint8 reg;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x6000, reg);
setprg8(0x6000,reg); setprg32(0x8000, ~0);
setprg32(0x8000,~0); setchr8(0);
setchr8(0);
} }
static DECLFW(M108Write) static DECLFW(M108Write) {
{ reg = V;
reg=V; Sync();
Sync();
} }
static void M108Power(void) static void M108Power(void) {
{ Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0x8FFF, M108Write); // regular 108
SetWriteHandler(0x8000,0x8FFF,M108Write); // regular 108 SetWriteHandler(0xF000, 0xFFFF, M108Write); // simplified Kaiser BB Hack
SetWriteHandler(0xF000,0xFFFF,M108Write); // simplified Kaiser BB Hack
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper108_Init(CartInfo *info) void Mapper108_Init(CartInfo *info) {
{ info->Power = M108Power;
info->Power=M108Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

103
src/boards/112.cpp
View File

@ -16,79 +16,74 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* NTDEC, ASDER games * NTDEC, ASDER games
*
*/ */
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[8]; static uint8 reg[8];
static uint8 mirror, cmd, bank; static uint8 mirror, cmd, bank;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&cmd, 1, "CMD"}, { &cmd, 1, "CMD" },
{&mirror, 1, "MIRR"}, { &mirror, 1, "MIRR" },
{&bank, 1, "BANK"}, { &bank, 1, "BANK" },
{reg, 8, "REGS"}, { reg, 8, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setmirror(mirror ^ 1);
setmirror(mirror^1); setprg8(0x8000, reg[0]);
setprg8(0x8000,reg[0]); setprg8(0xA000, reg[1]);
setprg8(0xA000,reg[1]); setchr2(0x0000, (reg[2] >> 1));
setchr2(0x0000,(reg[2]>>1)); setchr2(0x0800, (reg[3] >> 1));
setchr2(0x0800,(reg[3]>>1)); setchr1(0x1000, ((bank & 0x10) << 4) | reg[4]);
setchr1(0x1000,((bank&0x10)<<4)|reg[4]); setchr1(0x1400, ((bank & 0x20) << 3) | reg[5]);
setchr1(0x1400,((bank&0x20)<<3)|reg[5]); setchr1(0x1800, ((bank & 0x40) << 2) | reg[6]);
setchr1(0x1800,((bank&0x40)<<2)|reg[6]); setchr1(0x1C00, ((bank & 0x80) << 1) | reg[7]);
setchr1(0x1C00,((bank&0x80)<<1)|reg[7]);
} }
static DECLFW(M112Write) static DECLFW(M112Write) {
{ switch (A) {
switch(A) case 0xe000: mirror = V & 1; Sync();; break;
{ case 0x8000: cmd = V & 7; break;
case 0xe000: mirror=V&1; Sync(); ;break; case 0xa000: reg[cmd] = V; Sync(); break;
case 0x8000: cmd=V&7; break; case 0xc000: bank = V; Sync(); break;
case 0xa000: reg[cmd]=V; Sync(); break; }
case 0xc000: bank=V; Sync(); break;
}
} }
static void M112Close(void) static void M112Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM = NULL;
} }
static void M112Power(void) static void M112Power(void) {
{ bank = 0;
bank=0; setprg16(0xC000, ~0);
setprg16(0xC000,~0); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M112Write);
SetWriteHandler(0x8000,0xFFFF,M112Write); SetWriteHandler(0x4020, 0x5FFF, M112Write);
SetWriteHandler(0x4020,0x5FFF,M112Write); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper112_Init(CartInfo *info) void Mapper112_Init(CartInfo *info) {
{ info->Power = M112Power;
info->Power=M112Power; info->Close = M112Close;
info->Close=M112Close; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; WRAM = (uint8*)FCEU_gmalloc(8192);
WRAM=(uint8*)FCEU_gmalloc(8192); SetupCartPRGMapping(0x10, WRAM, 8192, 1);
SetupCartPRGMapping(0x10,WRAM,8192,1); AddExState(WRAM, 8192, 0, "WRAM");
AddExState(WRAM, 8192, 0, "WRAM"); AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

564
src/boards/116.cpp
View File

@ -38,321 +38,287 @@
static uint8 mode; static uint8 mode;
static uint8 vrc2_chr[8], vrc2_prg[2], vrc2_mirr; static uint8 vrc2_chr[8], vrc2_prg[2], vrc2_mirr;
static uint8 mmc3_regs[10], mmc3_ctrl, mmc3_mirr; static uint8 mmc3_regs[10], mmc3_ctrl, mmc3_mirr;
static uint8 IRQCount,IRQLatch,IRQa; static uint8 IRQCount, IRQLatch, IRQa;
static uint8 IRQReload; static uint8 IRQReload;
static uint8 mmc1_regs[4], mmc1_buffer, mmc1_shift; static uint8 mmc1_regs[4], mmc1_buffer, mmc1_shift;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&mode, 1, "MODE"}, { &mode, 1, "MODE" },
{vrc2_chr, 8, "VRCC"}, { vrc2_chr, 8, "VRCC" },
{vrc2_prg, 2, "VRCP"}, { vrc2_prg, 2, "VRCP" },
{&vrc2_mirr, 1, "VRCM"}, { &vrc2_mirr, 1, "VRCM" },
{mmc3_regs, 10, "M3RG"}, { mmc3_regs, 10, "M3RG" },
{&mmc3_ctrl, 1, "M3CT"}, { &mmc3_ctrl, 1, "M3CT" },
{&mmc3_mirr, 1, "M3MR"}, { &mmc3_mirr, 1, "M3MR" },
{&IRQReload, 1, "IRQR"}, { &IRQReload, 1, "IRQR" },
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQLatch, 1, "IRQL"}, { &IRQLatch, 1, "IRQL" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{mmc1_regs, 4, "M1RG"}, { mmc1_regs, 4, "M1RG" },
{&mmc1_buffer, 1, "M1BF"}, { &mmc1_buffer, 1, "M1BF" },
{&mmc1_shift, 1, "M1MR"}, { &mmc1_shift, 1, "M1MR" },
{0} { 0 }
}; };
static void SyncPRG(void) static void SyncPRG(void) {
{ switch (mode & 3) {
switch(mode & 3) { case 0:
case 0: setprg8(0x8000, vrc2_prg[0]);
setprg8(0x8000, vrc2_prg[0]); setprg8(0xA000, vrc2_prg[1]);
setprg8(0xA000, vrc2_prg[1]); setprg8(0xC000, ~1);
setprg8(0xC000, ~1); setprg8(0xE000, ~0);
setprg8(0xE000, ~0); break;
break; case 1:
case 1: {
uint32 swap = (mmc3_ctrl >> 5) & 2;
setprg8(0x8000, mmc3_regs[6 + swap]);
setprg8(0xA000, mmc3_regs[7]);
setprg8(0xC000, mmc3_regs[6 + (swap ^ 2)]);
setprg8(0xE000, mmc3_regs[9]);
break;
}
case 2:
case 3: {
uint8 bank = mmc1_regs[3] & 0xF;
if(mmc1_regs[0] & 8)
{
if(mmc1_regs[0] & 4)
{
setprg16(0x8000, bank);
setprg16(0xC000, 0x0F);
}
else
{
setprg16(0x8000, 0);
setprg16(0xC000, bank);
}
}
else
setprg32(0x8000, bank >> 1);
break;
}
}
}
static void SyncCHR(void)
{
uint32 base = (mode & 4) << 6;
switch(mode & 3) {
case 0:
setchr1(0x0000, base|vrc2_chr[0]);
setchr1(0x0400, base|vrc2_chr[1]);
setchr1(0x0800, base|vrc2_chr[2]);
setchr1(0x0c00, base|vrc2_chr[3]);
setchr1(0x1000, base|vrc2_chr[4]);
setchr1(0x1400, base|vrc2_chr[5]);
setchr1(0x1800, base|vrc2_chr[6]);
setchr1(0x1c00, base|vrc2_chr[7]);
break;
case 1: {
uint32 swap = (mmc3_ctrl & 0x80) << 5;
setchr1(0x0000 ^ swap, base|((mmc3_regs[0])&0xFE));
setchr1(0x0400 ^ swap, base|(mmc3_regs[0]|1));
setchr1(0x0800 ^ swap, base|((mmc3_regs[1])&0xFE));
setchr1(0x0c00 ^ swap, base|(mmc3_regs[1]|1));
setchr1(0x1000 ^ swap, base|mmc3_regs[2]);
setchr1(0x1400 ^ swap, base|mmc3_regs[3]);
setchr1(0x1800 ^ swap, base|mmc3_regs[4]);
setchr1(0x1c00 ^ swap, base|mmc3_regs[5]);
break;
}
case 2:
case 3:
if(mmc1_regs[0]&0x10)
{
setchr4(0x0000, mmc1_regs[1]);
setchr4(0x1000, mmc1_regs[2]);
}
else
setchr8(mmc1_regs[1] >> 1);
break;
}
}
static void SyncMIR(void)
{
switch(mode & 3) {
case 0: {
setmirror((vrc2_mirr&1)^1);
break;
}
case 1: {
setmirror((mmc3_mirr&1)^1);
break;
}
case 2:
case 3: {
switch(mmc1_regs[0]&3) {
case 0: setmirror(MI_0); break;
case 1: setmirror(MI_1); break;
case 2: setmirror(MI_V); break;
case 3: setmirror(MI_H); break;
}
break;
}
}
}
static void Sync(void)
{
SyncPRG();
SyncCHR();
SyncMIR();
}
static DECLFW(UNLSL12ModeWrite)
{
// printf("%04X:%02X\n",A,V);
if((A & 0x4100) == 0x4100) {
mode = V;
if(A&1) { // hacky hacky, there are two configuration modes on SOMARI HUANG-1 PCBs
// Solder pads with P1/P2 shorted called SOMARI P,
// Solder pads with W1/W2 shorted called SOMARI W
// Both identical 3-in-1 but W wanted MMC1 registers
// to be reset when switch to MMC1 mode P one - doesn't
// There is issue with W version of Somari at starting copyrights
mmc1_regs[0] = 0xc;
mmc1_regs[3] = 0;
mmc1_buffer = 0;
mmc1_shift = 0;
}
Sync();
}
}
static DECLFW(UNLSL12Write)
{
// printf("%04X:%02X\n",A,V);
if(A==0xA123)
{ {
int zzz=9; uint32 swap = (mmc3_ctrl >> 5) & 2;
setprg8(0x8000, mmc3_regs[6 + swap]);
setprg8(0xA000, mmc3_regs[7]);
setprg8(0xC000, mmc3_regs[6 + (swap ^ 2)]);
setprg8(0xE000, mmc3_regs[9]);
break;
}
case 2:
case 3:
{
uint8 bank = mmc1_regs[3] & 0xF;
if (mmc1_regs[0] & 8) {
if (mmc1_regs[0] & 4) {
setprg16(0x8000, bank);
setprg16(0xC000, 0x0F);
} else {
setprg16(0x8000, 0);
setprg16(0xC000, bank);
}
} else
setprg32(0x8000, bank >> 1);
break;
}
} }
switch(mode & 3) {
case 0: {
if((A>=0xB000)&&(A<=0xE003))
{
int32 ind=((((A&2)|(A>>10))>>1)+2)&7;
int32 sar=((A&1)<<2);
vrc2_chr[ind]=(vrc2_chr[ind]&(0xF0>>sar))|((V&0x0F)<<sar);
SyncCHR();
}
else
switch(A&0xF000) {
case 0x8000: vrc2_prg[0] = V; SyncPRG(); break;
case 0xA000: vrc2_prg[1] = V; SyncPRG(); break;
case 0x9000: vrc2_mirr = V; SyncMIR(); break;
}
break;
}
case 1: {
switch(A & 0xE001) {
case 0x8000: {
uint8 old_ctrl = mmc3_ctrl;
mmc3_ctrl = V;
if((old_ctrl&0x40) != (mmc3_ctrl&0x40))
SyncPRG();
if((old_ctrl&0x80) != (mmc3_ctrl&0x80))
SyncCHR();
break;
}
case 0x8001:
mmc3_regs[mmc3_ctrl & 7] = V;
if((mmc3_ctrl & 7) < 6)
SyncCHR();
else
SyncPRG();
break;
case 0xA000:
mmc3_mirr = V;
SyncMIR();
break;
case 0xC000:
IRQLatch = V;
break;
case 0xC001:
IRQReload = 1;
break;
case 0xE000:
X6502_IRQEnd(FCEU_IQEXT);
IRQa=0;
break;
case 0xE001:
IRQa=1;
break;
}
break;
}
case 2:
case 3: {
if(V & 0x80)
{
mmc1_regs[0] |= 0xc;
mmc1_buffer = mmc1_shift = 0;
SyncPRG();
}
else
{
uint8 n = (A >> 13) - 4;
mmc1_buffer |= (V & 1) << (mmc1_shift++);
if(mmc1_shift == 5)
{
mmc1_regs[n] = mmc1_buffer;
mmc1_buffer = mmc1_shift = 0;
switch(n) {
case 0: SyncMIR();
case 2: SyncCHR();
case 3:
case 1: SyncPRG();
}
}
}
break;
}
}
} }
static void UNLSL12HBIRQ(void) static void SyncCHR(void) {
{ uint32 base = (mode & 4) << 6;
if((mode & 3) == 1) switch (mode & 3) {
{ case 0:
int32 count = IRQCount; setchr1(0x0000, base | vrc2_chr[0]);
if(!count || IRQReload) setchr1(0x0400, base | vrc2_chr[1]);
{ setchr1(0x0800, base | vrc2_chr[2]);
IRQCount = IRQLatch; setchr1(0x0c00, base | vrc2_chr[3]);
IRQReload = 0; setchr1(0x1000, base | vrc2_chr[4]);
} setchr1(0x1400, base | vrc2_chr[5]);
else setchr1(0x1800, base | vrc2_chr[6]);
IRQCount--; setchr1(0x1c00, base | vrc2_chr[7]);
if(!IRQCount) break;
{ case 1: {
if(IRQa) uint32 swap = (mmc3_ctrl & 0x80) << 5;
X6502_IRQBegin(FCEU_IQEXT); setchr1(0x0000 ^ swap, base | ((mmc3_regs[0]) & 0xFE));
} setchr1(0x0400 ^ swap, base | (mmc3_regs[0] | 1));
} setchr1(0x0800 ^ swap, base | ((mmc3_regs[1]) & 0xFE));
setchr1(0x0c00 ^ swap, base | (mmc3_regs[1] | 1));
setchr1(0x1000 ^ swap, base | mmc3_regs[2]);
setchr1(0x1400 ^ swap, base | mmc3_regs[3]);
setchr1(0x1800 ^ swap, base | mmc3_regs[4]);
setchr1(0x1c00 ^ swap, base | mmc3_regs[5]);
break;
}
case 2:
case 3:
if (mmc1_regs[0] & 0x10) {
setchr4(0x0000, mmc1_regs[1]);
setchr4(0x1000, mmc1_regs[2]);
} else
setchr8(mmc1_regs[1] >> 1);
break;
}
} }
static void StateRestore(int version) static void SyncMIR(void) {
{ switch (mode & 3) {
Sync(); case 0: {
setmirror((vrc2_mirr & 1) ^ 1);
break;
}
case 1: {
setmirror((mmc3_mirr & 1) ^ 1);
break;
}
case 2:
case 3: {
switch (mmc1_regs[0] & 3) {
case 0: setmirror(MI_0); break;
case 1: setmirror(MI_1); break;
case 2: setmirror(MI_V); break;
case 3: setmirror(MI_H); break;
}
break;
}
}
} }
static void UNLSL12Power(void) static void Sync(void) {
{ SyncPRG();
mode = 0; SyncCHR();
vrc2_chr[0] = ~0; SyncMIR();
vrc2_chr[1] = ~0;
vrc2_chr[2] = ~0;
vrc2_chr[3] = ~0; // W conf. of Somari wanted CHR3 has to be set to BB bank (or similar), but doesn't do that directly
vrc2_chr[4] = 4;
vrc2_chr[5] = 5;
vrc2_chr[6] = 6;
vrc2_chr[7] = 7;
vrc2_prg[0] = 0;
vrc2_prg[1] = 1;
vrc2_mirr = 0;
mmc3_regs[0] = 0;
mmc3_regs[1] = 2;
mmc3_regs[2] = 4;
mmc3_regs[3] = 5;
mmc3_regs[4] = 6;
mmc3_regs[5] = 7;
mmc3_regs[6] = ~3;
mmc3_regs[7] = ~2;
mmc3_regs[8] = ~1;
mmc3_regs[9] = ~0;
mmc3_ctrl = mmc3_mirr = IRQCount = IRQLatch = IRQa = 0;
mmc1_regs[0] = 0xc;
mmc1_regs[1] = 0;
mmc1_regs[2] = 0;
mmc1_regs[3] = 0;
mmc1_buffer = 0;
mmc1_shift = 0;
Sync();
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x4100,0x7FFF,UNLSL12ModeWrite);
SetWriteHandler(0x8000,0xFFFF,UNLSL12Write);
} }
void UNLSL12_Init(CartInfo *info) static DECLFW(UNLSL12ModeWrite) {
{ // FCEU_printf("%04X:%02X\n",A,V);
info->Power = UNLSL12Power; if ((A & 0x4100) == 0x4100) {
GameHBIRQHook = UNLSL12HBIRQ; mode = V;
GameStateRestore = StateRestore; if (A & 1) { // hacky hacky, there are two configuration modes on SOMARI HUANG-1 PCBs
AddExState(&StateRegs, ~0, 0, 0); // Solder pads with P1/P2 shorted called SOMARI P,
// Solder pads with W1/W2 shorted called SOMARI W
// Both identical 3-in-1 but W wanted MMC1 registers
// to be reset when switch to MMC1 mode P one - doesn't
// There is issue with W version of Somari at starting copyrights
mmc1_regs[0] = 0xc;
mmc1_regs[3] = 0;
mmc1_buffer = 0;
mmc1_shift = 0;
}
Sync();
}
} }
void Mapper116_Init(CartInfo *info) static DECLFW(UNLSL12Write) {
{ // FCEU_printf("%04X:%02X\n",A,V);
UNLSL12_Init(info); switch (mode & 3) {
case 0: {
if ((A >= 0xB000) && (A <= 0xE003)) {
int32 ind = ((((A & 2) | (A >> 10)) >> 1) + 2) & 7;
int32 sar = ((A & 1) << 2);
vrc2_chr[ind] = (vrc2_chr[ind] & (0xF0 >> sar)) | ((V & 0x0F) << sar);
SyncCHR();
} else
switch (A & 0xF000) {
case 0x8000: vrc2_prg[0] = V; SyncPRG(); break;
case 0xA000: vrc2_prg[1] = V; SyncPRG(); break;
case 0x9000: vrc2_mirr = V; SyncMIR(); break;
}
break;
}
case 1: {
switch (A & 0xE001) {
case 0x8000: {
uint8 old_ctrl = mmc3_ctrl;
mmc3_ctrl = V;
if ((old_ctrl & 0x40) != (mmc3_ctrl & 0x40))
SyncPRG();
if ((old_ctrl & 0x80) != (mmc3_ctrl & 0x80))
SyncCHR();
break;
}
case 0x8001:
mmc3_regs[mmc3_ctrl & 7] = V;
if ((mmc3_ctrl & 7) < 6)
SyncCHR();
else
SyncPRG();
break;
case 0xA000:
mmc3_mirr = V;
SyncMIR();
break;
case 0xC000:
IRQLatch = V;
break;
case 0xC001:
IRQReload = 1;
break;
case 0xE000:
X6502_IRQEnd(FCEU_IQEXT);
IRQa = 0;
break;
case 0xE001:
IRQa = 1;
break;
}
break;
}
case 2:
case 3: {
if (V & 0x80) {
mmc1_regs[0] |= 0xc;
mmc1_buffer = mmc1_shift = 0;
SyncPRG();
} else {
uint8 n = (A >> 13) - 4;
mmc1_buffer |= (V & 1) << (mmc1_shift++);
if (mmc1_shift == 5) {
mmc1_regs[n] = mmc1_buffer;
mmc1_buffer = mmc1_shift = 0;
switch (n) {
case 0: SyncMIR();
case 2: SyncCHR();
case 3:
case 1: SyncPRG();
}
}
}
break;
}
}
}
static void UNLSL12HBIRQ(void) {
if ((mode & 3) == 1) {
int32 count = IRQCount;
if (!count || IRQReload) {
IRQCount = IRQLatch;
IRQReload = 0;
} else
IRQCount--;
if (!IRQCount) {
if (IRQa)
X6502_IRQBegin(FCEU_IQEXT);
}
}
}
static void StateRestore(int version) {
Sync();
}
static void UNLSL12Power(void) {
mode = 0;
vrc2_chr[0] = ~0;
vrc2_chr[1] = ~0;
vrc2_chr[2] = ~0;
vrc2_chr[3] = ~0; // W conf. of Somari wanted CHR3 has to be set to BB bank (or similar), but doesn't do that directly
vrc2_chr[4] = 4;
vrc2_chr[5] = 5;
vrc2_chr[6] = 6;
vrc2_chr[7] = 7;
vrc2_prg[0] = 0;
vrc2_prg[1] = 1;
vrc2_mirr = 0;
mmc3_regs[0] = 0;
mmc3_regs[1] = 2;
mmc3_regs[2] = 4;
mmc3_regs[3] = 5;
mmc3_regs[4] = 6;
mmc3_regs[5] = 7;
mmc3_regs[6] = ~3;
mmc3_regs[7] = ~2;
mmc3_regs[8] = ~1;
mmc3_regs[9] = ~0;
mmc3_ctrl = mmc3_mirr = IRQCount = IRQLatch = IRQa = 0;
mmc1_regs[0] = 0xc;
mmc1_regs[1] = 0;
mmc1_regs[2] = 0;
mmc1_regs[3] = 0;
mmc1_buffer = 0;
mmc1_shift = 0;
Sync();
SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x4100, 0x7FFF, UNLSL12ModeWrite);
SetWriteHandler(0x8000, 0xFFFF, UNLSL12Write);
}
void UNLSL12_Init(CartInfo *info) {
info->Power = UNLSL12Power;
GameHBIRQHook = UNLSL12HBIRQ;
GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
} }

115
src/boards/117.cpp
View File

@ -23,82 +23,69 @@
static uint8 prgreg[4], chrreg[8], mirror; static uint8 prgreg[4], chrreg[8], mirror;
static uint8 IRQa, IRQCount, IRQLatch; static uint8 IRQa, IRQCount, IRQLatch;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQLatch, 1, "IRQL"}, { &IRQLatch, 1, "IRQL" },
{prgreg, 4, "PREG"}, { prgreg, 4, "PREG" },
{chrreg, 8, "CREG"}, { chrreg, 8, "CREG" },
{&mirror, 1, "MREG"}, { &mirror, 1, "MREG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x8000, prgreg[0]);
int i; setprg8(0xa000, prgreg[1]);
setprg8(0x8000,prgreg[0]); setprg8(0xc000, prgreg[2]);
setprg8(0xa000,prgreg[1]); setprg8(0xe000, prgreg[3]);
setprg8(0xc000,prgreg[2]); int i;
setprg8(0xe000,prgreg[3]); for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chrreg[i]);
setchr1(i<<10,chrreg[i]); setmirror(mirror ^ 1);
setmirror(mirror^1);
} }
static DECLFW(M117Write) static DECLFW(M117Write) {
{ if (A < 0x8004) {
if(A<0x8004) prgreg[A & 3] = V;
{ Sync();
prgreg[A&3]=V; } else if ((A >= 0xA000) && (A <= 0xA007)) {
Sync(); chrreg[A & 7] = V;
} Sync();
else if((A>=0xA000)&&(A<=0xA007)) } else switch (A) {
{ case 0xc001: IRQLatch = V; break;
chrreg[A&7]=V; case 0xc003: IRQCount = IRQLatch; IRQa |= 2; break;
Sync(); case 0xe000: IRQa &= ~1; IRQa |= V & 1; X6502_IRQEnd(FCEU_IQEXT); break;
} case 0xc002: X6502_IRQEnd(FCEU_IQEXT); break;
else switch(A) case 0xd000: mirror = V & 1;
{ }
case 0xc001: IRQLatch=V; break;
case 0xc003: IRQCount=IRQLatch; IRQa|=2; break;
case 0xe000: IRQa&=~1; IRQa|=V&1; X6502_IRQEnd(FCEU_IQEXT); break;
case 0xc002: X6502_IRQEnd(FCEU_IQEXT); break;
case 0xd000: mirror=V&1;
}
} }
static void M117Power(void) static void M117Power(void) {
{ prgreg[0] = ~3; prgreg[1] = ~2; prgreg[2] = ~1; prgreg[3] = ~0;
prgreg[0]=~3; prgreg[1]=~2; prgreg[2]=~1; prgreg[3]=~0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M117Write);
SetWriteHandler(0x8000,0xFFFF,M117Write);
} }
static void M117IRQHook(void) static void M117IRQHook(void) {
{ if (IRQa == 3 && IRQCount) {
if(IRQa==3&&IRQCount) IRQCount--;
{ if (!IRQCount) {
IRQCount--; IRQa &= 1;
if(!IRQCount) X6502_IRQBegin(FCEU_IQEXT);
{ }
IRQa&=1; }
X6502_IRQBegin(FCEU_IQEXT);
}
}
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper117_Init(CartInfo *info) void Mapper117_Init(CartInfo *info) {
{ info->Power = M117Power;
info->Power=M117Power; GameHBIRQHook = M117IRQHook;
GameHBIRQHook=M117IRQHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

52
src/boards/120.cpp
View File

@ -22,44 +22,38 @@
static uint8 reg; static uint8 reg;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x6000, reg);
setprg8(0x6000,reg); setprg32(0x8000, 2);
setprg32(0x8000,2); setchr8(0);
setchr8(0);
} }
static DECLFW(M120Write) static DECLFW(M120Write) {
{ if (A == 0x41FF) {
if(A==0x41FF) reg = V & 7;
{ Sync();
reg=V&7; }
Sync();
}
} }
static void M120Power(void) static void M120Power(void) {
{ reg = 0;
reg=0; Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x4100, 0x5FFF, M120Write);
SetWriteHandler(0x4100,0x5FFF,M120Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper120_Init(CartInfo *info) void Mapper120_Init(CartInfo *info) {
{ info->Power = M120Power;
info->Power=M120Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

180
src/boards/121.cpp
View File

@ -28,116 +28,102 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static void Sync() static void Sync() {
{ switch (EXPREGS[5] & 0x3F) {
switch(EXPREGS[5]&0x3F) case 0x20: EXPREGS[7] = 1; EXPREGS[0] = EXPREGS[6]; break;
{ case 0x29: EXPREGS[7] = 1; EXPREGS[0] = EXPREGS[6]; break;
case 0x20: EXPREGS[7] = 1; EXPREGS[0]=EXPREGS[6]; break; case 0x26: EXPREGS[7] = 0; EXPREGS[0] = EXPREGS[6]; break;
case 0x29: EXPREGS[7] = 1; EXPREGS[0]=EXPREGS[6]; break; case 0x2B: EXPREGS[7] = 1; EXPREGS[0] = EXPREGS[6]; break;
case 0x26: EXPREGS[7] = 0; EXPREGS[0]=EXPREGS[6]; break; case 0x2C: EXPREGS[7] = 1; if (EXPREGS[6]) EXPREGS[0] = EXPREGS[6]; break;
case 0x2B: EXPREGS[7] = 1; EXPREGS[0]=EXPREGS[6]; break; case 0x3C:
case 0x2C: EXPREGS[7] = 1; if(EXPREGS[6]) EXPREGS[0]=EXPREGS[6]; break; case 0x3F: EXPREGS[7] = 1; EXPREGS[0] = EXPREGS[6]; break;
case 0x3C: case 0x28: EXPREGS[7] = 0; EXPREGS[1] = EXPREGS[6]; break;
case 0x3F: EXPREGS[7] = 1; EXPREGS[0]=EXPREGS[6]; break; case 0x2A: EXPREGS[7] = 0; EXPREGS[2] = EXPREGS[6]; break;
case 0x28: EXPREGS[7] = 0; EXPREGS[1]=EXPREGS[6]; break; case 0x2F: break;
case 0x2A: EXPREGS[7] = 0; EXPREGS[2]=EXPREGS[6]; break; default: EXPREGS[5] = 0; break;
case 0x2F: break; }
default: EXPREGS[5] = 0; break;
}
} }
static void M121CW(uint32 A, uint8 V) static void M121CW(uint32 A, uint8 V) {
{ if (PRGsize[0] == CHRsize[0]) { // A9713 multigame extension hack!
if(PRGsize[0] == CHRsize[0]) // A9713 multigame extension hack! setchr1(A, V | ((EXPREGS[3] & 0x80) << 1));
{ } else {
setchr1(A,V|((EXPREGS[3]&0x80)<<1)); if ((A & 0x1000) == ((MMC3_cmd & 0x80) << 5))
} setchr1(A, V | 0x100);
else else
{ setchr1(A, V);
if((A&0x1000)==((MMC3_cmd&0x80)<<5)) }
setchr1(A,V|0x100);
else
setchr1(A,V);
}
} }
static void M121PW(uint32 A, uint8 V) static void M121PW(uint32 A, uint8 V) {
{ if (EXPREGS[5] & 0x3F) {
if(EXPREGS[5]&0x3F) // FCEU_printf("prot banks: %02x %02x %02x %02x\n",V,EXPREGS[2],EXPREGS[1],EXPREGS[0]);
{ setprg8(A, (V & 0x1F) | ((EXPREGS[3] & 0x80) >> 2));
// FCEU_printf("prot banks: %02x %02x %02x %02x\n",V,EXPREGS[2],EXPREGS[1],EXPREGS[0]); setprg8(0xE000, (EXPREGS[0]) | ((EXPREGS[3] & 0x80) >> 2));
setprg8(A,(V&0x1F)|((EXPREGS[3]&0x80)>>2)); setprg8(0xC000, (EXPREGS[1]) | ((EXPREGS[3] & 0x80) >> 2));
setprg8(0xE000,(EXPREGS[0])|((EXPREGS[3]&0x80)>>2)); setprg8(0xA000, (EXPREGS[2]) | ((EXPREGS[3] & 0x80) >> 2));
setprg8(0xC000,(EXPREGS[1])|((EXPREGS[3]&0x80)>>2)); } else {
setprg8(0xA000,(EXPREGS[2])|((EXPREGS[3]&0x80)>>2)); // FCEU_printf("gen banks: %04x %02x\n",A,V);
} setprg8(A, (V & 0x1F) | ((EXPREGS[3] & 0x80) >> 2));
else }
{
// FCEU_printf("gen banks: %04x %02x\n",A,V);
setprg8(A,(V&0x1F)|((EXPREGS[3]&0x80)>>2));
}
} }
static DECLFW(M121Write) static DECLFW(M121Write) {
{ // FCEU_printf("write: %04x:%04x\n",A&0xE003,V);
// FCEU_printf("write: %04x:%04x\n",A&0xE003,V); switch (A & 0xE003) {
switch(A&0xE003) case 0x8000:
{ // EXPREGS[5] = 0;
case 0x8000: //EXPREGS[5] = 0; // FCEU_printf("gen: %02x\n",V);
// FCEU_printf("gen: %02x\n",V); MMC3_CMDWrite(A, V);
MMC3_CMDWrite(A,V); FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); break;
break; case 0x8001:
case 0x8001: EXPREGS[6] = ((V&1)<<5)|((V&2)<<3)|((V&4)<<1)|((V&8)>>1)|((V&0x10)>>3)|((V&0x20)>>5); EXPREGS[6] = ((V & 1) << 5) | ((V & 2) << 3) | ((V & 4) << 1) | ((V & 8) >> 1) | ((V & 0x10) >> 3) | ((V & 0x20) >> 5);
// FCEU_printf("bank: %02x (%02x)\n",V,EXPREGS[6]); // FCEU_printf("bank: %02x (%02x)\n",V,EXPREGS[6]);
if(!EXPREGS[7]) Sync(); if (!EXPREGS[7]) Sync();
MMC3_CMDWrite(A,V); MMC3_CMDWrite(A, V);
FixMMC3PRG(MMC3_cmd); FixMMC3PRG(MMC3_cmd);
break; break;
case 0x8003: EXPREGS[5] = V; case 0x8003:
// EXPREGS[7] = 0; EXPREGS[5] = V;
// FCEU_printf("prot: %02x\n",EXPREGS[5]); // EXPREGS[7] = 0;
Sync(); // FCEU_printf("prot: %02x\n",EXPREGS[5]);
MMC3_CMDWrite(0x8000,V); Sync();
FixMMC3PRG(MMC3_cmd); MMC3_CMDWrite(0x8000, V);
break; FixMMC3PRG(MMC3_cmd);
} break;
}
} }
static uint8 prot_array[16] = { 0x83, 0x83, 0x42, 0x00 }; static uint8 prot_array[16] = { 0x83, 0x83, 0x42, 0x00 };
static DECLFW(M121LoWrite) static DECLFW(M121LoWrite) {
{ EXPREGS[4] = prot_array[V & 3]; // 0x100 bit in address seems to be switch arrays 0, 2, 2, 3 (Contra Fighter)
EXPREGS[4] = prot_array[V&3]; // 0x100 bit in address seems to be switch arrays 0, 2, 2, 3 (Contra Fighter) if ((A & 0x5180) == 0x5180) { // A9713 multigame extension
if((A & 0x5180) == 0x5180) // A9713 multigame extension EXPREGS[3] = V;
{ FixMMC3PRG(MMC3_cmd);
EXPREGS[3] = V; FixMMC3CHR(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); }
FixMMC3CHR(MMC3_cmd); // FCEU_printf("write: %04x:%04x\n",A,V);
}
// FCEU_printf("write: %04x:%04x\n",A,V);
} }
static DECLFR(M121Read) static DECLFR(M121Read) {
{ // FCEU_printf("read: %04x->\n",A,EXPREGS[0]);
// FCEU_printf("read: %04x->\n",A,EXPREGS[0]); return EXPREGS[4];
return EXPREGS[4];
} }
static void M121Power(void) static void M121Power(void) {
{ EXPREGS[3] = 0x80;
EXPREGS[3] = 0x80; EXPREGS[5] = 0;
EXPREGS[5] = 0; GenMMC3Power();
GenMMC3Power(); SetReadHandler(0x5000, 0x5FFF, M121Read);
SetReadHandler(0x5000,0x5FFF,M121Read); SetWriteHandler(0x5000, 0x5FFF, M121LoWrite);
SetWriteHandler(0x5000,0x5FFF,M121LoWrite); SetWriteHandler(0x8000, 0x9FFF, M121Write);
SetWriteHandler(0x8000,0x9FFF,M121Write);
} }
void Mapper121_Init(CartInfo *info) void Mapper121_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 256, 8, 0);
GenMMC3_Init(info, 128, 256, 8, 0); pwrap = M121PW;
pwrap=M121PW; cwrap = M121CW;
cwrap=M121CW; info->Power = M121Power;
info->Power=M121Power; AddExState(EXPREGS, 8, 0, "EXPR");
AddExState(EXPREGS, 8, 0, "EXPR");
} }

77
src/boards/12in1.cpp
View File

@ -16,62 +16,55 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* 7-in-1 Darkwing Duck, Snake, MagicBlock (PCB marked as "12 in 1")
*/ */
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[4]; static uint8 reg[4];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 4, "REGS"}, { reg, 4, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ uint8 bank = (reg[3] & 3) << 3;
uint8 bank = (reg[3]&3)<<3; setchr4(0x0000, (reg[1] >> 3) | (bank << 2));
setchr4(0x0000, (reg[1]>>3)|(bank<<2)); setchr4(0x1000, (reg[2] >> 3) | (bank << 2));
setchr4(0x1000, (reg[2]>>3)|(bank<<2)); if (reg[3] & 8) {
if(reg[3]&8) setprg32(0x8000, ((reg[2] & 7) >> 1) | bank);
{ } else {
setprg32(0x8000,((reg[2]&7)>>1)|bank); setprg16(0x8000, (reg[1] & 7) | bank);
} setprg16(0xc000, 7 | bank);
else }
{ setmirror(((reg[3] & 4) >> 2) ^ 1);
setprg16(0x8000, (reg[1]&7)|bank);
setprg16(0xc000, 7|bank);
}
setmirror(((reg[3]&4)>>2)^1);
} }
static DECLFW(BMC12IN1Write) static DECLFW(BMC12IN1Write) {
{ switch (A) {
switch(A) case 0xafff: reg[0] = V; break;
{ case 0xbfff: reg[1] = V; break;
case 0xafff: reg[0] = V; break; case 0xdfff: reg[2] = V; break;
case 0xbfff: reg[1] = V; break; case 0xefff: reg[3] = V; break;
case 0xdfff: reg[2] = V; break; }
case 0xefff: reg[3] = V; break; Sync();
}
Sync();
} }
static void BMC12IN1Power(void) static void BMC12IN1Power(void) {
{ reg[0] = reg[1] = reg[2] = reg[3] = 0;
reg[0]=reg[1]=reg[2]=reg[3]=0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, BMC12IN1Write);
SetWriteHandler(0x8000,0xFFFF,BMC12IN1Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void BMC12IN1_Init(CartInfo *info) void BMC12IN1_Init(CartInfo *info) {
{ info->Power = BMC12IN1Power;
info->Power=BMC12IN1Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

51
src/boards/151.cpp
View File

@ -22,43 +22,38 @@
static uint8 regs[8]; static uint8 regs[8];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{regs, 8, "REGS"}, { regs, 8, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x8000, regs[0]);
setprg8(0x8000,regs[0]); setprg8(0xA000, regs[2]);
setprg8(0xA000,regs[2]); setprg8(0xC000, regs[4]);
setprg8(0xC000,regs[4]); setprg8(0xE000, ~0);
setprg8(0xE000,~0); setchr4(0x0000, regs[6]);
setchr4(0x0000,regs[6]); setchr4(0x1000, regs[7]);
setchr4(0x1000,regs[7]);
} }
static DECLFW(M151Write) static DECLFW(M151Write) {
{ regs[(A >> 12) & 7] = V;
regs[(A >> 12)&7] = V; Sync();
Sync();
} }
static void M151Power(void) static void M151Power(void) {
{ Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M151Write);
SetWriteHandler(0x8000,0xFFFF,M151Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper151_Init(CartInfo *info) void Mapper151_Init(CartInfo *info) {
{ info->Power = M151Power;
info->Power=M151Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

148
src/boards/156.cpp
View File

@ -21,101 +21,93 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 chrlo[8], chrhi[8], prg, mirr, mirrisused = 0; static uint8 chrlo[8], chrhi[8], prg, mirr, mirrisused = 0;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&prg, 1, "PREG"}, { &prg, 1, "PREG" },
{chrlo, 8, "CRGL"}, { chrlo, 8, "CRGL" },
{chrhi, 8, "CRGH"}, { chrhi, 8, "CRGH" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ uint32 i;
uint32 i; for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chrlo[i] | (chrhi[i] << 8));
setchr1(i<<10, chrlo[i]|(chrhi[i] << 8)); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg16(0x8000, prg);
setprg16(0x8000,prg); setprg16(0xC000, ~0);
setprg16(0xC000,~0); if (mirrisused)
if(mirrisused) setmirror(mirr ^ 1);
setmirror(mirr ^ 1); else
else setmirror(MI_0);
setmirror(MI_0);
} }
static DECLFW(M156Write) static DECLFW(M156Write) {
{ switch (A) {
switch(A) { case 0xC000:
case 0xC000: case 0xC001:
case 0xC001: case 0xC002:
case 0xC002: case 0xC003: chrlo[A & 3] = V; Sync(); break;
case 0xC003: chrlo[A&3] = V; Sync(); break; case 0xC004:
case 0xC004: case 0xC005:
case 0xC005: case 0xC006:
case 0xC006: case 0xC007: chrhi[A & 3] = V; Sync(); break;
case 0xC007: chrhi[A&3] = V; Sync(); break; case 0xC008:
case 0xC008: case 0xC009:
case 0xC009: case 0xC00A:
case 0xC00A: case 0xC00B: chrlo[4 + (A & 3)] = V; Sync(); break;
case 0xC00B: chrlo[4+(A&3)] = V; Sync(); break; case 0xC00C:
case 0xC00C: case 0xC00D:
case 0xC00D: case 0xC00E:
case 0xC00E: case 0xC00F: chrhi[4 + (A & 3)] = V; Sync(); break;
case 0xC00F: chrhi[4+(A&3)] = V; Sync(); break; case 0xC010: prg = V; Sync(); break;
case 0xC010: prg = V; Sync(); break; case 0xC014: mirr = V; mirrisused = 1; Sync(); break;
case 0xC014: mirr = V; mirrisused = 1; Sync(); break; }
}
} }
static void M156Reset(void) static void M156Reset(void) {
{ uint32 i;
uint32 i; for (i = 0; i < 8; i++) {
for(i=0;i<8;i++) chrlo[i] = 0;
{ chrhi[i] = 0;
chrlo[i]=0; }
chrhi[i]=0; prg = 0;
} mirr = 0;
prg=0; mirrisused = 0;
mirr=0;
mirrisused = 0;
} }
static void M156Power(void) static void M156Power(void) {
{ M156Reset();
M156Reset(); Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetWriteHandler(0xC000, 0xCFFF, M156Write);
SetWriteHandler(0xC000,0xCFFF,M156Write);
} }
static void M156Close(void) static void M156Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper156_Init(CartInfo *info) void Mapper156_Init(CartInfo *info) {
{ info->Reset = M156Reset;
info->Power=M156Reset; info->Power = M156Power;
info->Power=M156Power; info->Close = M156Close;
info->Close=M156Close;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

80
src/boards/168.cpp
View File

@ -21,66 +21,58 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg; static uint8 reg;
static uint8 *CHRRAM=NULL; static uint8 *CHRRAM = NULL;
static uint32 CHRRAMSIZE; static uint32 CHRRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REGS"}, { &reg, 1, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr4r(0x10, 0x0000, 0);
setchr4r(0x10,0x0000,0); setchr4r(0x10, 0x1000, reg & 0x0f);
setchr4r(0x10,0x1000,reg&0x0f); setprg16(0x8000, reg >> 6);
setprg16(0x8000,reg>>6); setprg16(0xc000, ~0);
setprg16(0xc000,~0);
} }
static DECLFW(M168Write) static DECLFW(M168Write) {
{ reg = V;
reg=V; Sync();
Sync();
} }
static DECLFW(M168Dummy) static DECLFW(M168Dummy) {
{
} }
static void M168Power(void) static void M168Power(void) {
{ reg = 0;
reg=0; Sync();
Sync(); SetWriteHandler(0x4020, 0x7fff, M168Dummy);
SetWriteHandler(0x4020,0x7fff,M168Dummy); SetWriteHandler(0xB000, 0xB000, M168Write);
SetWriteHandler(0xB000,0xB000,M168Write); SetWriteHandler(0xF000, 0xF000, M168Dummy);
SetWriteHandler(0xF000,0xF000,M168Dummy); SetWriteHandler(0xF080, 0xF080, M168Dummy);
SetWriteHandler(0xF080,0xF080,M168Dummy); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
} }
static void MNNNClose(void) static void MNNNClose(void) {
{ if (CHRRAM)
if(CHRRAM) FCEU_gfree(CHRRAM);
FCEU_gfree(CHRRAM); CHRRAM = NULL;
CHRRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper168_Init(CartInfo *info) void Mapper168_Init(CartInfo *info) {
{ info->Power = M168Power;
info->Power=M168Power; info->Close = MNNNClose;
info->Close=MNNNClose; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
CHRRAMSIZE=8192*8;
CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10,CHRRAM,CHRRAMSIZE,1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");
CHRRAMSIZE = 8192 * 8;
CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CRAM");
} }

54
src/boards/170.cpp
View File

@ -22,47 +22,41 @@
static uint8 reg; static uint8 reg;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REGS"}, { &reg, 1, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg16(0x8000, 0);
setprg16(0x8000, 0); setprg16(0xc000, ~0);
setprg16(0xc000,~0); setchr8(0);
setchr8(0);
} }
static DECLFW(M170ProtW) static DECLFW(M170ProtW) {
{ reg = V << 1 & 0x80;
reg = V << 1 & 0x80;
} }
static DECLFR(M170ProtR) static DECLFR(M170ProtR) {
{ return reg | (X.DB & 0x7F);
return reg | (X.DB & 0x7F);
} }
static void M170Power(void) static void M170Power(void) {
{ Sync();
Sync(); SetWriteHandler(0x6502, 0x6502, M170ProtW);
SetWriteHandler(0x6502,0x6502,M170ProtW); SetWriteHandler(0x7000, 0x7000, M170ProtW);
SetWriteHandler(0x7000,0x7000,M170ProtW); SetReadHandler(0x7001, 0x7001, M170ProtR);
SetReadHandler(0x7001,0x7001,M170ProtR); SetReadHandler(0x7777, 0x7777, M170ProtR);
SetReadHandler(0x7777,0x7777,M170ProtR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper170_Init(CartInfo *info) void Mapper170_Init(CartInfo *info) {
{ info->Power = M170Power;
info->Power=M170Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

85
src/boards/175.cpp
View File

@ -22,67 +22,58 @@
static uint8 reg, delay, mirr; static uint8 reg, delay, mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr8(reg);
setchr8(reg); if (!delay) {
if(!delay) setprg16(0x8000, reg);
{ setprg8(0xC000, reg << 1);
setprg16(0x8000,reg); }
setprg8(0xC000,reg << 1); setprg8(0xE000, (reg << 1) + 1);
} setmirror(((mirr & 4) >> 2) ^ 1);
setprg8(0xE000,(reg << 1) + 1);
setmirror(((mirr&4)>>2)^1);
} }
static DECLFW(M175Write1) static DECLFW(M175Write1) {
{ mirr = V;
mirr = V; delay = 1;
delay = 1; Sync();
Sync();
} }
static DECLFW(M175Write2) static DECLFW(M175Write2) {
{ reg = V & 0x0F;
reg = V & 0x0F; delay = 1;
delay = 1; Sync();
Sync();
} }
static DECLFR(M175Read) static DECLFR(M175Read) {
{ if (A == 0xFFFC) {
if(A==0xFFFC) delay = 0;
{ Sync();
delay = 0; }
Sync(); return CartBR(A);
}
return CartBR(A);
} }
static void M175Power(void) static void M175Power(void) {
{ reg = mirr = delay = 0;
reg = mirr = delay = 0; SetReadHandler(0x8000, 0xFFFF, M175Read);
SetReadHandler(0x8000,0xFFFF,M175Read); SetWriteHandler(0x8000, 0x8000, M175Write1);
SetWriteHandler(0x8000,0x8000,M175Write1); SetWriteHandler(0xA000, 0xA000, M175Write2);
SetWriteHandler(0xA000,0xA000,M175Write2); Sync();
Sync();
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper175_Init(CartInfo *info) void Mapper175_Init(CartInfo *info) {
{ info->Power = M175Power;
info->Power=M175Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

83
src/boards/177.cpp
View File

@ -22,66 +22,59 @@
static uint8 reg; static uint8 reg;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr8(0);
setchr8(0); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg32(0x8000, reg & 0x1f);
setprg32(0x8000,reg&0x1f); setmirror(((reg & 0x20) >> 5) ^ 1);
setmirror(((reg&0x20)>>5)^1);
} }
static DECLFW(M177Write) static DECLFW(M177Write) {
{ reg = V;
reg=V; Sync();
Sync();
} }
static void M177Power(void) static void M177Power(void) {
{ reg = 0;
reg=0; Sync();
Sync(); SetReadHandler(0x6000, 0x7fff, CartBR);
SetReadHandler(0x6000,0x7fff,CartBR); SetWriteHandler(0x6000, 0x7fff, CartBW);
SetWriteHandler(0x6000,0x7fff,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M177Write);
SetWriteHandler(0x8000,0xFFFF,M177Write);
} }
static void M177Close(void) static void M177Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper177_Init(CartInfo *info) void Mapper177_Init(CartInfo *info) {
{ info->Power = M177Power;
info->Power=M177Power; info->Close = M177Close;
info->Close=M177Close; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if(info->battery) if (info->battery) {
{ info->SaveGame[0] = WRAM;
info->SaveGame[0]=WRAM; info->SaveGameLen[0] = WRAMSIZE;
info->SaveGameLen[0]=WRAMSIZE; }
}
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

106
src/boards/178.cpp
View File

@ -21,80 +21,70 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[4]; static uint8 reg[4];
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 4, "REGS"}, { reg, 4, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ uint8 bank = (reg[2] & 3) << 3;
uint8 bank = (reg[2]&3)<<3; setmirror((reg[0] & 1) ^ 1);
setmirror((reg[0]&1)^1); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setchr8(0);
setchr8(0); if (reg[0] & 2) {
if(reg[0]&2) setprg16(0x8000, (reg[1] & 7) | bank);
{ setprg16(0xC000, ((~0) & 7) | bank);
setprg16(0x8000,(reg[1]&7)|bank); } else {
setprg16(0xC000,((~0)&7)|bank); setprg16(0x8000, (reg[1] & 6) | bank);
} setprg16(0xC000, (reg[1] & 6) | bank | 1);
else }
{
setprg16(0x8000,(reg[1]&6)|bank);
setprg16(0xC000,(reg[1]&6)|bank|1);
}
} }
static DECLFW(M178Write) static DECLFW(M178Write) {
{ reg[A & 3] = V;
reg[A&3]=V; Sync();
Sync();
} }
static void M178Power(void) static void M178Power(void) {
{ reg[0] = 1;
reg[0]=1; reg[1] = 0;
reg[1]=0; reg[2] = 0;
reg[2]=0; reg[3] = 0;
reg[3]=0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4800, 0x4803, M178Write);
SetWriteHandler(0x4800,0x4803,M178Write);
} }
static void M178Close(void) static void M178Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper178_Init(CartInfo *info) void Mapper178_Init(CartInfo *info) {
{ info->Power = M178Power;
info->Power=M178Power; info->Close = M178Close;
info->Close=M178Close; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
if(info->battery) if (info->battery) {
{ info->SaveGame[0] = WRAM;
info->SaveGame[0]=WRAM; info->SaveGameLen[0] = WRAMSIZE;
info->SaveGameLen[0]=WRAMSIZE; }
} AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

94
src/boards/179.cpp
View File

@ -1,94 +0,0 @@
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 2007 CaH4e3
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "mapinc.h"
static uint8 reg[2];
static uint8 *WRAM=NULL;
static uint32 WRAMSIZE;
static SFORMAT StateRegs[]=
{
{reg, 2, "REG"},
{0}
};
static void Sync(void)
{
setchr8(0);
setprg8r(0x10,0x6000,0);
setprg32(0x8000,reg[1]>>1);
setmirror((reg[0]&1)^1);
}
static DECLFW(M179Write)
{
if(A==0xa000) reg[0]=V;
Sync();
}
static DECLFW(M179WriteLo)
{
if(A==0x5ff1) reg[1]=V;
Sync();
}
static void M179Power(void)
{
reg[0]=reg[1]=0;
Sync();
SetWriteHandler(0x4020,0x5fff,M179WriteLo);
SetReadHandler(0x6000,0x7fff,CartBR);
SetWriteHandler(0x6000,0x7fff,CartBW);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x8000,0xFFFF,M179Write);
}
static void M179Close(void)
{
if(WRAM)
FCEU_gfree(WRAM);
WRAM=NULL;
}
static void StateRestore(int version)
{
Sync();
}
void Mapper179_Init(CartInfo *info)
{
info->Power=M179Power;
info->Close=M179Close;
GameStateRestore=StateRestore;
WRAMSIZE=8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if(info->battery)
{
info->SaveGame[0]=WRAM;
info->SaveGameLen[0]=WRAMSIZE;
}
AddExState(&StateRegs, ~0, 0, 0);
}

140
src/boards/18.cpp
View File

@ -24,98 +24,88 @@ static uint8 preg[4], creg[8];
static uint8 IRQa, mirr; static uint8 IRQa, mirr;
static int32 IRQCount, IRQLatch; static int32 IRQCount, IRQLatch;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{preg, 4, "PREG"}, { preg, 4, "PREG" },
{creg, 8, "CREG"}, { creg, 8, "CREG" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 4, "IRQC"}, { &IRQCount, 4, "IRQC" },
{&IRQLatch, 4, "IRQL"}, { &IRQLatch, 4, "IRQL" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ int i;
int i; for (i = 0; i < 8; i++) setchr1(i << 10, creg[i]);
for(i=0; i<8; i++) setchr1(i<<10,creg[i]); setprg8(0x8000, preg[0]);
setprg8(0x8000,preg[0]); setprg8(0xA000, preg[1]);
setprg8(0xA000,preg[1]); setprg8(0xC000, preg[2]);
setprg8(0xC000,preg[2]); setprg8(0xE000, ~0);
setprg8(0xE000,~0); if (mirr & 2)
if(mirr & 2) setmirror(MI_0);
setmirror(MI_0); else
else setmirror(mirr & 1);
setmirror(mirr & 1);
} }
static DECLFW(M18WriteIRQ) static DECLFW(M18WriteIRQ) {
{ switch (A & 0xF003) {
switch(A & 0xF003) { case 0xE000: IRQLatch &= 0xFFF0; IRQLatch |= (V & 0x0f) << 0x0; break;
case 0xE000: IRQLatch&=0xFFF0; IRQLatch|=(V&0x0f)<<0x0;break; case 0xE001: IRQLatch &= 0xFF0F; IRQLatch |= (V & 0x0f) << 0x4; break;
case 0xE001: IRQLatch&=0xFF0F; IRQLatch|=(V&0x0f)<<0x4; break; case 0xE002: IRQLatch &= 0xF0FF; IRQLatch |= (V & 0x0f) << 0x8; break;
case 0xE002: IRQLatch&=0xF0FF; IRQLatch|=(V&0x0f)<<0x8; break; case 0xE003: IRQLatch &= 0x0FFF; IRQLatch |= (V & 0x0f) << 0xC; break;
case 0xE003: IRQLatch&=0x0FFF; IRQLatch|=(V&0x0f)<<0xC; break; case 0xF000: IRQCount = IRQLatch; break;
case 0xF000: IRQCount=IRQLatch; break; case 0xF001: IRQa = V & 1; X6502_IRQEnd(FCEU_IQEXT); break;
case 0xF001: IRQa=V&1; X6502_IRQEnd(FCEU_IQEXT); break; case 0xF002: mirr = V & 3; Sync(); break;
case 0xF002: mirr = V&3; Sync(); break; }
}
} }
static DECLFW(M18WritePrg) static DECLFW(M18WritePrg) {
{ uint32 i = ((A >> 1) & 1) | ((A - 0x8000) >> 11);
uint32 i = ((A >> 1) & 1)|((A - 0x8000) >> 11); preg[i] &= (0xF0) >> ((A & 1) << 2);
preg[i] &= (0xF0) >> ((A & 1) << 2); preg[i] |= (V & 0xF) << ((A & 1) << 2);
preg[i] |= (V & 0xF) << ((A & 1) << 2); Sync();
Sync();
} }
static DECLFW(M18WriteChr) static DECLFW(M18WriteChr) {
{ uint32 i = ((A >> 1) & 1) | ((A - 0xA000) >> 11);
uint32 i = ((A >> 1) & 1)|((A - 0xA000) >> 11); creg[i] &= (0xF0) >> ((A & 1) << 2);
creg[i] &= (0xF0) >> ((A & 1) << 2); creg[i] |= (V & 0xF) << ((A & 1) << 2);
creg[i] |= (V & 0xF) << ((A & 1) << 2); Sync();
Sync();
} }
static void M18Power(void) static void M18Power(void) {
{ preg[0] = 0;
preg[0] = 0; preg[1] = 1;
preg[1] = 1; preg[2] = ~1;
preg[2] = ~1; preg[3] = ~0;
preg[3] = ~0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0x9FFF, M18WritePrg);
SetWriteHandler(0x8000,0x9FFF,M18WritePrg); SetWriteHandler(0xA000, 0xDFFF, M18WriteChr);
SetWriteHandler(0xA000,0xDFFF,M18WriteChr); SetWriteHandler(0xE000, 0xFFFF, M18WriteIRQ);
SetWriteHandler(0xE000,0xFFFF,M18WriteIRQ);
} }
static void M18IRQHook(int a) static void M18IRQHook(int a) {
{ if (IRQa && IRQCount) {
if(IRQa && IRQCount) IRQCount -= a;
{ if (IRQCount <= 0) {
IRQCount-=a; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount<=0) IRQCount = 0;
{ IRQa = 0;
X6502_IRQBegin(FCEU_IQEXT); }
IRQCount=0; }
IRQa=0;
}
}
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper18_Init(CartInfo *info) void Mapper18_Init(CartInfo *info) {
{ info->Power = M18Power;
info->Power=M18Power; MapIRQHook = M18IRQHook;
MapIRQHook=M18IRQHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

131
src/boards/183.cpp
View File

@ -28,90 +28,79 @@ static uint8 IRQCount;
static uint8 IRQPre; static uint8 IRQPre;
static uint8 IRQa; static uint8 IRQa;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{prg, 4, "PRG"}, { prg, 4, "PRG" },
{chr, 8, "CHR"}, { chr, 8, "CHR" },
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQPre, 1, "IRQP"}, { &IRQPre, 1, "IRQP" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{0} { 0 }
}; };
static void SyncPrg(void) static void SyncPrg(void) {
{ setprg8(0x6000, 0);
setprg8(0x6000,0); setprg8(0x8000, prg[0]);
setprg8(0x8000,prg[0]); setprg8(0xA000, prg[1]);
setprg8(0xA000,prg[1]); setprg8(0xC000, prg[2]);
setprg8(0xC000,prg[2]); setprg8(0xE000, ~0);
setprg8(0xE000,~0);
} }
static void SyncChr(void) static void SyncChr(void) {
{ int i;
int i; for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chr[i]);
setchr1(i<<10,chr[i]);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ SyncPrg();
SyncPrg(); SyncChr();
SyncChr();
} }
static DECLFW(M183Write) static DECLFW(M183Write) {
{ if (((A & 0xF80C) >= 0xB000) && ((A & 0xF80C) <= 0xE00C)) {
if(((A&0xF80C)>=0xB000)&&((A&0xF80C)<=0xE00C)) int index = (((A >> 11) - 6) | (A >> 3)) & 7;
{ chr[index] = (chr[index] & (0xF0 >> (A & 4))) | ((V & 0x0F) << (A & 4));
int index=(((A>>11)-6)|(A>>3))&7; SyncChr();
chr[index]=(chr[index]&(0xF0>>(A&4)))|((V&0x0F)<<(A&4)); } else switch (A & 0xF80C) {
SyncChr(); case 0x8800: prg[0] = V; SyncPrg(); break;
} case 0xA800: prg[1] = V; SyncPrg(); break;
else switch (A&0xF80C) case 0xA000: prg[2] = V; SyncPrg(); break;
{ case 0x9800:
case 0x8800: prg[0]=V; SyncPrg(); break; switch (V & 3) {
case 0xA800: prg[1]=V; SyncPrg(); break; case 0: setmirror(MI_V); break;
case 0xA000: prg[2]=V; SyncPrg(); break; case 1: setmirror(MI_H); break;
case 0x9800: switch (V&3) case 2: setmirror(MI_0); break;
{ case 3: setmirror(MI_1); break;
case 0: setmirror(MI_V); break; }
case 1: setmirror(MI_H); break; break;
case 2: setmirror(MI_0); break; case 0xF000: IRQCount = ((IRQCount & 0xF0) | (V & 0xF)); break;
case 3: setmirror(MI_1); break; case 0xF004: IRQCount = ((IRQCount & 0x0F) | ((V & 0xF) << 4)); break;
} case 0xF008: IRQa = V; if (!V) IRQPre = 0; X6502_IRQEnd(FCEU_IQEXT); break;
break; case 0xF00C: IRQPre = 16; break;
case 0xF000: IRQCount=((IRQCount&0xF0)|(V&0xF)); break; }
case 0xF004: IRQCount=((IRQCount&0x0F)|((V&0xF)<<4)); break;
case 0xF008: IRQa=V; if(!V)IRQPre=0; X6502_IRQEnd(FCEU_IQEXT); break;
case 0xF00C: IRQPre=16; break;
}
} }
static void M183IRQCounter(void) static void M183IRQCounter(void) {
{ if (IRQa) {
if(IRQa) IRQCount++;
{ if ((IRQCount - IRQPre) == 238)
IRQCount++; X6502_IRQBegin(FCEU_IQEXT);
if((IRQCount-IRQPre)==238) }
X6502_IRQBegin(FCEU_IQEXT);
}
} }
static void M183Power(void) static void M183Power(void) {
{ IRQPre = IRQCount = IRQa = 0;
IRQPre=IRQCount=IRQa=0; SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M183Write);
SetWriteHandler(0x8000,0xFFFF,M183Write); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SyncPrg();
SyncPrg(); SyncChr();
SyncChr();
} }
void Mapper183_Init(CartInfo *info) void Mapper183_Init(CartInfo *info) {
{ info->Power = M183Power;
info->Power=M183Power; GameHBIRQHook = M183IRQCounter;
GameHBIRQHook=M183IRQCounter; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

116
src/boards/185.cpp
View File

@ -21,15 +21,15 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 *DummyCHR=NULL; static uint8 *DummyCHR = NULL;
static uint8 datareg; static uint8 datareg;
static void(*Sync)(void); static void (*Sync)(void);
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&datareg, 1, "DREG"}, { &datareg, 1, "DREG" },
{0} { 0 }
}; };
// on off // on off
@ -41,75 +41,67 @@ static SFORMAT StateRegs[]=
//6 0x21, 0x13 - Spy vs Spy //6 0x21, 0x13 - Spy vs Spy
//7 0x20, 0x21 - Seicross //7 0x20, 0x21 - Seicross
static void Sync185(void) static void Sync185(void) {
{ // little dirty eh? ;_)
// little dirty eh? ;_) if ((datareg & 3) && (datareg != 0x13)) // 1, 2, 3, 4, 5, 6
if((datareg&3)&&(datareg!=0x13)) // 1, 2, 3, 4, 5, 6 setchr8(0);
setchr8(0); else
else setchr8r(0x10, 0);
setchr8r(0x10,0);
} }
static void Sync181(void) static void Sync181(void) {
{ if (!(datareg & 1)) // 7
if(!(datareg&1)) // 7 setchr8(0);
setchr8(0); else
else setchr8r(0x10, 0);
setchr8r(0x10,0);
} }
static DECLFW(MWrite) static DECLFW(MWrite) {
{ datareg = V;
datareg=V; Sync();
Sync();
} }
static void MPower(void) static void MPower(void) {
{ datareg = 0;
datareg=0; Sync();
Sync(); setprg16(0x8000, 0);
setprg16(0x8000,0); setprg16(0xC000, ~0);
setprg16(0xC000,~0); SetWriteHandler(0x8000, 0xFFFF, MWrite);
SetWriteHandler(0x8000,0xFFFF,MWrite); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
} }
static void MClose(void) static void MClose(void) {
{ if (DummyCHR)
if(DummyCHR) FCEU_gfree(DummyCHR);
FCEU_gfree(DummyCHR); DummyCHR = NULL;
DummyCHR=NULL;
} }
static void MRestore(int version) static void MRestore(int version) {
{ Sync();
Sync();
} }
void Mapper185_Init(CartInfo *info) void Mapper185_Init(CartInfo *info) {
{ Sync = Sync185;
int x; info->Power = MPower;
Sync=Sync185; info->Close = MClose;
info->Power=MPower; GameStateRestore = MRestore;
info->Close=MClose; DummyCHR = (uint8*)FCEU_gmalloc(8192);
GameStateRestore=MRestore; int x;
DummyCHR=(uint8*)FCEU_gmalloc(8192); for (x = 0; x < 8192; x++)
for(x=0;x<8192;x++) DummyCHR[x] = 0xff;
DummyCHR[x]=0xff; SetupCartCHRMapping(0x10, DummyCHR, 8192, 0);
SetupCartCHRMapping(0x10,DummyCHR,8192,0); AddExState(StateRegs, ~0, 0, 0);
AddExState(StateRegs, ~0, 0, 0);
} }
void Mapper181_Init(CartInfo *info) void Mapper181_Init(CartInfo *info) {
{ Sync = Sync181;
int x; info->Power = MPower;
Sync=Sync181; info->Close = MClose;
info->Power=MPower; GameStateRestore = MRestore;
info->Close=MClose; DummyCHR = (uint8*)FCEU_gmalloc(8192);
GameStateRestore=MRestore; int x;
DummyCHR=(uint8*)FCEU_gmalloc(8192); for (x = 0; x < 8192; x++)
for(x=0;x<8192;x++) DummyCHR[x] = 0xff;
DummyCHR[x]=0xff; SetupCartCHRMapping(0x10, DummyCHR, 8192, 0);
SetupCartCHRMapping(0x10,DummyCHR,8192,0); AddExState(StateRegs, ~0, 0, 0);
AddExState(StateRegs, ~0, 0, 0);
} }

106
src/boards/186.cpp
View File

@ -23,82 +23,72 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 SWRAM[2816]; static uint8 SWRAM[2816];
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint8 regs[4]; static uint8 regs[4];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{regs, 4, "DREG"}, { regs, 4, "DREG" },
{SWRAM, 2816, "SWRM"}, { SWRAM, 2816, "SWRM" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8r(0x10, 0x6000, regs[0] >> 6);
setprg8r(0x10,0x6000,regs[0]>>6); setprg16(0x8000, regs[1]);
setprg16(0x8000,regs[1]); setprg16(0xc000, 0);
setprg16(0xc000,0);
} }
static DECLFW(M186Write) static DECLFW(M186Write) {
{ if (A & 0x4203) regs[A & 3] = V;
if(A&0x4203) regs[A&3]=V; Sync();
Sync();
} }
static DECLFR(M186Read) static DECLFR(M186Read) {
{ switch (A) {
switch(A) case 0x4200: return 0x00; break;
{ case 0x4201: return 0x00; break;
case 0x4200: return 0x00; break; case 0x4202: return 0x40; break;
case 0x4201: return 0x00; break; case 0x4203: return 0x00; break;
case 0x4202: return 0x40; break; }
case 0x4203: return 0x00; break; return 0xFF;
}
return 0xFF;
} }
static DECLFR(ASWRAM) static DECLFR(ASWRAM) {
{ return(SWRAM[A - 0x4400]);
return(SWRAM[A-0x4400]);
} }
static DECLFW(BSWRAM) static DECLFW(BSWRAM) {
{ SWRAM[A - 0x4400] = V;
SWRAM[A-0x4400]=V;
} }
static void M186Power(void) static void M186Power(void) {
{ setchr8(0);
setchr8(0); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x6000, 0xFFFF, CartBW);
SetWriteHandler(0x6000,0xFFFF,CartBW); SetReadHandler(0x4200, 0x43FF, M186Read);
SetReadHandler(0x4200,0x43FF,M186Read); SetWriteHandler(0x4200, 0x43FF, M186Write);
SetWriteHandler(0x4200,0x43FF,M186Write); SetReadHandler(0x4400, 0x4EFF, ASWRAM);
SetReadHandler(0x4400,0x4EFF,ASWRAM); SetWriteHandler(0x4400, 0x4EFF, BSWRAM);
SetWriteHandler(0x4400,0x4EFF,BSWRAM); regs[0] = regs[1] = regs[2] = regs[3];
regs[0]=regs[1]=regs[2]=regs[3]; Sync();
Sync();
} }
static void M186Close(void) static void M186Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void M186Restore(int version) static void M186Restore(int version) {
{ Sync();
Sync();
} }
void Mapper186_Init(CartInfo *info) void Mapper186_Init(CartInfo *info) {
{ info->Power = M186Power;
info->Power=M186Power; info->Close = M186Close;
info->Close=M186Close; GameStateRestore = M186Restore;
GameStateRestore=M186Restore; WRAM = (uint8*)FCEU_gmalloc(32768);
WRAM=(uint8*)FCEU_gmalloc(32768); SetupCartPRGMapping(0x10, WRAM, 32768, 1);
SetupCartPRGMapping(0x10,WRAM,32768,1); AddExState(WRAM, 32768, 0, "WRAM");
AddExState(WRAM, 32768, 0, "WRAM"); AddExState(StateRegs, ~0, 0, 0);
AddExState(StateRegs, ~0, 0, 0);
} }

104
src/boards/187.cpp
View File

@ -21,78 +21,64 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static void M187CW(uint32 A, uint8 V) static void M187CW(uint32 A, uint8 V) {
{ if ((A & 0x1000) == ((MMC3_cmd & 0x80) << 5))
if((A&0x1000)==((MMC3_cmd&0x80)<<5)) setchr1(A, V | 0x100);
setchr1(A,V|0x100); else
else setchr1(A, V);
setchr1(A,V);
} }
static void M187PW(uint32 A, uint8 V) static void M187PW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & 0x80) {
if(EXPREGS[0]&0x80) uint8 bank = EXPREGS[0] & 0x1F;
{ if (EXPREGS[0] & 0x20) {
uint8 bank=EXPREGS[0]&0x1F; if (EXPREGS[0] & 0x40)
if(EXPREGS[0]&0x20) setprg32(0x8000, bank >> 2);
{ else
if(EXPREGS[0]&0x40) setprg32(0x8000, bank >> 1); // hacky hacky! two mappers in one! need real hw carts to test
setprg32(0x8000,bank>>2); } else {
else setprg16(0x8000, bank);
setprg32(0x8000,bank>>1); // hacky hacky! two mappers in one! need real hw carts to test setprg16(0xC000, bank);
} }
else } else
{ setprg8(A, V & 0x3F);
setprg16(0x8000,bank);
setprg16(0xC000,bank);
}
}
else
setprg8(A,V&0x3F);
} }
static DECLFW(M187Write8000) static DECLFW(M187Write8000) {
{ EXPREGS[1] = 1;
EXPREGS[1]=1; MMC3_CMDWrite(A, V);
MMC3_CMDWrite(A,V);
} }
static DECLFW(M187Write8001) static DECLFW(M187Write8001) {
{ if (EXPREGS[1])
if(EXPREGS[1]) MMC3_CMDWrite(A, V);
MMC3_CMDWrite(A,V);
} }
static DECLFW(M187WriteLo) static DECLFW(M187WriteLo) {
{ if ((A == 0x5000) || (A == 0x6000)) {
if((A==0x5000)||(A==0x6000)) EXPREGS[0] = V;
{ FixMMC3PRG(MMC3_cmd);
EXPREGS[0]=V; }
FixMMC3PRG(MMC3_cmd);
}
} }
static uint8 prot_data[4] = { 0x83, 0x83, 0x42, 0x00 }; static uint8 prot_data[4] = { 0x83, 0x83, 0x42, 0x00 };
static DECLFR(M187Read) static DECLFR(M187Read) {
{ return prot_data[EXPREGS[1] & 3];
return prot_data[EXPREGS[1]&3];
} }
static void M187Power(void) static void M187Power(void) {
{ EXPREGS[0] = EXPREGS[1] = 0;
EXPREGS[0]=EXPREGS[1]=0; GenMMC3Power();
GenMMC3Power(); SetReadHandler(0x5000, 0x5FFF, M187Read);
SetReadHandler(0x5000,0x5FFF,M187Read); SetWriteHandler(0x5000, 0x6FFF, M187WriteLo);
SetWriteHandler(0x5000,0x6FFF,M187WriteLo); SetWriteHandler(0x8000, 0x8000, M187Write8000);
SetWriteHandler(0x8000,0x8000,M187Write8000); SetWriteHandler(0x8001, 0x8001, M187Write8001);
SetWriteHandler(0x8001,0x8001,M187Write8001);
} }
void Mapper187_Init(CartInfo *info) void Mapper187_Init(CartInfo *info) {
{ GenMMC3_Init(info, 256, 256, 0, 0);
GenMMC3_Init(info, 256, 256, 0, 0); pwrap = M187PW;
pwrap=M187PW; cwrap = M187CW;
cwrap=M187CW; info->Power = M187Power;
info->Power=M187Power; AddExState(EXPREGS, 3, 0, "EXPR");
AddExState(EXPREGS, 3, 0, "EXPR");
} }

32
src/boards/189.cpp
View File

@ -21,28 +21,24 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static void M189PW(uint32 A, uint8 V) static void M189PW(uint32 A, uint8 V) {
{ setprg32(0x8000, EXPREGS[0] & 7);
setprg32(0x8000,EXPREGS[0]&7);
} }
static DECLFW(M189Write) static DECLFW(M189Write) {
{ EXPREGS[0] = V | (V >> 4); //actually, there is a two versions of 189 mapper with hi or lo bits bankswitching.
EXPREGS[0]=V|(V>>4); //actually, there is a two versions of 189 mapper with hi or lo bits bankswitching. FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd);
} }
static void M189Power(void) static void M189Power(void) {
{ EXPREGS[0] = EXPREGS[1] = 0;
EXPREGS[0]=EXPREGS[1]=0; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x4120, 0x7FFF, M189Write);
SetWriteHandler(0x4120,0x7FFF,M189Write);
} }
void Mapper189_Init(CartInfo *info) void Mapper189_Init(CartInfo *info) {
{ GenMMC3_Init(info, 256, 256, 0, 0);
GenMMC3_Init(info, 256, 256, 0, 0); pwrap = M189PW;
pwrap=M189PW; info->Power = M189Power;
info->Power=M189Power; AddExState(EXPREGS, 2, 0, "EXPR");
AddExState(EXPREGS, 2, 0, "EXPR");
} }

70
src/boards/193.cpp
View File

@ -23,55 +23,49 @@
static uint8 reg[8]; static uint8 reg[8];
static uint8 mirror, cmd, bank; static uint8 mirror, cmd, bank;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&cmd, 1, "CMD"}, { &cmd, 1, "CMD" },
{&mirror, 1, "MIRR"}, { &mirror, 1, "MIRR" },
{&bank, 1, "BANK"}, { &bank, 1, "BANK" },
{reg, 8, "REGS"}, { reg, 8, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setmirror(mirror ^ 1);
setmirror(mirror^1); setprg8(0x8000, reg[3]);
setprg8(0x8000,reg[3]); setprg8(0xA000, 0xD);
setprg8(0xA000,0xD); setprg8(0xC000, 0xE);
setprg8(0xC000,0xE); setprg8(0xE000, 0xF);
setprg8(0xE000,0xF); setchr4(0x0000, reg[0] >> 2);
setchr4(0x0000,reg[0]>>2); setchr2(0x1000, reg[1] >> 1);
setchr2(0x1000,reg[1]>>1); setchr2(0x1800, reg[2] >> 1);
setchr2(0x1800,reg[2]>>1);
} }
static DECLFW(M193Write) static DECLFW(M193Write) {
{ reg[A & 3] = V;
reg[A&3]=V; Sync();
Sync();
} }
static void M193Power(void) static void M193Power(void) {
{ bank = 0;
bank=0; Sync();
Sync(); SetWriteHandler(0x6000, 0x6003, M193Write);
SetWriteHandler(0x6000,0x6003,M193Write); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, CartBW);
SetWriteHandler(0x8000,0xFFFF,CartBW);
} }
static void M193Reset(void) static void M193Reset(void) {
{
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper193_Init(CartInfo *info) void Mapper193_Init(CartInfo *info) {
{ info->Reset = M193Reset;
info->Reset=M193Reset; info->Power = M193Power;
info->Power=M193Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

114
src/boards/199.cpp
View File

@ -26,82 +26,72 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static uint8 *CHRRAM=NULL; static uint8 *CHRRAM = NULL;
static uint32 CHRRAMSIZE; static uint32 CHRRAMSIZE;
static void M199PW(uint32 A, uint8 V) static void M199PW(uint32 A, uint8 V) {
{ setprg8(A, V);
setprg8(A,V); setprg8(0xC000, EXPREGS[0]);
setprg8(0xC000,EXPREGS[0]); setprg8(0xE000, EXPREGS[1]);
setprg8(0xE000,EXPREGS[1]);
} }
static void M199CW(uint32 A, uint8 V) static void M199CW(uint32 A, uint8 V) {
{ setchr1r((V < 8) ? 0x10 : 0x00, A, V);
setchr1r((V<8)?0x10:0x00,A,V); setchr1r((DRegBuf[0] < 8) ? 0x10 : 0x00, 0x0000, DRegBuf[0]);
setchr1r((DRegBuf[0]<8)?0x10:0x00,0x0000,DRegBuf[0]); setchr1r((EXPREGS[2] < 8) ? 0x10 : 0x00, 0x0400, EXPREGS[2]);
setchr1r((EXPREGS[2]<8)?0x10:0x00,0x0400,EXPREGS[2]); setchr1r((DRegBuf[1] < 8) ? 0x10 : 0x00, 0x0800, DRegBuf[1]);
setchr1r((DRegBuf[1]<8)?0x10:0x00,0x0800,DRegBuf[1]); setchr1r((EXPREGS[3] < 8) ? 0x10 : 0x00, 0x0c00, EXPREGS[3]);
setchr1r((EXPREGS[3]<8)?0x10:0x00,0x0c00,EXPREGS[3]);
} }
static void M199MW(uint8 V) static void M199MW(uint8 V) {
{ // FCEU_printf("%02x\n",V);
// FCEU_printf("%02x\n",V); switch (V & 3) {
switch(V&3) case 0: setmirror(MI_V); break;
{ case 1: setmirror(MI_H); break;
case 0: setmirror(MI_V); break; case 2: setmirror(MI_0); break;
case 1: setmirror(MI_H); break; case 3: setmirror(MI_1); break;
case 2: setmirror(MI_0); break; }
case 3: setmirror(MI_1); break;
}
} }
static DECLFW(M199Write) static DECLFW(M199Write) {
{ if ((A == 0x8001) && (MMC3_cmd & 8)) {
if((A==0x8001)&&(MMC3_cmd&8)) EXPREGS[MMC3_cmd & 3] = V;
{ FixMMC3PRG(MMC3_cmd);
EXPREGS[MMC3_cmd&3]=V; FixMMC3CHR(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); } else
FixMMC3CHR(MMC3_cmd); if (A < 0xC000)
} MMC3_CMDWrite(A, V);
else else
if(A<0xC000) MMC3_IRQWrite(A, V);
MMC3_CMDWrite(A,V);
else
MMC3_IRQWrite(A,V);
} }
static void M199Power(void) static void M199Power(void) {
{ EXPREGS[0] = ~1;
EXPREGS[0]=~1; EXPREGS[1] = ~0;
EXPREGS[1]=~0; EXPREGS[2] = 1;
EXPREGS[2]=1; EXPREGS[3] = 3;
EXPREGS[3]=3; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x8000, 0xFFFF, M199Write);
SetWriteHandler(0x8000,0xFFFF,M199Write);
} }
static void M199Close(void) static void M199Close(void) {
{ if (CHRRAM)
if(CHRRAM) FCEU_gfree(CHRRAM);
FCEU_gfree(CHRRAM); CHRRAM = NULL;
CHRRAM=NULL;
} }
void Mapper199_Init(CartInfo *info) void Mapper199_Init(CartInfo *info) {
{ GenMMC3_Init(info, 512, 256, 8, info->battery);
GenMMC3_Init(info, 512, 256, 8, info->battery); cwrap = M199CW;
cwrap=M199CW; pwrap = M199PW;
pwrap=M199PW; mwrap = M199MW;
mwrap=M199MW; info->Power = M199Power;
info->Power=M199Power; info->Close = M199Close;
info->Close=M199Close;
CHRRAMSIZE=8192; CHRRAMSIZE = 8192;
CHRRAM=(uint8*)FCEU_gmalloc(CHRRAMSIZE); CHRRAM = (uint8*)FCEU_gmalloc(CHRRAMSIZE);
SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1); SetupCartCHRMapping(0x10, CHRRAM, CHRRAMSIZE, 1);
AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR"); AddExState(CHRRAM, CHRRAMSIZE, 0, "CHRR");
AddExState(EXPREGS, 4, 0, "EXPR"); AddExState(EXPREGS, 4, 0, "EXPR");
} }

88
src/boards/208.cpp
View File

@ -21,63 +21,57 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static uint8 lut[256]={ static uint8 lut[256] = {
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x49, 0x19, 0x09, 0x59, 0x49, 0x19, 0x09,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x51, 0x41, 0x11, 0x01, 0x51, 0x41, 0x11, 0x01,
0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x40, 0x50, 0x00, 0x10, 0x40, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x18, 0x48, 0x58, 0x08, 0x18, 0x48, 0x58, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x58, 0x48, 0x18, 0x08, 0x58, 0x48, 0x18, 0x08,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x50, 0x40, 0x10, 0x00, 0x50, 0x40, 0x10, 0x00,
0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x11, 0x41, 0x51, 0x01, 0x11, 0x41, 0x51, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x19, 0x49, 0x59, 0x09, 0x19, 0x49, 0x59, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
}; };
static void M208PW(uint32 A, uint8 V) static void M208PW(uint32 A, uint8 V) {
{ setprg32(0x8000, EXPREGS[5]);
setprg32(0x8000,EXPREGS[5]);
} }
static DECLFW(M208Write) static DECLFW(M208Write) {
{ EXPREGS[5] = (V & 0x1) | ((V >> 3) & 0x2);
EXPREGS[5]=(V&0x1)|((V>>3)&0x2); FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd);
} }
static DECLFW(M208ProtWrite) static DECLFW(M208ProtWrite) {
{ if (A <= 0x57FF)
if(A<=0x57FF) EXPREGS[4] = V;
EXPREGS[4]=V; else
else EXPREGS[(A & 0x03)] = V ^ lut[EXPREGS[4]];
EXPREGS[(A&0x03)]=V^lut[EXPREGS[4]];
} }
static DECLFR(M208ProtRead) static DECLFR(M208ProtRead) {
{ return(EXPREGS[(A & 0x3)]);
return(EXPREGS[(A&0x3)]);
} }
static void M208Power(void) static void M208Power(void) {
{ EXPREGS[5] = 3;
EXPREGS[5]=3; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x4800, 0x4FFF, M208Write);
SetWriteHandler(0x4800,0x4FFF,M208Write); SetWriteHandler(0x5000, 0x5fff, M208ProtWrite);
SetWriteHandler(0x5000,0x5fff,M208ProtWrite); SetReadHandler(0x5800, 0x5FFF, M208ProtRead);
SetReadHandler(0x5800,0x5FFF,M208ProtRead); SetReadHandler(0x8000, 0xffff, CartBR);
SetReadHandler(0x8000,0xffff,CartBR);
} }
void Mapper208_Init(CartInfo *info) void Mapper208_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 256, 0, 0);
GenMMC3_Init(info, 128, 256, 0, 0); pwrap = M208PW;
pwrap=M208PW; info->Power = M208Power;
info->Power=M208Power; AddExState(EXPREGS, 6, 0, "EXPR");
AddExState(EXPREGS, 6, 0, "EXPR");
} }

119
src/boards/222.cpp
View File

@ -16,7 +16,9 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* (VRC4 mapper) * (VRC4 mapper)
*
*/ */
#include "mapinc.h" #include "mapinc.h"
@ -27,80 +29,71 @@ static uint8 prg_reg[2];
static uint8 chr_reg[8]; static uint8 chr_reg[8];
static uint8 mirr; static uint8 mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{prg_reg, 2, "PRG"}, { prg_reg, 2, "PRG" },
{chr_reg, 8, "CHR"}, { chr_reg, 8, "CHR" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void M222IRQ(void) static void M222IRQ(void) {
{ if (IRQa) {
if(IRQa) IRQCount++;
{ if (IRQCount >= 238) {
IRQCount++; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount>=238) // IRQa=0;
{ }
X6502_IRQBegin(FCEU_IQEXT); }
// IRQa=0;
}
}
} }
static void Sync(void) static void Sync(void) {
{ setprg8(0x8000, prg_reg[0]);
int i; setprg8(0xA000, prg_reg[1]);
setprg8(0x8000,prg_reg[0]); int i;
setprg8(0xA000,prg_reg[1]); for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chr_reg[i]);
setchr1(i<<10,chr_reg[i]); setmirror(mirr ^ 1);
setmirror(mirr^1);
} }
static DECLFW(M222Write) static DECLFW(M222Write) {
{ switch (A & 0xF003) {
switch(A&0xF003) case 0x8000: prg_reg[0] = V; break;
{ case 0x9000: mirr = V & 1; break;
case 0x8000: prg_reg[0]=V; break; case 0xA000: prg_reg[1] = V; break;
case 0x9000: mirr=V&1; break; case 0xB000: chr_reg[0] = V; break;
case 0xA000: prg_reg[1]=V; break; case 0xB002: chr_reg[1] = V; break;
case 0xB000: chr_reg[0]=V; break; case 0xC000: chr_reg[2] = V; break;
case 0xB002: chr_reg[1]=V; break; case 0xC002: chr_reg[3] = V; break;
case 0xC000: chr_reg[2]=V; break; case 0xD000: chr_reg[4] = V; break;
case 0xC002: chr_reg[3]=V; break; case 0xD002: chr_reg[5] = V; break;
case 0xD000: chr_reg[4]=V; break; case 0xE000: chr_reg[6] = V; break;
case 0xD002: chr_reg[5]=V; break; case 0xE002: chr_reg[7] = V; break;
case 0xE000: chr_reg[6]=V; break; // case 0xF000: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQa=V; if(!V)IRQPre=0; X6502_IRQEnd(FCEU_IQEXT); break;
case 0xE002: chr_reg[7]=V; break; // case 0xF001: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQCount=V; break;
// case 0xF000: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQa=V; if(!V)IRQPre=0; X6502_IRQEnd(FCEU_IQEXT); break; // case 0xF002: FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xF001: FCEU_printf("%04x:%02x %d\n",A,V,scanline); IRQCount=V; break; // case 0xD001: IRQa=V; X6502_IRQEnd(FCEU_IQEXT); FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xF002: FCEU_printf("%04x:%02x %d\n",A,V,scanline); break; // case 0xC001: IRQPre=16; FCEU_printf("%04x:%02x %d\n",A,V,scanline); break;
// case 0xD001: IRQa=V; X6502_IRQEnd(FCEU_IQEXT); FCEU_printf("%04x:%02x %d\n",A,V,scanline); break; case 0xF000: IRQa = IRQCount = V; if (scanline < 240) IRQCount -= 8; else IRQCount += 4; X6502_IRQEnd(FCEU_IQEXT); break;
// case 0xC001: IRQPre=16; FCEU_printf("%04x:%02x %d\n",A,V,scanline); break; }
case 0xF000: IRQa=IRQCount=V; if(scanline<240) IRQCount-=8; else IRQCount+=4; X6502_IRQEnd(FCEU_IQEXT); break; Sync();
}
Sync();
} }
static void M222Power(void) static void M222Power(void) {
{ setprg16(0xC000, ~0);
setprg16(0xC000,~0); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M222Write);
SetWriteHandler(0x8000,0xFFFF,M222Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper222_Init(CartInfo *info) void Mapper222_Init(CartInfo *info) {
{ info->Power = M222Power;
info->Power=M222Power; GameHBIRQHook = M222IRQ;
GameHBIRQHook=M222IRQ; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

98
src/boards/225.cpp
View File

@ -22,75 +22,65 @@
static uint8 prot[4], prg, mode, chr, mirr; static uint8 prot[4], prg, mode, chr, mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{prot, 4, "PROT"}, { prot, 4, "PROT" },
{&prg, 1, "PRG"}, { &prg, 1, "PRG" },
{&chr, 1, "CHR"}, { &chr, 1, "CHR" },
{&mode, 1, "MODE"}, { &mode, 1, "MODE" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ if (mode) {
if(mode) setprg16(0x8000, prg);
{ setprg16(0xC000, prg);
setprg16(0x8000,prg); } else
setprg16(0xC000,prg); setprg32(0x8000, prg >> 1);
} setchr8(chr);
else setmirror(mirr);
setprg32(0x8000,prg>>1);
setchr8(chr);
setmirror(mirr);
} }
static DECLFW(M225Write) static DECLFW(M225Write) {
{ uint32 bank = (A >> 14) & 1;
uint32 bank = (A >> 14) & 1; mirr = (A >> 13) & 1;
mirr = (A >> 13) & 1; mode = (A >> 12) & 1;
mode = (A >> 12) & 1; chr = (A & 0x3f) | (bank << 6);
chr = (A & 0x3f) | (bank << 6); prg = ((A >> 6) & 0x3f) | (bank << 6);
prg = ((A >> 6) & 0x3f) | (bank << 6); Sync();
Sync();
} }
static DECLFW(M225LoWrite) static DECLFW(M225LoWrite) {
{
} }
static DECLFR(M225LoRead) static DECLFR(M225LoRead) {
{ return 0;
return 0;
} }
static void M225Power(void) static void M225Power(void) {
{ prg = 0;
prg = 0; mode = 0;
mode = 0; Sync();
Sync(); SetReadHandler(0x5000, 0x5FFF, M225LoRead);
SetReadHandler(0x5000,0x5fff,M225LoRead); SetWriteHandler(0x5000, 0x5FFF, M225LoWrite);
SetWriteHandler(0x5000,0x5fff,M225LoWrite); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M225Write);
SetWriteHandler(0x8000,0xFFFF,M225Write);
} }
static void M225Reset(void) static void M225Reset(void) {
{ prg = 0;
prg = 0; mode = 0;
mode = 0; Sync();
Sync();
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper225_Init(CartInfo *info) void Mapper225_Init(CartInfo *info) {
{ info->Reset = M225Reset;
info->Reset=M225Reset; info->Power = M225Power;
info->Power=M225Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

63
src/boards/235.cpp
View File

@ -21,50 +21,43 @@
#include "mapinc.h" #include "mapinc.h"
static uint16 cmdreg; static uint16 cmdreg;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&cmdreg, 2, "CREG"}, { &cmdreg, 2, "CREG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ if (cmdreg & 0x400)
if(cmdreg&0x400) setmirror(MI_0);
setmirror(MI_0); else
else setmirror(((cmdreg >> 13) & 1) ^ 1);
setmirror(((cmdreg>>13)&1)^1); if (cmdreg & 0x800) {
if(cmdreg&0x800) setprg16(0x8000, ((cmdreg & 0x300) >> 3) | ((cmdreg & 0x1F) << 1) | ((cmdreg >> 12) & 1));
{ setprg16(0xC000, ((cmdreg & 0x300) >> 3) | ((cmdreg & 0x1F) << 1) | ((cmdreg >> 12) & 1));
setprg16(0x8000,((cmdreg&0x300)>>3)|((cmdreg&0x1F)<<1)|((cmdreg>>12)&1)); } else
setprg16(0xC000,((cmdreg&0x300)>>3)|((cmdreg&0x1F)<<1)|((cmdreg>>12)&1)); setprg32(0x8000, ((cmdreg & 0x300) >> 4) | (cmdreg & 0x1F));
}
else
setprg32(0x8000,((cmdreg&0x300)>>4)|(cmdreg&0x1F));
} }
static DECLFW(M235Write) static DECLFW(M235Write) {
{ cmdreg = A;
cmdreg=A; Sync();
Sync();
} }
static void M235Power(void) static void M235Power(void) {
{ setchr8(0);
setchr8(0); SetWriteHandler(0x8000, 0xFFFF, M235Write);
SetWriteHandler(0x8000,0xFFFF,M235Write); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); cmdreg = 0;
cmdreg=0; Sync();
Sync();
} }
static void M235Restore(int version) static void M235Restore(int version) {
{ Sync();
Sync();
} }
void Mapper235_Init(CartInfo *info) void Mapper235_Init(CartInfo *info) {
{ info->Power = M235Power;
info->Power=M235Power; GameStateRestore = M235Restore;
GameStateRestore=M235Restore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

105
src/boards/3d-block.cpp
View File

@ -25,86 +25,71 @@ static int16 IRQCount, IRQPause;
static int16 Count = 0x0000; static int16 Count = 0x0000;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 4, "REGS"}, { reg, 4, "REGS" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 2, "IRQC"}, { &IRQCount, 2, "IRQC" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg32(0x8000, 0);
setprg32(0x8000,0); setchr8(0);
setchr8(0);
} }
//#define Count 0x1800 //#define Count 0x1800
#define Pause 0x010 #define Pause 0x010
static DECLFW(UNL3DBlockWrite) static DECLFW(UNL3DBlockWrite) {
{ switch (A) {
switch(A)
{
//4800 32 //4800 32
//4900 37 //4900 37
//4a00 01 //4a00 01
//4e00 18 //4e00 18
case 0x4800: reg[0]=V; break; case 0x4800: reg[0] = V; break;
case 0x4900: reg[1]=V; break; case 0x4900: reg[1] = V; break;
case 0x4a00: reg[2]=V; break; case 0x4a00: reg[2] = V; break;
case 0x4e00: reg[3]=V; IRQCount=Count; IRQPause=Pause; IRQa=1; X6502_IRQEnd(FCEU_IQEXT); break; case 0x4e00: reg[3] = V; IRQCount = Count; IRQPause = Pause; IRQa = 1; X6502_IRQEnd(FCEU_IQEXT); break;
} }
} }
static void UNL3DBlockPower(void) static void UNL3DBlockPower(void) {
{ Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4800, 0x4E00, UNL3DBlockWrite);
SetWriteHandler(0x4800,0x4E00,UNL3DBlockWrite);
} }
static void UNL3DBlockReset(void) static void UNL3DBlockReset(void) {
{ Count += 0x10;
Count+=0x10; FCEU_printf("Count=%04x\n", Count);
FCEU_printf("Count=%04x\n",Count);
} }
static void UNL3DBlockIRQHook(int a) static void UNL3DBlockIRQHook(int a) {
{ if (IRQa) {
if(IRQa) if (IRQCount > 0) {
{ IRQCount -= a;
if(IRQCount>0) } else {
{ if (IRQPause > 0) {
IRQCount-=a; IRQPause -= a;
} X6502_IRQBegin(FCEU_IQEXT);
else } else {
{ IRQCount = Count;
if(IRQPause>0) IRQPause = Pause;
{ X6502_IRQEnd(FCEU_IQEXT);
IRQPause-=a; }
X6502_IRQBegin(FCEU_IQEXT); }
} }
else
{
IRQCount=Count;
IRQPause=Pause;
X6502_IRQEnd(FCEU_IQEXT);
}
}
}
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNL3DBlock_Init(CartInfo *info) void UNL3DBlock_Init(CartInfo *info) {
{ info->Power = UNL3DBlockPower;
info->Power=UNL3DBlockPower; info->Reset = UNL3DBlockReset;
info->Reset=UNL3DBlockReset; MapIRQHook = UNL3DBlockIRQHook;
MapIRQHook=UNL3DBlockIRQHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

58
src/boards/411120-c.cpp
View File

@ -25,46 +25,40 @@
static uint8 reset_flag = 0; static uint8 reset_flag = 0;
static void BMC411120CCW(uint32 A, uint8 V) static void BMC411120CCW(uint32 A, uint8 V) {
{ setchr1(A, V | ((EXPREGS[0] & 3) << 7));
setchr1(A,V|((EXPREGS[0]&3)<<7));
} }
static void BMC411120CPW(uint32 A, uint8 V) static void BMC411120CPW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & (8 | reset_flag))
if(EXPREGS[0]&(8|reset_flag)) setprg32(0x8000, ((EXPREGS[0] >> 4) & 3) | (0x0C));
setprg32(0x8000,((EXPREGS[0]>>4)&3)|(0x0C)); else
else setprg8(A, (V & 0x0F) | ((EXPREGS[0] & 3) << 4));
setprg8(A,(V&0x0F)|((EXPREGS[0]&3)<<4));
} }
static DECLFW(BMC411120CLoWrite) static DECLFW(BMC411120CLoWrite) {
{ EXPREGS[0] = A;
EXPREGS[0] = A; FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} }
static void BMC411120CReset(void) static void BMC411120CReset(void) {
{ EXPREGS[0] = 0;
EXPREGS[0]=0; reset_flag ^= 4;
reset_flag ^=4; MMC3RegReset();
MMC3RegReset();
} }
static void BMC411120CPower(void) static void BMC411120CPower(void) {
{ EXPREGS[0] = 0;
EXPREGS[0] = 0; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x6000, 0x7FFF, BMC411120CLoWrite);
SetWriteHandler(0x6000,0x7FFF,BMC411120CLoWrite);
} }
void BMC411120C_Init(CartInfo *info) void BMC411120C_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 128, 8, 0);
GenMMC3_Init(info, 128, 128, 8, 0); pwrap = BMC411120CPW;
pwrap=BMC411120CPW; cwrap = BMC411120CCW;
cwrap=BMC411120CCW; info->Power = BMC411120CPower;
info->Power=BMC411120CPower; info->Reset = BMC411120CReset;
info->Reset=BMC411120CReset; AddExState(EXPREGS, 1, 0, "EXPR");
AddExState(EXPREGS, 1, 0, "EXPR");
} }

90
src/boards/57.cpp
View File

@ -25,68 +25,60 @@ static uint8 prg_reg;
static uint8 chr_reg; static uint8 chr_reg;
static uint8 hrd_flag; static uint8 hrd_flag;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&hrd_flag, 1, "DPSW"}, { &hrd_flag, 1, "DPSW" },
{&prg_reg, 1, "PRG"}, { &prg_reg, 1, "PRG" },
{&chr_reg, 1, "CHR"}, { &chr_reg, 1, "CHR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ if (prg_reg & 0x80)
if(prg_reg&0x80) setprg32(0x8000, prg_reg >> 6);
setprg32(0x8000,prg_reg>>6); else{
else setprg16(0x8000, (prg_reg >> 5) & 3);
{ setprg16(0xC000, (prg_reg >> 5) & 3);
setprg16(0x8000,(prg_reg>>5)&3); }
setprg16(0xC000,(prg_reg>>5)&3); setmirror((prg_reg & 8) >> 3);
} setchr8((chr_reg & 3) | (prg_reg & 7) | ((prg_reg & 0x10) >> 1));
setmirror((prg_reg&8)>>3);
setchr8((chr_reg&3)|(prg_reg&7)|((prg_reg&0x10)>>1));
} }
static DECLFR(M57Read) static DECLFR(M57Read) {
{ return hrd_flag;
return hrd_flag;
} }
static DECLFW(M57Write) static DECLFW(M57Write) {
{ if ((A & 0x8800) == 0x8800)
if((A&0x8800)==0x8800) prg_reg = V;
prg_reg=V; else
else chr_reg = V;
chr_reg=V; Sync();
Sync();
} }
static void M57Power(void) static void M57Power(void) {
{ prg_reg = 0;
prg_reg=0; chr_reg = 0;
chr_reg=0; hrd_flag = 0;
hrd_flag=0; SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M57Write);
SetWriteHandler(0x8000,0xFFFF,M57Write); SetReadHandler(0x6000, 0x6000, M57Read);
SetReadHandler(0x6000,0x6000,M57Read); Sync();
Sync();
} }
static void M57Reset() static void M57Reset() {
{ hrd_flag++;
hrd_flag++; hrd_flag &= 3;
hrd_flag&=3; FCEU_printf("Select Register = %02x\n", hrd_flag);
FCEU_printf("Select Register = %02x\n",hrd_flag);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper57_Init(CartInfo *info) void Mapper57_Init(CartInfo *info) {
{ info->Power = M57Power;
info->Power=M57Power; info->Reset = M57Reset;
info->Reset=M57Reset; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

28
src/boards/603-5052.cpp
View File

@ -23,26 +23,22 @@
static uint8 lut[4] = { 0x00, 0x02, 0x02, 0x03 }; static uint8 lut[4] = { 0x00, 0x02, 0x02, 0x03 };
static DECLFW(UNL6035052ProtWrite) static DECLFW(UNL6035052ProtWrite) {
{ EXPREGS[0] = lut[V & 3];
EXPREGS[0]=lut[V&3];
} }
static DECLFR(UNL6035052ProtRead) static DECLFR(UNL6035052ProtRead) {
{ return EXPREGS[0];
return EXPREGS[0];
} }
static void UNL6035052Power(void) static void UNL6035052Power(void) {
{ GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x4020, 0x7FFF, UNL6035052ProtWrite);
SetWriteHandler(0x4020,0x7FFF,UNL6035052ProtWrite); SetReadHandler(0x4020, 0x7FFF, UNL6035052ProtRead);
SetReadHandler(0x4020,0x7FFF,UNL6035052ProtRead);
} }
void UNL6035052_Init(CartInfo *info) void UNL6035052_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 256, 0, 0);
GenMMC3_Init(info, 128, 256, 0, 0); info->Power = UNL6035052Power;
info->Power=UNL6035052Power; AddExState(EXPREGS, 6, 0, "EXPR");
AddExState(EXPREGS, 6, 0, "EXPR");
} }

2
src/boards/65.cpp
View File

@ -86,7 +86,7 @@ void M65IRQ(int a) {
if (IRQCount < -4) { if (IRQCount < -4) {
X6502_IRQBegin(FCEU_IQEXT); X6502_IRQBegin(FCEU_IQEXT);
IRQa = 0; IRQa = 0;
IRQCount = 0xFFFF; IRQCount = -1;
} }
} }
} }

2
src/boards/67.cpp
View File

@ -87,7 +87,7 @@ void M67IRQ(int a) {
if (IRQCount <= 0) { if (IRQCount <= 0) {
X6502_IRQBegin(FCEU_IQEXT); X6502_IRQBegin(FCEU_IQEXT);
IRQa = 0; IRQa = 0;
IRQCount = 0xFFFF; IRQCount = -1;
} }
} }
} }

231
src/boards/68.cpp
View File

@ -23,156 +23,141 @@
static uint8 chr_reg[4]; static uint8 chr_reg[4];
static uint8 kogame, prg_reg, nt1, nt2, mirr; static uint8 kogame, prg_reg, nt1, nt2, mirr;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE, count; static uint32 WRAMSIZE, count;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&nt1, 1, "NT1"}, { &nt1, 1, "NT1" },
{&nt2, 1, "NT2"}, { &nt2, 1, "NT2" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{&prg_reg, 1, "PRG"}, { &prg_reg, 1, "PRG" },
{&kogame, 1, "KGME"}, { &kogame, 1, "KGME" },
{&count, 4, "CNT"}, { &count, 4, "CNT" },
{chr_reg, 4, "CHR"}, { chr_reg, 4, "CHR" },
{0} { 0 }
}; };
static void M68NTfix(void) static void M68NTfix(void) {
{ if ((!UNIFchrrama) && (mirr & 0x10)) {
if((!UNIFchrrama)&&(mirr&0x10)) PPUNTARAM = 0;
{ switch (mirr & 3) {
PPUNTARAM = 0; case 0:
switch(mirr&3) vnapage[0] = vnapage[2] = CHRptr[0] + (((nt1 | 128) & CHRmask1[0]) << 10);
{ vnapage[1] = vnapage[3] = CHRptr[0] + (((nt2 | 128) & CHRmask1[0]) << 10);
case 0: vnapage[0]=vnapage[2]=CHRptr[0]+(((nt1|128)&CHRmask1[0])<<10); break;
vnapage[1]=vnapage[3]=CHRptr[0]+(((nt2|128)&CHRmask1[0])<<10); case 1:
break; vnapage[0] = vnapage[1] = CHRptr[0] + (((nt1 | 128) & CHRmask1[0]) << 10);
case 1: vnapage[0]=vnapage[1]=CHRptr[0]+(((nt1|128)&CHRmask1[0])<<10); vnapage[2] = vnapage[3] = CHRptr[0] + (((nt2 | 128) & CHRmask1[0]) << 10);
vnapage[2]=vnapage[3]=CHRptr[0]+(((nt2|128)&CHRmask1[0])<<10); break;
break; case 2:
case 2: vnapage[0]=vnapage[1]=vnapage[2]=vnapage[3]=CHRptr[0]+(((nt1|128)&CHRmask1[0])<<10); vnapage[0] = vnapage[1] = vnapage[2] = vnapage[3] = CHRptr[0] + (((nt1 | 128) & CHRmask1[0]) << 10);
break; break;
case 3: vnapage[0]=vnapage[1]=vnapage[2]=vnapage[3]=CHRptr[0]+(((nt2|128)&CHRmask1[0])<<10); case 3:
break; vnapage[0] = vnapage[1] = vnapage[2] = vnapage[3] = CHRptr[0] + (((nt2 | 128) & CHRmask1[0]) << 10);
} break;
} }
else } else
switch(mirr&3) switch (mirr & 3) {
{ case 0: setmirror(MI_V); break;
case 0: setmirror(MI_V); break; case 1: setmirror(MI_H); break;
case 1: setmirror(MI_H); break; case 2: setmirror(MI_0); break;
case 2: setmirror(MI_0); break; case 3: setmirror(MI_1); break;
case 3: setmirror(MI_1); break; }
}
} }
static void Sync(void) static void Sync(void) {
{ setchr2(0x0000, chr_reg[0]);
setchr2(0x0000,chr_reg[0]); setchr2(0x0800, chr_reg[1]);
setchr2(0x0800,chr_reg[1]); setchr2(0x1000, chr_reg[2]);
setchr2(0x1000,chr_reg[2]); setchr2(0x1800, chr_reg[3]);
setchr2(0x1800,chr_reg[3]); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg16r((PRGptr[1]) ? kogame : 0, 0x8000, prg_reg);
setprg16r((PRGptr[1])?kogame:0,0x8000,prg_reg); setprg16(0xC000, ~0);
setprg16(0xC000,~0);
} }
static DECLFR(M68Read) static DECLFR(M68Read) {
{ if (!(kogame & 8)) {
if(!(kogame&8)) count++;
{ if (count == 1784)
count++; setprg16r(0, 0x8000, prg_reg);
if(count==1784) }
setprg16r(0,0x8000,prg_reg); return CartBR(A);
}
return CartBR(A);
} }
static DECLFW(M68WriteLo) static DECLFW(M68WriteLo) {
{ if (!V) {
if(!V) count = 0;
{ setprg16r((PRGptr[1]) ? kogame : 0, 0x8000, prg_reg);
count = 0; }
setprg16r((PRGptr[1])?kogame:0,0x8000,prg_reg); CartBW(A, V);
}
} }
static DECLFW(M68WriteCHR) static DECLFW(M68WriteCHR) {
{ chr_reg[(A >> 12) & 3] = V;
chr_reg[(A>>12)&3]=V; Sync();
Sync();
} }
static DECLFW(M68WriteNT1) static DECLFW(M68WriteNT1) {
{ nt1 = V;
nt1 = V; M68NTfix();
M68NTfix();
} }
static DECLFW(M68WriteNT2) static DECLFW(M68WriteNT2) {
{ nt2 = V;
nt2 = V; M68NTfix();
M68NTfix();
} }
static DECLFW(M68WriteMIR) static DECLFW(M68WriteMIR) {
{ mirr = V;
mirr = V; M68NTfix();
M68NTfix();
} }
static DECLFW(M68WriteROM) static DECLFW(M68WriteROM) {
{ prg_reg = V & 7;
prg_reg = V&7; kogame = ((V >> 3) & 1) ^ 1;
kogame = ((V>>3)&1)^1; Sync();
Sync();
} }
static void M68Power(void) static void M68Power(void) {
{ prg_reg = 0;
prg_reg = 0; kogame = 0;
kogame = 0; Sync();
Sync(); M68NTfix();
M68NTfix(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000, 0xBFFF, M68Read);
SetReadHandler(0x8000,0xBFFF,M68Read); SetReadHandler(0xC000, 0xFFFF, CartBR);
SetReadHandler(0xC000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xBFFF, M68WriteCHR);
SetWriteHandler(0x8000,0xBFFF,M68WriteCHR); SetWriteHandler(0xC000, 0xCFFF, M68WriteNT1);
SetWriteHandler(0xC000,0xCFFF,M68WriteNT1); SetWriteHandler(0xD000, 0xDFFF, M68WriteNT2);
SetWriteHandler(0xD000,0xDFFF,M68WriteNT2); SetWriteHandler(0xE000, 0xEFFF, M68WriteMIR);
SetWriteHandler(0xE000,0xEFFF,M68WriteMIR); SetWriteHandler(0xF000, 0xFFFF, M68WriteROM);
SetWriteHandler(0xF000,0xFFFF,M68WriteROM); SetWriteHandler(0x6000, 0x6000, M68WriteLo);
SetWriteHandler(0x6000,0x6000,M68WriteLo); SetWriteHandler(0x6001, 0x7FFF, CartBW);
SetWriteHandler(0x6001,0x7FFF,CartBW);
} }
static void M68Close(void) static void M68Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync(); M68NTfix();
M68NTfix();
} }
void Mapper68_Init(CartInfo *info) void Mapper68_Init(CartInfo *info) {
{ info->Power = M68Power;
info->Power=M68Power; info->Close = M68Close;
info->Close=M68Close; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; WRAMSIZE = 8192;
WRAMSIZE=8192; WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); if (info->battery) {
if(info->battery) info->SaveGame[0] = WRAM;
{ info->SaveGameLen[0] = WRAMSIZE;
info->SaveGame[0]=WRAM; }
info->SaveGameLen[0]=WRAMSIZE; AddExState(WRAM, WRAMSIZE, 0, "WRAM");
} AddExState(&StateRegs, ~0, 0, 0);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0);
} }

2
src/boards/69.cpp
View File

@ -166,7 +166,7 @@ static void DoAYSQ(int x) {
} }
static void DoAYSQHQ(int x) { static void DoAYSQHQ(int x) {
int32 V; uint32 V;
int32 freq = ((sreg[x << 1] | ((sreg[(x << 1) + 1] & 15) << 8)) + 1) << 4; int32 freq = ((sreg[x << 1] | ((sreg[(x << 1) + 1] & 15) << 8)) + 1) << 4;
int32 amp = (sreg[0x8 + x] & 15) << 6; int32 amp = (sreg[0x8 + x] & 15) << 6;

75
src/boards/8157.cpp
View File

@ -22,60 +22,53 @@
static uint16 cmdreg; static uint16 cmdreg;
static uint8 invalid_data; static uint8 invalid_data;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&invalid_data, 1, "INVD"}, { &invalid_data, 1, "INVD" },
{&cmdreg, 2, "CREG"}, { &cmdreg, 2, "CREG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg16r((cmdreg & 0x060) >> 5, 0x8000, (cmdreg & 0x01C) >> 2);
setprg16r((cmdreg&0x060)>>5,0x8000,(cmdreg&0x01C)>>2); setprg16r((cmdreg & 0x060) >> 5, 0xC000, (cmdreg & 0x200) ? (~0) : 0);
setprg16r((cmdreg&0x060)>>5,0xC000,(cmdreg&0x200)?(~0):0); setmirror(((cmdreg & 2) >> 1) ^ 1);
setmirror(((cmdreg&2)>>1)^1);
} }
static DECLFR(UNL8157Read) static DECLFR(UNL8157Read) {
{ if (invalid_data && cmdreg & 0x100)
if(invalid_data&&cmdreg&0x100) return 0xFF;
return 0xFF; else
else return CartBR(A);
return CartBR(A);
} }
static DECLFW(UNL8157Write) static DECLFW(UNL8157Write) {
{ cmdreg = A;
cmdreg=A; Sync();
Sync();
} }
static void UNL8157Power(void) static void UNL8157Power(void) {
{ setchr8(0);
setchr8(0); SetWriteHandler(0x8000, 0xFFFF, UNL8157Write);
SetWriteHandler(0x8000,0xFFFF,UNL8157Write); SetReadHandler(0x8000, 0xFFFF, UNL8157Read);
SetReadHandler(0x8000,0xFFFF,UNL8157Read); cmdreg = 0x200;
cmdreg=0x200; invalid_data = 1;
invalid_data=1; Sync();
Sync();
} }
static void UNL8157Reset(void) static void UNL8157Reset(void) {
{ cmdreg = 0;
cmdreg=0; invalid_data ^= 1;
invalid_data^=1; Sync();
Sync();
} }
static void UNL8157Restore(int version) static void UNL8157Restore(int version) {
{ Sync();
Sync();
} }
void UNL8157_Init(CartInfo *info) void UNL8157_Init(CartInfo *info) {
{ info->Power = UNL8157Power;
info->Power=UNL8157Power; info->Reset = UNL8157Reset;
info->Reset=UNL8157Reset; GameStateRestore = UNL8157Restore;
GameStateRestore=UNL8157Restore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

272
src/boards/8237.cpp
View File

@ -1,7 +1,7 @@
/* FCE Ultra - NES/Famicom Emulator /* FCE Ultra - NES/Famicom Emulator
* *
* Copyright notice for this file: * Copyright notice for this file:
* Copyright (C) 2005-2011 CaH4e3 * Copyright (C) 2011 CaH4e3
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -28,168 +28,146 @@
static uint8 cmdin; static uint8 cmdin;
static uint8 regperm[8][8] = static uint8 regperm[8][8] =
{ {
{0, 1, 2, 3, 4, 5, 6, 7}, { 0, 1, 2, 3, 4, 5, 6, 7 },
{0, 2, 6, 1, 7, 3, 4, 5}, { 0, 2, 6, 1, 7, 3, 4, 5 },
{0, 5, 4, 1, 7, 2, 6, 3}, // unused { 0, 5, 4, 1, 7, 2, 6, 3 }, // unused
{0, 6, 3, 7, 5, 2, 4, 1}, { 0, 6, 3, 7, 5, 2, 4, 1 },
{0, 2, 5, 3, 6, 1, 7, 4}, { 0, 2, 5, 3, 6, 1, 7, 4 },
{0, 1, 2, 3, 4, 5, 6, 7}, // empty { 0, 1, 2, 3, 4, 5, 6, 7 }, // empty
{0, 1, 2, 3, 4, 5, 6, 7}, // empty { 0, 1, 2, 3, 4, 5, 6, 7 }, // empty
{0, 1, 2, 3, 4, 5, 6, 7}, // empty { 0, 1, 2, 3, 4, 5, 6, 7 }, // empty
}; };
static uint8 adrperm[8][8] = static uint8 adrperm[8][8] =
{
{0, 1, 2, 3, 4, 5, 6, 7},
{3, 2, 0, 4, 1, 5, 6, 7},
{0, 1, 2, 3, 4, 5, 6, 7}, // unused
{5, 0, 1, 2, 3, 7, 6, 4},
{3, 1, 0, 5, 2, 4, 6, 7},
{0, 1, 2, 3, 4, 5, 6, 7}, // empty
{0, 1, 2, 3, 4, 5, 6, 7}, // empty
{0, 1, 2, 3, 4, 5, 6, 7}, // empty
};
static void UNL8237CW(uint32 A, uint8 V)
{ {
if(EXPREGS[0]&0x40) { 0, 1, 2, 3, 4, 5, 6, 7 },
setchr1(A,((EXPREGS[1]&0xc)<<6)|(V&0x7F)|((EXPREGS[1]&0x20)<<2)); { 3, 2, 0, 4, 1, 5, 6, 7 },
else { 0, 1, 2, 3, 4, 5, 6, 7 }, // unused
setchr1(A,((EXPREGS[1]&0xc)<<6)|V); { 5, 0, 1, 2, 3, 7, 6, 4 },
{ 3, 1, 0, 5, 2, 4, 6, 7 },
{ 0, 1, 2, 3, 4, 5, 6, 7 }, // empty
{ 0, 1, 2, 3, 4, 5, 6, 7 }, // empty
{ 0, 1, 2, 3, 4, 5, 6, 7 }, // empty
};
static void UNL8237CW(uint32 A, uint8 V) {
if (EXPREGS[0] & 0x40)
setchr1(A, ((EXPREGS[1] & 0xc) << 6) | (V & 0x7F) | ((EXPREGS[1] & 0x20) << 2));
else
setchr1(A, ((EXPREGS[1] & 0xc) << 6) | V);
} }
static void UNL8237PW(uint32 A, uint8 V) static void UNL8237PW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & 0x40) {
if(EXPREGS[0]&0x40) uint8 sbank = (EXPREGS[1] & 0x10);
{ if (EXPREGS[0] & 0x80) {
uint8 sbank = (EXPREGS[1]&0x10); uint8 bank = ((EXPREGS[1] & 3) << 4) | (EXPREGS[0] & 0x7) | (sbank >> 1);
if(EXPREGS[0]&0x80) if (EXPREGS[0] & 0x20)
{ setprg32(0x8000, bank >> 1);
uint8 bank = ((EXPREGS[1]&3)<<4)|(EXPREGS[0]&0x7)|(sbank>>1); else{
if(EXPREGS[0]&0x20) setprg16(0x8000, bank);
setprg32(0x8000,bank>>1); setprg16(0xC000, bank);
else }
{ } else
setprg16(0x8000,bank); setprg8(A, ((EXPREGS[1] & 3) << 5) | (V & 0x0F) | sbank);
setprg16(0xC000,bank); } else {
} if (EXPREGS[0] & 0x80) {
} uint8 bank = ((EXPREGS[1] & 3) << 4) | (EXPREGS[0] & 0xF);
else if (EXPREGS[0] & 0x20)
setprg8(A,((EXPREGS[1]&3)<<5)|(V&0x0F)|sbank); setprg32(0x8000, bank >> 1);
} else{
else setprg16(0x8000, bank);
{ setprg16(0xC000, bank);
if(EXPREGS[0]&0x80) }
{ } else
uint8 bank = ((EXPREGS[1]&3)<<4)|(EXPREGS[0]&0xF); setprg8(A, ((EXPREGS[1] & 3) << 5) | (V & 0x1F));
if(EXPREGS[0]&0x20) }
setprg32(0x8000,bank>>1);
else
{
setprg16(0x8000,bank);
setprg16(0xC000,bank);
}
}
else
setprg8(A,((EXPREGS[1]&3)<<5)|(V&0x1F));
}
} }
static void UNL8237ACW(uint32 A, uint8 V) static void UNL8237ACW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & 0x40)
if(EXPREGS[0]&0x40) setchr1(A, ((EXPREGS[1] & 0xE) << 7) | (V & 0x7F) | ((EXPREGS[1] & 0x20) << 2));
setchr1(A,((EXPREGS[1]&0xE)<<7)|(V&0x7F)|((EXPREGS[1]&0x20)<<2)); else
else setchr1(A, ((EXPREGS[1] & 0xE) << 7) | V);
setchr1(A,((EXPREGS[1]&0xE)<<7)|V);
} }
static void UNL8237APW(uint32 A, uint8 V) static void UNL8237APW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & 0x40) {
if(EXPREGS[0]&0x40) uint8 sbank = (EXPREGS[1] & 0x10);
{ if (EXPREGS[0] & 0x80) {
uint8 sbank = (EXPREGS[1]&0x10); uint8 bank = ((EXPREGS[1] & 3) << 4) | ((EXPREGS[1] & 8) << 3) | (EXPREGS[0] & 0x7) | (sbank >> 1);
if(EXPREGS[0]&0x80) if (EXPREGS[0] & 0x20) {
{ // FCEU_printf("8000:%02X\n",bank>>1);
uint8 bank = ((EXPREGS[1]&3)<<4)|((EXPREGS[1]&8)<<3)|(EXPREGS[0]&0x7)|(sbank>>1); setprg32(0x8000, bank >> 1);
if(EXPREGS[0]&0x20) } else {
setprg32(0x8000,bank>>1); // FCEU_printf("8000-C000:%02X\n",bank);
else setprg16(0x8000, bank);
{ setprg16(0xC000, bank);
setprg16(0x8000,bank); }
setprg16(0xC000,bank); } else {
} // FCEU_printf("%04x:%02X\n",A,((EXPREGS[1]&3)<<5)|((EXPREGS[1]&8)<<4)|(V&0x0F)|sbank);
} setprg8(A, ((EXPREGS[1] & 3) << 5) | ((EXPREGS[1] & 8) << 4) | (V & 0x0F) | sbank);
else }
setprg8(A,((EXPREGS[1]&3)<<5)|((EXPREGS[1]&8)<<4)|(V&0x0F)|sbank); } else {
} if (EXPREGS[0] & 0x80) {
else uint8 bank = ((EXPREGS[1] & 3) << 4) | ((EXPREGS[1] & 8) << 3) | (EXPREGS[0] & 0xF);
{ if (EXPREGS[0] & 0x20) {
if(EXPREGS[0]&0x80) // FCEU_printf("8000:%02X\n",(bank>>1)&0x07);
{ setprg32(0x8000, bank >> 1);
uint8 bank = ((EXPREGS[1]&3)<<4)|((EXPREGS[1]&8)<<3)|(EXPREGS[0]&0xF); } else {
if(EXPREGS[0]&0x20) // FCEU_printf("8000-C000:%02X\n",bank&0x0F);
setprg32(0x8000,bank>>1); setprg16(0x8000, bank);
else setprg16(0xC000, bank);
{ }
setprg16(0x8000,bank); } else {
setprg16(0xC000,bank); // FCEU_printf("%04X:%02X\n",A,(((EXPREGS[1]&3)<<5)|((EXPREGS[1]&8)<<4)|(V&0x1F))&0x1F);
} setprg8(A, ((EXPREGS[1] & 3) << 5) | ((EXPREGS[1] & 8) << 4) | (V & 0x1F));
} }
else }
setprg8(A,((EXPREGS[1]&3)<<5)|((EXPREGS[1]&8)<<4)|(V&0x1F));
}
} }
static DECLFW(UNL8237Write) static DECLFW(UNL8237Write) {
{ uint8 dat = V;
uint8 dat = V; uint8 adr = adrperm[EXPREGS[2]][((A >> 12) & 6) | (A & 1)];
uint8 adr = adrperm[EXPREGS[2]][((A>>12)&6)|(A&1)]; uint16 addr = (adr & 1) | ((adr & 6) << 12) | 0x8000;
uint16 addr = (adr & 1)|((adr & 6)<<12)|0x8000; if (adr < 4) {
if(adr < 4) if (!adr)
{ dat = (dat & 0xC0) | (regperm[EXPREGS[2]][dat & 7]);
if(!adr) MMC3_CMDWrite(addr, dat);
dat = (dat & 0xC0)|(regperm[EXPREGS[2]][dat & 7]); } else
MMC3_CMDWrite(addr,dat); MMC3_IRQWrite(addr, dat);
}
else
MMC3_IRQWrite(addr,dat);
} }
static DECLFW(UNL8237ExWrite) static DECLFW(UNL8237ExWrite) {
{ switch (A) {
switch(A) case 0x5000: EXPREGS[0] = V; FixMMC3PRG(MMC3_cmd); break;
{ case 0x5001: EXPREGS[1] = V; FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd); break;
case 0x5000: EXPREGS[0]=V; FixMMC3PRG(MMC3_cmd); break; case 0x5007: EXPREGS[2] = V; break;
case 0x5001: EXPREGS[1]=V; FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd); break; }
case 0x5007: EXPREGS[2]=V; break;
}
} }
static void UNL8237Power(void) static void UNL8237Power(void) {
{ EXPREGS[0] = EXPREGS[2] = 0;
EXPREGS[0]=EXPREGS[2]=0; EXPREGS[1] = 3;
EXPREGS[1]=3; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x8000, 0xFFFF, UNL8237Write);
SetWriteHandler(0x8000,0xFFFF,UNL8237Write); SetWriteHandler(0x5000, 0x7FFF, UNL8237ExWrite);
SetWriteHandler(0x5000,0x7FFF,UNL8237ExWrite);
} }
void UNL8237_Init(CartInfo *info) void UNL8237_Init(CartInfo *info) {
{ GenMMC3_Init(info, 256, 256, 0, 0);
GenMMC3_Init(info, 256, 256, 0, 0); cwrap = UNL8237CW;
cwrap=UNL8237CW; pwrap = UNL8237PW;
pwrap=UNL8237PW; info->Power = UNL8237Power;
info->Power=UNL8237Power; AddExState(EXPREGS, 3, 0, "EXPR");
AddExState(EXPREGS, 3, 0, "EXPR"); AddExState(&cmdin, 1, 0, "CMDI");
AddExState(&cmdin, 1, 0, "CMDI");
} }
void UNL8237A_Init(CartInfo *info) void UNL8237A_Init(CartInfo *info) {
{ GenMMC3_Init(info, 256, 256, 0, 0);
GenMMC3_Init(info, 256, 256, 0, 0); cwrap = UNL8237ACW;
cwrap=UNL8237ACW; pwrap = UNL8237APW;
pwrap=UNL8237APW; info->Power = UNL8237Power;
info->Power=UNL8237Power; AddExState(EXPREGS, 3, 0, "EXPR");
AddExState(EXPREGS, 3, 0, "EXPR"); AddExState(&cmdin, 1, 0, "CMDI");
AddExState(&cmdin, 1, 0, "CMDI");
} }

76
src/boards/830118C.cpp
View File

@ -23,58 +23,46 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static void BMC830118CCW(uint32 A, uint8 V) static void BMC830118CCW(uint32 A, uint8 V) {
{ setchr1(A, (V & 0x7F) | ((EXPREGS[0] & 0x0c) << 5));
setchr1(A,(V&0x7F)|((EXPREGS[0]&0x0c)<<5));
} }
static void BMC830118CPW(uint32 A, uint8 V) static void BMC830118CPW(uint32 A, uint8 V) {
{ if ((EXPREGS[0] & 0x0C) == 0x0C) {
if((EXPREGS[0]&0x0C)==0x0C) if (A == 0x8000) {
{ setprg8(A, (V & 0x0F) | ((EXPREGS[0] & 0x0c) << 2));
if(A==0x8000) setprg8(0xC000, (V & 0x0F) | 0x32);
{ } else if (A == 0xA000) {
setprg8(A,(V&0x0F)|((EXPREGS[0]&0x0c)<<2)); setprg8(A, (V & 0x0F) | ((EXPREGS[0] & 0x0c) << 2));
setprg8(0xC000,(V&0x0F)|0x32); setprg8(0xE000, (V & 0x0F) | 0x32);
} }
else if(A==0xA000) } else {
{ setprg8(A, (V & 0x0F) | ((EXPREGS[0] & 0x0c) << 2));
setprg8(A,(V&0x0F)|((EXPREGS[0]&0x0c)<<2)); }
setprg8(0xE000,(V&0x0F)|0x32);
}
}
else
{
setprg8(A,(V&0x0F)|((EXPREGS[0]&0x0c)<<2));
}
} }
static DECLFW(BMC830118CLoWrite) static DECLFW(BMC830118CLoWrite) {
{ EXPREGS[0] = V;
EXPREGS[0] = V; FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} }
static void BMC830118CReset(void) static void BMC830118CReset(void) {
{ EXPREGS[0] = 0;
EXPREGS[0]=0; MMC3RegReset();
MMC3RegReset();
} }
static void BMC830118CPower(void) static void BMC830118CPower(void) {
{ EXPREGS[0] = 0;
EXPREGS[0] = 0; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x6800, 0x68FF, BMC830118CLoWrite);
SetWriteHandler(0x6800,0x68FF,BMC830118CLoWrite);
} }
void BMC830118C_Init(CartInfo *info) void BMC830118C_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 128, 8, 0);
GenMMC3_Init(info, 128, 128, 8, 0); pwrap = BMC830118CPW;
pwrap=BMC830118CPW; cwrap = BMC830118CCW;
cwrap=BMC830118CCW; info->Power = BMC830118CPower;
info->Power=BMC830118CPower; info->Reset = BMC830118CReset;
info->Reset=BMC830118CReset; AddExState(EXPREGS, 1, 0, "EXPR");
AddExState(EXPREGS, 1, 0, "EXPR");
} }

40
src/boards/90.cpp
View File

@ -49,26 +49,26 @@ static uint8 chr[2];
static uint16 names[4]; static uint16 names[4];
static uint8 tekker; static uint8 tekker;
static SFORMAT Tek_StateRegs[]={ static SFORMAT Tek_StateRegs[] = {
{&IRQMode, 1, "IRQM"}, { &IRQMode, 1, "IRQM" },
{&IRQPre, 1, "IRQP"}, { &IRQPre, 1, "IRQP" },
{&IRQPreSize, 1, "IRQR"}, { &IRQPreSize, 1, "IRQR" },
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQXOR, 1, "IRQX"}, { &IRQXOR, 1, "IRQX" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{mul, 2, "MUL"}, { mul, 2, "MUL" },
{&regie, 1, "REGI"}, { &regie, 1, "REGI" },
{tkcom, 4, "TKCO"}, { tkcom, 4, "TKCO" },
{prgb, 4, "PRGB"}, { prgb, 4, "PRGB" },
{chr, 2, "CLTC"}, { chr, 2, "CLTC" },
{chrlow, 4, "CHRL"}, { chrlow, 4, "CHRL" },
{chrhigh, 8, "CHRH"}, { chrhigh, 8, "CHRH" },
{&names[0], 2|FCEUSTATE_RLSB, "NMS0"}, { &names[0], 2 | FCEUSTATE_RLSB, "NMS0" },
{&names[1], 2|FCEUSTATE_RLSB, "NMS1"}, { &names[1], 2 | FCEUSTATE_RLSB, "NMS1" },
{&names[2], 2|FCEUSTATE_RLSB, "NMS2"}, { &names[2], 2 | FCEUSTATE_RLSB, "NMS2" },
{&names[3], 2|FCEUSTATE_RLSB, "NMS3"}, { &names[3], 2 | FCEUSTATE_RLSB, "NMS3" },
{&tekker, 1, "TEKR"}, { &tekker, 1, "TEKR" },
{0} { 0 }
}; };
static void mira(void) static void mira(void)

98
src/boards/91.cpp
View File

@ -23,73 +23,63 @@
static uint8 cregs[4], pregs[2]; static uint8 cregs[4], pregs[2];
static uint8 IRQCount, IRQa; static uint8 IRQCount, IRQa;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{cregs, 4, "CREG"}, { cregs, 4, "CREG" },
{pregs, 2, "PREG"}, { pregs, 2, "PREG" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x8000, pregs[0]);
setprg8(0x8000,pregs[0]); setprg8(0xa000, pregs[1]);
setprg8(0xa000,pregs[1]); setprg8(0xc000, ~1);
setprg8(0xc000,~1); setprg8(0xe000, ~0);
setprg8(0xe000,~0); setchr2(0x0000, cregs[0]);
setchr2(0x0000,cregs[0]); setchr2(0x0800, cregs[1]);
setchr2(0x0800,cregs[1]); setchr2(0x1000, cregs[2]);
setchr2(0x1000,cregs[2]); setchr2(0x1800, cregs[3]);
setchr2(0x1800,cregs[3]);
} }
static DECLFW(M91Write0) static DECLFW(M91Write0) {
{ cregs[A & 3] = V;
cregs[A & 3] = V; Sync();
Sync();
} }
static DECLFW(M91Write1) static DECLFW(M91Write1) {
{ switch (A & 3) {
switch (A & 3) case 0:
{ case 1: pregs[A & 1] = V; Sync(); break;
case 0: case 2: IRQa = IRQCount = 0; X6502_IRQEnd(FCEU_IQEXT); break;
case 1: pregs[A & 1] = V; Sync(); break; case 3: IRQa = 1; X6502_IRQEnd(FCEU_IQEXT); break;
case 2: IRQa = IRQCount = 0; X6502_IRQEnd(FCEU_IQEXT); break; }
case 3: IRQa = 1; X6502_IRQEnd(FCEU_IQEXT); break;
}
} }
static void M91Power(void) static void M91Power(void) {
{ Sync();
Sync(); SetWriteHandler(0x6000, 0x6fff, M91Write0);
SetWriteHandler(0x6000,0x6fff,M91Write0); SetWriteHandler(0x7000, 0x7fff, M91Write1);
SetWriteHandler(0x7000,0x7fff,M91Write1); SetReadHandler(0x8000, 0xffff, CartBR);
SetReadHandler(0x8000,0xffff,CartBR);
} }
static void M91IRQHook(void) static void M91IRQHook(void) {
{ if (IRQCount < 8 && IRQa) {
if(IRQCount<8 && IRQa) IRQCount++;
{ if (IRQCount >= 8) {
IRQCount++; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount>=8) }
{ }
X6502_IRQBegin(FCEU_IQEXT);
}
}
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper91_Init(CartInfo *info) void Mapper91_Init(CartInfo *info) {
{ info->Power = M91Power;
info->Power=M91Power; GameHBIRQHook = M91IRQHook;
GameHBIRQHook=M91IRQHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

65
src/boards/96.cpp
View File

@ -24,54 +24,47 @@
static uint8 reg, ppulatch; static uint8 reg, ppulatch;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{&ppulatch, 1, "PPUL"}, { &ppulatch, 1, "PPUL" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setmirror(MI_0);
setmirror(MI_0); setprg32(0x8000, reg & 3);
setprg32(0x8000,reg & 3); setchr4(0x0000, (reg & 4) | ppulatch);
setchr4(0x0000,(reg & 4) | ppulatch); setchr4(0x1000, (reg & 4) | 3);
setchr4(0x1000,(reg & 4) | 3);
} }
static DECLFW(M96Write) static DECLFW(M96Write) {
{ reg = V;
reg = V; Sync();
Sync();
} }
static void M96Hook(uint32 A) static void M96Hook(uint32 A) {
{ if ((A & 0x3000) == 0x2000) {
if((A & 0x3000) == 0x2000) ppulatch = (A >> 8) & 3;
{ Sync();
ppulatch = (A>>8) & 3; }
Sync();
}
} }
static void M96Power(void) static void M96Power(void) {
{ reg = ppulatch = 0;
reg = ppulatch = 0; Sync();
Sync(); SetReadHandler(0x8000, 0xffff, CartBR);
SetReadHandler(0x8000,0xffff,CartBR); SetWriteHandler(0x8000, 0xffff, M96Write);
SetWriteHandler(0x8000,0xffff,M96Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper96_Init(CartInfo *info) void Mapper96_Init(CartInfo *info) {
{ info->Power = M96Power;
info->Power=M96Power; PPU_hook = M96Hook;
PPU_hook=M96Hook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

67
src/boards/99.cpp
View File

@ -21,45 +21,58 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 latch; static uint8 latch;
static uint8 *WRAM=NULL;
static uint32 WRAMSIZE;
static writefunc old4016; static writefunc old4016;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&latch, 1, "LATC"}, { &latch, 1, "LATC" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr8((latch >> 2) & 1);
setchr8((latch >> 2) & 1); setprg8r(0x10, 0x6000, 0);
setprg32(0x8000,0); setprg32(0x8000, 0);
setprg8(0x8000,latch & 4); /* Special for VS Gumshoe */ setprg8(0x8000, latch & 4); /* Special for VS Gumshoe */
} }
static DECLFW(M99Write) static DECLFW(M99Write) {
{ latch = V;
latch = V; Sync();
Sync(); old4016(A, V);
old4016(A,V);
} }
static void M99Power(void) static void M99Power(void) {
{ latch = 0;
latch = 0; Sync();
Sync(); old4016 = GetWriteHandler(0x4016);
old4016=GetWriteHandler(0x4016); SetWriteHandler(0x4016, 0x4016, M99Write);
SetWriteHandler(0x4016,0x4016,M99Write); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
} }
static void StateRestore(int version) static void M99Close(void)
{ {
Sync(); if (WRAM)
FCEU_gfree(WRAM);
WRAM = NULL;
} }
void Mapper99_Init(CartInfo *info) static void StateRestore(int version) {
{ Sync();
info->Power=M99Power; }
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0); void Mapper99_Init(CartInfo *info) {
info->Power = M99Power;
info->Close = M99Close;
WRAMSIZE = 8192;
WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
} }

78
src/boards/a9711.cpp
View File

@ -1,78 +0,0 @@
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 2005 CaH4e3
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include "mapinc.h"
#include "mmc3.h"
//static uint8 m_perm[8] = {0, 1, 0, 3, 0, 5, 6, 7};
static void UNLA9711PW(uint32 A, uint8 V)
{
if((EXPREGS[0]&0xFF) == 0x37)
{
setprg8(0x8000, 0x13);
setprg8(0xA000, 0x13);
setprg8(0xC000, 0x13);
setprg8(0xE000, 0x0);
// uint8 bank=EXPREGS[0]&0x1F;
// if(EXPREGS[0]&0x20)
// setprg32(0x8000,bank>>2);
// else
// {
// setprg16(0x8000,bank);
// setprg16(0xC000,bank);
// }
}
else
setprg8(A,V&0x3F);
}
//static DECLFW(UNLA9711Write8000)
//{
// FCEU_printf("bs %04x %02x\n",A,V);
// if(V&0x80)
// MMC3_CMDWrite(A,V);
// else
// MMC3_CMDWrite(A,m_perm[V&7]);
// if(V!=0x86) MMC3_CMDWrite(A,V);
//}
static DECLFW(UNLA9711WriteLo)
{
FCEU_printf("bs %04x %02x\n",A,V);
EXPREGS[0]=V;
FixMMC3PRG(MMC3_cmd);
}
static void UNLA9711Power(void)
{
EXPREGS[0]=EXPREGS[1]=EXPREGS[2]=0;
GenMMC3Power();
SetWriteHandler(0x5000,0x5FFF,UNLA9711WriteLo);
// SetWriteHandler(0x8000,0xbfff,UNLA9711Write8000);
}
void UNLA9711_Init(CartInfo *info)
{
GenMMC3_Init(info, 256, 256, 0, 0);
pwrap=UNLA9711PW;
info->Power=UNLA9711Power;
AddExState(EXPREGS, 3, 0, "EXPR");
}

96
src/boards/a9746.cpp
View File

@ -1,4 +1,3 @@
/* FCE Ultra - NES/Famicom Emulator /* FCE Ultra - NES/Famicom Emulator
* *
* Copyright notice for this file: * Copyright notice for this file:
@ -22,60 +21,55 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static DECLFW(UNLA9746Write) static DECLFW(UNLA9746Write) {
{
// FCEU_printf("write raw %04x:%02x\n",A,V); // FCEU_printf("write raw %04x:%02x\n",A,V);
switch (A&0xE003) switch (A & 0xE003) {
{ case 0x8000: EXPREGS[1] = V; EXPREGS[0] = 0; break;
case 0x8000: EXPREGS[1]=V; EXPREGS[0]=0; break; case 0x8002: EXPREGS[0] = V; EXPREGS[1] = 0; break;
case 0x8002: EXPREGS[0]=V; EXPREGS[1]=0; break; case 0x8001:
case 0x8001: { {
uint8 bits_rev = ((V&0x20)>>5)|((V&0x10)>>3)|((V&0x08)>>1)|((V&0x04)<<1); uint8 bits_rev = ((V & 0x20) >> 5) | ((V & 0x10) >> 3) | ((V & 0x08) >> 1) | ((V & 0x04) << 1);
switch(EXPREGS[0]) switch (EXPREGS[0]) {
{ case 0x26: setprg8(0x8000, bits_rev); break;
case 0x26: setprg8(0x8000, bits_rev); break; case 0x25: setprg8(0xA000, bits_rev); break;
case 0x25: setprg8(0xA000, bits_rev); break; case 0x24: setprg8(0xC000, bits_rev); break;
case 0x24: setprg8(0xC000, bits_rev); break; case 0x23: setprg8(0xE000, bits_rev); break;
case 0x23: setprg8(0xE000, bits_rev); break; }
} switch (EXPREGS[1]) {
switch(EXPREGS[1]) case 0x0a:
{ case 0x08: EXPREGS[2] = (V << 4); break;
case 0x0a: case 0x09: setchr1(0x0000, EXPREGS[2] | (V >> 1)); break;
case 0x08: EXPREGS[2] = (V << 4); break; case 0x0b: setchr1(0x0400, EXPREGS[2] | (V >> 1) | 1); break;
case 0x09: setchr1(0x0000, EXPREGS[2]|(V >> 1)); break; case 0x0c:
case 0x0b: setchr1(0x0400, EXPREGS[2]|(V >> 1)|1); break; case 0x0e: EXPREGS[2] = (V << 4); break;
case 0x0c: case 0x0d: setchr1(0x0800, EXPREGS[2] | (V >> 1)); break;
case 0x0e: EXPREGS[2] = (V << 4); break; case 0x0f: setchr1(0x0c00, EXPREGS[2] | (V >> 1) | 1); break;
case 0x0d: setchr1(0x0800, EXPREGS[2]|(V >> 1)); break; case 0x10:
case 0x0f: setchr1(0x0c00, EXPREGS[2]|(V >> 1)|1); break; case 0x12: EXPREGS[2] = (V << 4); break;
case 0x10: case 0x11: setchr1(0x1000, EXPREGS[2] | (V >> 1)); break;
case 0x12: EXPREGS[2] = (V << 4); break; case 0x14:
case 0x11: setchr1(0x1000, EXPREGS[2]|(V >> 1)); break; case 0x16: EXPREGS[2] = (V << 4); break;
case 0x14: case 0x15: setchr1(0x1400, EXPREGS[2] | (V >> 1)); break;
case 0x16: EXPREGS[2] = (V << 4); break; case 0x18:
case 0x15: setchr1(0x1400, EXPREGS[2]|(V >> 1)); break; case 0x1a: EXPREGS[2] = (V << 4); break;
case 0x18: case 0x19: setchr1(0x1800, EXPREGS[2] | (V >> 1)); break;
case 0x1a: EXPREGS[2] = (V << 4); break; case 0x1c:
case 0x19: setchr1(0x1800, EXPREGS[2]|(V >> 1)); break; case 0x1e: EXPREGS[2] = (V << 4); break;
case 0x1c: case 0x1d: setchr1(0x1c00, EXPREGS[2] | (V >> 1)); break;
case 0x1e: EXPREGS[2] = (V << 4); break; }
case 0x1d: setchr1(0x1c00, EXPREGS[2]|(V >> 1)); break; }
} break;
} }
break;
}
} }
static void UNLA9746Power(void) static void UNLA9746Power(void) {
{ GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x8000, 0xbfff, UNLA9746Write);
SetWriteHandler(0x8000,0xbfff,UNLA9746Write);
} }
void UNLA9746_Init(CartInfo *info) void UNLA9746_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 256, 0, 0);
GenMMC3_Init(info, 128, 256, 0, 0); info->Power = UNLA9746Power;
info->Power=UNLA9746Power; AddExState(EXPREGS, 6, 0, "EXPR");
AddExState(EXPREGS, 6, 0, "EXPR");
} }

66
src/boards/ac-08.cpp
View File

@ -22,53 +22,47 @@
static uint8 reg, mirr; static uint8 reg, mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x6000, reg);
setprg8(0x6000, reg); setprg32r(1, 0x8000, 0);
setprg32r(1, 0x8000, 0); setchr8(0);
setchr8(0); setmirror(mirr);
setmirror(mirr);
} }
static DECLFW(AC08Mirr) static DECLFW(AC08Mirr) {
{ mirr = ((V & 8) >> 3) ^ 1;
mirr = ((V&8)>>3)^1; Sync();
Sync();
} }
static DECLFW(AC08Write) static DECLFW(AC08Write) {
{ if (A == 0x8001) // Green Berret bank switching is only 100x xxxx xxxx xxx1 mask
if(A == 0x8001) // Green Berret bank switching is only 100x xxxx xxxx xxx1 mask reg = (V >> 1) & 0xf;
reg = (V >> 1) & 0xf; else
else reg = V & 0xf; // Sad But True, 2-in-1 mapper, Green Berret need value shifted left one byte, Castlevania doesn't
reg = V & 0xf; // Sad But True, 2-in-1 mapper, Green Berret need value shifted left one byte, Castlevania doesn't Sync();
Sync();
} }
static void AC08Power(void) static void AC08Power(void) {
{ reg = 0;
reg = 0; Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x4025, 0x4025, AC08Mirr);
SetWriteHandler(0x4025,0x4025,AC08Mirr); SetWriteHandler(0x8000, 0xFFFF, AC08Write);
SetWriteHandler(0x8000,0xFFFF,AC08Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void AC08_Init(CartInfo *info) void AC08_Init(CartInfo *info) {
{ info->Power = AC08Power;
info->Power=AC08Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

146
src/boards/ax5705.cpp
View File

@ -22,101 +22,95 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 IRQCount;//, IRQPre; static uint8 IRQCount; //, IRQPre;
static uint8 IRQa; static uint8 IRQa;
static uint8 prg_reg[2]; static uint8 prg_reg[2];
static uint8 chr_reg[8]; static uint8 chr_reg[8];
static uint8 mirr; static uint8 mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{prg_reg, 2, "PRG"}, { prg_reg, 2, "PRG" },
{chr_reg, 8, "CHR"}, { chr_reg, 8, "CHR" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
/* /*
static void UNLAX5705IRQ(void) static void UNLAX5705IRQ(void)
{ {
if(IRQa) if(IRQa)
{ {
IRQCount++; IRQCount++;
if(IRQCount>=238) if(IRQCount>=238)
{ {
X6502_IRQBegin(FCEU_IQEXT); X6502_IRQBegin(FCEU_IQEXT);
// IRQa=0; // IRQa=0;
} }
} }
}*/ }*/
static void Sync(void) static void Sync(void) {
{ setprg8(0x8000, prg_reg[0]);
int i; setprg8(0xA000, prg_reg[1]);
setprg8(0x8000,prg_reg[0]); setprg8(0xC000, ~1);
setprg8(0xA000,prg_reg[1]); setprg8(0xE000, ~0);
setprg8(0xC000,~1); int i;
setprg8(0xE000,~0); for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chr_reg[i]);
setchr1(i<<10,chr_reg[i]); setmirror(mirr ^ 1);
setmirror(mirr^1);
} }
static DECLFW(UNLAX5705Write) static DECLFW(UNLAX5705Write) {
{ // if((A>=0xA008)&&(A<=0xE003))
// if((A>=0xA008)&&(A<=0xE003)) // {
// { // int ind=(((A>>11)-6)|(A&1))&7;
// int ind=(((A>>11)-6)|(A&1))&7; // int sar=((A&2)<<1);
// int sar=((A&2)<<1); // chr_reg[ind]=(chr_reg[ind]&(0xF0>>sar))|((V&0x0F)<<sar);
// chr_reg[ind]=(chr_reg[ind]&(0xF0>>sar))|((V&0x0F)<<sar); // SyncChr();
// SyncChr(); // }
// } // else
// else switch (A & 0xF00F) {
switch(A&0xF00F) case 0x8000: prg_reg[0] = ((V & 2) << 2) | ((V & 8) >> 2) | (V & 5); break; // EPROM dump have mixed PRG and CHR banks, data lines to mapper seems to be mixed
{ case 0x8008: mirr = V & 1; break;
case 0x8000: prg_reg[0]=((V&2)<<2)|((V&8)>>2)|(V&5); break; // EPROM dump have mixed PRG and CHR banks, data lines to mapper seems to be mixed case 0xA000: prg_reg[1] = ((V & 2) << 2) | ((V & 8) >> 2) | (V & 5); break;
case 0x8008: mirr=V&1; break; case 0xA008: chr_reg[0] = (chr_reg[0] & 0xF0) | (V & 0x0F); break;
case 0xA000: prg_reg[1]=((V&2)<<2)|((V&8)>>2)|(V&5); break; case 0xA009: chr_reg[0] = (chr_reg[0] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xA008: chr_reg[0]=(chr_reg[0]&0xF0)|(V&0x0F); break; case 0xA00A: chr_reg[1] = (chr_reg[1] & 0xF0) | (V & 0x0F); break;
case 0xA009: chr_reg[0]=(chr_reg[0]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; case 0xA00B: chr_reg[1] = (chr_reg[1] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xA00A: chr_reg[1]=(chr_reg[1]&0xF0)|(V&0x0F); break; case 0xC000: chr_reg[2] = (chr_reg[2] & 0xF0) | (V & 0x0F); break;
case 0xA00B: chr_reg[1]=(chr_reg[1]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; case 0xC001: chr_reg[2] = (chr_reg[2] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xC000: chr_reg[2]=(chr_reg[2]&0xF0)|(V&0x0F); break; case 0xC002: chr_reg[3] = (chr_reg[3] & 0xF0) | (V & 0x0F); break;
case 0xC001: chr_reg[2]=(chr_reg[2]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; case 0xC003: chr_reg[3] = (chr_reg[3] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xC002: chr_reg[3]=(chr_reg[3]&0xF0)|(V&0x0F); break; case 0xC008: chr_reg[4] = (chr_reg[4] & 0xF0) | (V & 0x0F); break;
case 0xC003: chr_reg[3]=(chr_reg[3]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; case 0xC009: chr_reg[4] = (chr_reg[4] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xC008: chr_reg[4]=(chr_reg[4]&0xF0)|(V&0x0F); break; case 0xC00A: chr_reg[5] = (chr_reg[5] & 0xF0) | (V & 0x0F); break;
case 0xC009: chr_reg[4]=(chr_reg[4]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; case 0xC00B: chr_reg[5] = (chr_reg[5] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xC00A: chr_reg[5]=(chr_reg[5]&0xF0)|(V&0x0F); break; case 0xE000: chr_reg[6] = (chr_reg[6] & 0xF0) | (V & 0x0F); break;
case 0xC00B: chr_reg[5]=(chr_reg[5]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; case 0xE001: chr_reg[6] = (chr_reg[6] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xE000: chr_reg[6]=(chr_reg[6]&0xF0)|(V&0x0F); break; case 0xE002: chr_reg[7] = (chr_reg[7] & 0xF0) | (V & 0x0F); break;
case 0xE001: chr_reg[6]=(chr_reg[6]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; case 0xE003: chr_reg[7] = (chr_reg[7] & 0x0F) | ((((V & 4) >> 1) | ((V & 2) << 1) | (V & 0x09)) << 4); break;
case 0xE002: chr_reg[7]=(chr_reg[7]&0xF0)|(V&0x0F); break; // case 0x800A: X6502_IRQEnd(FCEU_IQEXT); IRQa=0; break;
case 0xE003: chr_reg[7]=(chr_reg[7]&0x0F)|((((V&4)>>1)|((V&2)<<1)|(V&0x09))<<4); break; // case 0xE00B: X6502_IRQEnd(FCEU_IQEXT); IRQa=IRQCount=V; /*if(scanline<240) IRQCount-=8; else IRQCount+=4;*/ break;
// case 0x800A: X6502_IRQEnd(FCEU_IQEXT); IRQa=0; break; }
// case 0xE00B: X6502_IRQEnd(FCEU_IQEXT); IRQa=IRQCount=V; /*if(scanline<240) IRQCount-=8; else IRQCount+=4;*/ break; Sync();
}
Sync();
} }
static void UNLAX5705Power(void) static void UNLAX5705Power(void) {
{ Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLAX5705Write);
SetWriteHandler(0x8000,0xFFFF,UNLAX5705Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLAX5705_Init(CartInfo *info) void UNLAX5705_Init(CartInfo *info) {
{ info->Power = UNLAX5705Power;
info->Power=UNLAX5705Power; // GameHBIRQHook=UNLAX5705IRQ;
// GameHBIRQHook=UNLAX5705IRQ; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

451
src/boards/bandai.cpp
View File

@ -33,134 +33,115 @@ static uint8 reg[16], is153;
static uint8 IRQa; static uint8 IRQa;
static int16 IRQCount, IRQLatch; static int16 IRQCount, IRQLatch;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 16, "REGS"}, { reg, 16, "REGS" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 2, "IRQC"}, { &IRQCount, 2, "IRQC" },
{&IRQLatch, 2, "IRQL"}, // need for Famicom Jump II - Saikyou no 7 Nin (J) [!] { &IRQLatch, 2, "IRQL" }, // need for Famicom Jump II - Saikyou no 7 Nin (J) [!]
{0} { 0 }
}; };
static void BandaiIRQHook(int a) static void BandaiIRQHook(int a) {
{ if (IRQa) {
if(IRQa) IRQCount -= a;
{ if (IRQCount < 0) {
IRQCount -= a; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount<0) IRQa = 0;
{ IRQCount = -1;
X6502_IRQBegin(FCEU_IQEXT); }
IRQa = 0; }
IRQCount = -1;
}
}
} }
static void BandaiSync(void) static void BandaiSync(void) {
{ if (is153) {
if(is153) int base = (reg[0] & 1) << 4;
{ setchr8(0);
int base=(reg[0]&1)<<4; setprg16(0x8000, (reg[8] & 0x0F) | base);
setchr8(0); setprg16(0xC000, 0x0F | base);
setprg16(0x8000,(reg[8]&0x0F)|base); } else {
setprg16(0xC000,0x0F|base); int i;
} for (i = 0; i < 8; i++) setchr1(i << 10, reg[i]);
else setprg16(0x8000, reg[8]);
{ setprg16(0xC000, ~0);
int i; }
for(i=0; i<8; i++) setchr1(i<<10,reg[i]); switch (reg[9] & 3) {
setprg16(0x8000,reg[8]); case 0: setmirror(MI_V); break;
setprg16(0xC000,~0); case 1: setmirror(MI_H); break;
} case 2: setmirror(MI_0); break;
switch(reg[9]&3) case 3: setmirror(MI_1); break;
{ }
case 0: setmirror(MI_V); break;
case 1: setmirror(MI_H); break;
case 2: setmirror(MI_0); break;
case 3: setmirror(MI_1); break;
}
} }
static DECLFW(BandaiWrite) static DECLFW(BandaiWrite) {
{ A &= 0x0F;
A&=0x0F; if (A < 0x0A) {
if(A<0x0A) reg[A & 0x0F] = V;
{ BandaiSync();
reg[A&0x0F]=V; } else
BandaiSync(); switch (A) {
} case 0x0A: X6502_IRQEnd(FCEU_IQEXT); IRQa = V & 1; IRQCount = IRQLatch; break;
else case 0x0B: IRQLatch &= 0xFF00; IRQLatch |= V; break;
switch(A) case 0x0C: IRQLatch &= 0xFF; IRQLatch |= V << 8; break;
{ case 0x0D: break; // Serial EEPROM control port
case 0x0A: X6502_IRQEnd(FCEU_IQEXT); IRQa=V&1; IRQCount=IRQLatch; break; }
case 0x0B: IRQLatch&=0xFF00; IRQLatch|=V; break;
case 0x0C: IRQLatch&=0xFF; IRQLatch|=V<<8; break;
case 0x0D: break;// Serial EEPROM control port
}
} }
static void BandaiPower(void) static void BandaiPower(void) {
{ BandaiSync();
BandaiSync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x6000, 0xFFFF, BandaiWrite);
SetWriteHandler(0x6000,0xFFFF,BandaiWrite);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ BandaiSync();
BandaiSync();
} }
void Mapper16_Init(CartInfo *info) void Mapper16_Init(CartInfo *info) {
{ is153 = 0;
is153=0; info->Power = BandaiPower;
info->Power=BandaiPower; MapIRQHook = BandaiIRQHook;
MapIRQHook=BandaiIRQHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }
static void M153Power(void) static void M153Power(void) {
{ BandaiSync();
BandaiSync(); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, BandaiWrite);
SetWriteHandler(0x8000,0xFFFF,BandaiWrite);
} }
static void M153Close(void) static void M153Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
void Mapper153_Init(CartInfo *info) void Mapper153_Init(CartInfo *info) {
{ is153 = 1;
is153=1; info->Power = M153Power;
info->Power=M153Power; info->Close = M153Close;
info->Close=M153Close; MapIRQHook = BandaiIRQHook;
MapIRQHook=BandaiIRQHook;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if(info->battery) if (info->battery) {
{ info->SaveGame[0] = WRAM;
info->SaveGame[0]=WRAM; info->SaveGameLen[0] = WRAMSIZE;
info->SaveGameLen[0]=WRAMSIZE; }
}
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }
// Datach Barcode Battler // Datach Barcode Battler
@ -170,182 +151,158 @@ static int BarcodeReadPos;
static int BarcodeCycleCount; static int BarcodeCycleCount;
static uint32 BarcodeOut; static uint32 BarcodeOut;
int FCEUI_DatachSet(const uint8 *rcode) int FCEUI_DatachSet(const uint8 *rcode) {
{ int prefix_parity_type[10][6] = {
int prefix_parity_type[10][6] = { { 0, 0, 0, 0, 0, 0 }, { 0, 0, 1, 0, 1, 1 }, { 0, 0, 1, 1, 0, 1 }, { 0, 0, 1, 1, 1, 0 },
{0,0,0,0,0,0}, {0,0,1,0,1,1}, {0,0,1,1,0,1}, {0,0,1,1,1,0}, { 0, 1, 0, 0, 1, 1 }, { 0, 1, 1, 0, 0, 1 }, { 0, 1, 1, 1, 0, 0 }, { 0, 1, 0, 1, 0, 1 },
{0,1,0,0,1,1}, {0,1,1,0,0,1}, {0,1,1,1,0,0}, {0,1,0,1,0,1}, { 0, 1, 0, 1, 1, 0 }, { 0, 1, 1, 0, 1, 0 }
{0,1,0,1,1,0}, {0,1,1,0,1,0} };
}; int data_left_odd[10][7] = {
int data_left_odd[10][7] = { { 0, 0, 0, 1, 1, 0, 1 }, { 0, 0, 1, 1, 0, 0, 1 }, { 0, 0, 1, 0, 0, 1, 1 }, { 0, 1, 1, 1, 1, 0, 1 },
{0,0,0,1,1,0,1}, {0,0,1,1,0,0,1}, {0,0,1,0,0,1,1}, {0,1,1,1,1,0,1}, { 0, 1, 0, 0, 0, 1, 1 }, { 0, 1, 1, 0, 0, 0, 1 }, { 0, 1, 0, 1, 1, 1, 1 }, { 0, 1, 1, 1, 0, 1, 1 },
{0,1,0,0,0,1,1}, {0,1,1,0,0,0,1}, {0,1,0,1,1,1,1}, {0,1,1,1,0,1,1}, { 0, 1, 1, 0, 1, 1, 1 }, { 0, 0, 0, 1, 0, 1, 1 }
{0,1,1,0,1,1,1}, {0,0,0,1,0,1,1} };
}; int data_left_even[10][7] = {
int data_left_even[10][7] = { { 0, 1, 0, 0, 1, 1, 1 }, { 0, 1, 1, 0, 0, 1, 1 }, { 0, 0, 1, 1, 0, 1, 1 }, { 0, 1, 0, 0, 0, 0, 1 },
{0,1,0,0,1,1,1}, {0,1,1,0,0,1,1}, {0,0,1,1,0,1,1}, {0,1,0,0,0,0,1}, { 0, 0, 1, 1, 1, 0, 1 }, { 0, 1, 1, 1, 0, 0, 1 }, { 0, 0, 0, 0, 1, 0, 1 }, { 0, 0, 1, 0, 0, 0, 1 },
{0,0,1,1,1,0,1}, {0,1,1,1,0,0,1}, {0,0,0,0,1,0,1}, {0,0,1,0,0,0,1}, { 0, 0, 0, 1, 0, 0, 1 }, { 0, 0, 1, 0, 1, 1, 1 }
{0,0,0,1,0,0,1}, {0,0,1,0,1,1,1} };
}; int data_right[10][7] = {
int data_right[10][7] = { { 1, 1, 1, 0, 0, 1, 0 }, { 1, 1, 0, 0, 1, 1, 0 }, { 1, 1, 0, 1, 1, 0, 0 }, { 1, 0, 0, 0, 0, 1, 0 },
{1,1,1,0,0,1,0}, {1,1,0,0,1,1,0}, {1,1,0,1,1,0,0}, {1,0,0,0,0,1,0}, { 1, 0, 1, 1, 1, 0, 0 }, { 1, 0, 0, 1, 1, 1, 0 }, { 1, 0, 1, 0, 0, 0, 0 }, { 1, 0, 0, 0, 1, 0, 0 },
{1,0,1,1,1,0,0}, {1,0,0,1,1,1,0}, {1,0,1,0,0,0,0}, {1,0,0,0,1,0,0}, { 1, 0, 0, 1, 0, 0, 0 }, { 1, 1, 1, 0, 1, 0, 0 }
{1,0,0,1,0,0,0}, {1,1,1,0,1,0,0} };
}; uint8 code[13 + 1];
uint8 code[13+1]; uint32 tmp_p = 0;
uint32 tmp_p=0; int i, j;
int i, j; int len;
int len;
for(i=len=0;i<13;i++) for (i = len = 0; i < 13; i++) {
{ if (!rcode[i]) break;
if(!rcode[i]) break; if ((code[i] = rcode[i] - '0') > 9)
if((code[i]=rcode[i]-'0') > 9) return(0);
return(0); len++;
len++; }
} if (len != 13 && len != 12 && len != 8 && len != 7) return(0);
if(len!=13 && len!=12 && len!=8 && len!=7) return(0);
#define BS(x) BarcodeData[tmp_p]=x;tmp_p++ #define BS(x) BarcodeData[tmp_p] = x; tmp_p++
for(j=0;j<32;j++) for (j = 0; j < 32; j++) {
{ BS(0x00);
BS(0x00); }
}
/* Left guard bars */ /* Left guard bars */
BS(1); BS(0); BS(1); BS(1); BS(0); BS(1);
if(len==13 || len==12) if (len == 13 || len == 12) {
{ uint32 csum;
uint32 csum;
for(i=0;i<6;i++) for (i = 0; i < 6; i++)
if(prefix_parity_type[code[0]][i]) if (prefix_parity_type[code[0]][i]) {
{ for (j = 0; j < 7; j++) {
for(j=0;j<7;j++) BS(data_left_even[code[i + 1]][j]);
{ }
BS(data_left_even[code[i+1]][j]); } else
} for (j = 0; j < 7; j++) {
} BS(data_left_odd[code[i + 1]][j]);
else }
for(j=0;j<7;j++)
{
BS(data_left_odd[code[i+1]][j]);
}
/* Center guard bars */ /* Center guard bars */
BS(0); BS(1); BS(0); BS(1); BS(0); BS(0); BS(1); BS(0); BS(1); BS(0);
for(i=7;i<12;i++) for (i = 7; i < 12; i++)
for(j=0;j<7;j++) for (j = 0; j < 7; j++) {
{ BS(data_right[code[i]][j]);
BS(data_right[code[i]][j]); }
} csum = 0;
csum=0; for (i = 0; i < 12; i++) csum += code[i] * ((i & 1) ? 3 : 1);
for(i=0;i<12;i++) csum+=code[i]*((i&1)?3:1); csum = (10 - (csum % 10)) % 10;
csum=(10-(csum%10))%10; for (j = 0; j < 7; j++) {
for(j=0;j<7;j++) BS(data_right[csum][j]);
{ }
BS(data_right[csum][j]); } else if (len == 8 || len == 7) {
} uint32 csum = 0;
} for (i = 0; i < 7; i++) csum += (i & 1) ? code[i] : (code[i] * 3);
else if(len==8 || len==7)
{
uint32 csum=0;
for(i=0;i<7;i++) csum+=(i&1)?code[i]:(code[i]*3); csum = (10 - (csum % 10)) % 10;
csum=(10-(csum%10))%10; for (i = 0; i < 4; i++)
for (j = 0; j < 7; j++) {
for(i=0;i<4;i++) BS(data_left_odd[code[i]][j]);
for(j=0;j<7;j++) }
{
BS(data_left_odd[code[i]][j]);
}
/* Center guard bars */ /* Center guard bars */
BS(0); BS(1); BS(0); BS(1); BS(0); BS(0); BS(1); BS(0); BS(1); BS(0);
for(i=4;i<7;i++) for (i = 4; i < 7; i++)
for(j=0;j<7;j++) for (j = 0; j < 7; j++) {
{ BS(data_right[code[i]][j]);
BS(data_right[code[i]][j]); }
}
for(j=0;j<7;j++) for (j = 0; j < 7; j++) {
{ BS(data_right[csum][j]);} BS(data_right[csum][j]);
}
}
} /* Right guard bars */
BS(1); BS(0); BS(1);
/* Right guard bars */ for (j = 0; j < 32; j++) {
BS(1); BS(0); BS(1); BS(0x00);
}
for(j=0;j<32;j++) BS(0xFF);
{
BS(0x00);
}
BS(0xFF); #undef BS
#undef BS BarcodeReadPos = 0;
BarcodeOut = 0x8;
BarcodeReadPos=0; BarcodeCycleCount = 0;
BarcodeOut=0x8; return(1);
BarcodeCycleCount=0;
return(1);
} }
static void BarcodeIRQHook(int a) static void BarcodeIRQHook(int a) {
{ BandaiIRQHook(a);
BandaiIRQHook(a);
BarcodeCycleCount+=a; BarcodeCycleCount += a;
if(BarcodeCycleCount >= 1000) if (BarcodeCycleCount >= 1000) {
{ BarcodeCycleCount -= 1000;
BarcodeCycleCount -= 1000; if (BarcodeData[BarcodeReadPos] == 0xFF) {
if(BarcodeData[BarcodeReadPos]==0xFF) BarcodeOut = 0;
{ } else {
BarcodeOut=0; BarcodeOut = (BarcodeData[BarcodeReadPos] ^ 1) << 3;
} BarcodeReadPos++;
else }
{ }
BarcodeOut=(BarcodeData[BarcodeReadPos]^1)<<3;
BarcodeReadPos++;
}
}
} }
static DECLFR(BarcodeRead) static DECLFR(BarcodeRead) {
{ return BarcodeOut;
return BarcodeOut;
} }
static void M157Power(void) static void M157Power(void) {
{ BarcodeData[0] = 0xFF;
BarcodeData[0]=0xFF; BarcodeReadPos = 0;
BarcodeReadPos=0; BarcodeOut = 0;
BarcodeOut=0; BarcodeCycleCount = 0;
BarcodeCycleCount=0;
BandaiSync(); BandaiSync();
SetWriteHandler(0x6000,0xFFFF,BandaiWrite); SetWriteHandler(0x6000, 0xFFFF, BandaiWrite);
SetReadHandler(0x6000,0x7FFF,BarcodeRead); SetReadHandler(0x6000, 0x7FFF, BarcodeRead);
SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
} }
void Mapper157_Init(CartInfo *info) void Mapper157_Init(CartInfo *info) {
{ is153 = 0;
is153=0; info->Power = M157Power;
info->Power=M157Power; MapIRQHook = BarcodeIRQHook;
MapIRQHook=BarcodeIRQHook;
GameInfo->cspecial = SIS_DATACH; GameInfo->cspecial = SIS_DATACH;
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

59
src/boards/bb.cpp
View File

@ -22,47 +22,42 @@
static uint8 reg, chr; static uint8 reg, chr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{&chr, 1, "CHR"}, { &chr, 1, "CHR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x6000, reg & 3);
setprg8(0x6000,reg&3); setprg32(0x8000, ~0);
setprg32(0x8000,~0); setchr8(chr & 3);
setchr8(chr&3);
} }
static DECLFW(UNLBBWrite) static DECLFW(UNLBBWrite) {
{ if ((A & 0x9000) == 0x8000)
if((A & 0x9000) == 0x8000) reg = chr = V;
reg=chr=V; else
else chr = V & 1; // hacky hacky, ProWres simplified FDS conversion 2-in-1 mapper
chr=V&1; // hacky hacky, ProWres simplified FDS conversion 2-in-1 mapper Sync();
Sync();
} }
static void UNLBBPower(void) static void UNLBBPower(void) {
{ chr = 0;
chr = 0; reg = ~0;
reg = ~0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLBBWrite);
SetWriteHandler(0x8000,0xFFFF,UNLBBWrite);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLBB_Init(CartInfo *info) void UNLBB_Init(CartInfo *info) {
{ info->Power = UNLBBPower;
info->Power=UNLBBPower; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

124
src/boards/bmc13in1jy110.cpp
View File

@ -17,7 +17,7 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
* *
* BMC 42-in-1 reset switch * BMC 42-in-1 "reset switch" type
*/ */
#include "mapinc.h" #include "mapinc.h"
@ -25,79 +25,73 @@
static uint8 bank_mode; static uint8 bank_mode;
static uint8 bank_value; static uint8 bank_value;
static uint8 prgb[4]; static uint8 prgb[4];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{0} { &bank_mode, 1, "BNM" },
{ &bank_value, 1, "BMV" },
{ prgb, 4, "PRGB" },
{ 0 }
}; };
static void Sync(void) static void Sync(void) {
{ // FCEU_printf("%02x: %02x %02x\n", bank_mode, bank_value, prgb[0]);
FCEU_printf("%02x: %02x %02x\n", bank_mode, bank_value, prgb[0]); switch (bank_mode & 7) {
switch(bank_mode&7) case 0:
{ setprg32(0x8000, bank_value & 7); break;
case 0: case 1:
setprg32(0x8000,bank_value&7); break; setprg16(0x8000, ((8 + (bank_value & 7)) >> 1) + prgb[1]);
case 1: setprg16(0xC000, (bank_value & 7) >> 1);
setprg16(0x8000,((8+(bank_value&7))>>1)+prgb[1]); case 4:
setprg16(0xC000,(bank_value&7)>>1); setprg32(0x8000, 8 + (bank_value & 7)); break;
case 4: case 5:
setprg32(0x8000,8+(bank_value&7)); break; setprg16(0x8000, ((8 + (bank_value & 7)) >> 1) + prgb[1]);
case 5: setprg16(0xC000, ((8 + (bank_value & 7)) >> 1) + prgb[3]);
setprg16(0x8000,((8+(bank_value&7))>>1)+prgb[1]); case 2:
setprg16(0xC000,((8+(bank_value&7))>>1)+prgb[3]); setprg8(0x8000, prgb[0] >> 2);
case 2: setprg8(0xa000, prgb[1]);
setprg8(0x8000,prgb[0]>>2); setprg8(0xc000, prgb[2]);
setprg8(0xa000,prgb[1]); setprg8(0xe000, ~0);
setprg8(0xc000,prgb[2]); break;
setprg8(0xe000,~0); case 3:
break; setprg8(0x8000, prgb[0]);
case 3: setprg8(0xa000, prgb[1]);
setprg8(0x8000,prgb[0]); setprg8(0xc000, prgb[2]);
setprg8(0xa000,prgb[1]); setprg8(0xe000, prgb[3]);
setprg8(0xc000,prgb[2]); break;
setprg8(0xe000,prgb[3]); }
break;
}
} }
static DECLFW(BMC13in1JY110Write) static DECLFW(BMC13in1JY110Write) {
{ // FCEU_printf("%04x:%04x\n",A,V);
FCEU_printf("%04x:%04x\n",A,V); switch (A) {
switch(A) case 0x8000:
{ case 0x8001:
case 0x8000: case 0x8002:
case 0x8001: case 0x8003: prgb[A & 3] = V; break;
case 0x8002: case 0xD000: bank_mode = V; break;
case 0x8003: prgb[A&3]=V; break; case 0xD001: setmirror(V & 3);
case 0xD000: bank_mode=V; break; case 0xD002: break;
case 0xD001: setmirror(V&3); case 0xD003: bank_value = V; break;
case 0xD002: break; }
case 0xD003: bank_value=V; break; Sync();
}
Sync();
} }
static void BMC13in1JY110Power(void) static void BMC13in1JY110Power(void) {
{ prgb[0] = prgb[1] = prgb[2] = prgb[3] = 0;
prgb[0]=prgb[1]=prgb[2]=prgb[3]=0; bank_mode = 0;
bank_mode=0; bank_value = 0;
bank_value=0; setprg32(0x8000, 0);
setprg32(0x8000,0); setchr8(0);
setchr8(0); SetWriteHandler(0x8000, 0xFFFF, BMC13in1JY110Write);
SetWriteHandler(0x8000,0xFFFF,BMC13in1JY110Write); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void BMC13in1JY110_Init(CartInfo *info) void BMC13in1JY110_Init(CartInfo *info) {
{ info->Power = BMC13in1JY110Power;
info->Power=BMC13in1JY110Power; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0); GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
} }

92
src/boards/bmc64in1nr.cpp
View File

@ -24,70 +24,60 @@
static uint8 regs[4]; static uint8 regs[4];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{regs, 4, "REGS"}, { regs, 4, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ if (regs[0] & 0x80) {
if(regs[0]&0x80) if (regs[1] & 0x80)
{ setprg32(0x8000, regs[1] & 0x1F);
if(regs[1]&0x80) else{
setprg32(0x8000,regs[1]&0x1F); int bank = ((regs[1] & 0x1f) << 1) | ((regs[1] >> 6) & 1);
else setprg16(0x8000, bank);
{ setprg16(0xC000, bank);
int bank=((regs[1]&0x1f)<<1)|((regs[1]>>6)&1); }
setprg16(0x8000,bank); } else {
setprg16(0xC000,bank); int bank = ((regs[1] & 0x1f) << 1) | ((regs[1] >> 6) & 1);
} setprg16(0xC000, bank);
} }
else if (regs[0] & 0x20)
{ setmirror(MI_H);
int bank=((regs[1]&0x1f)<<1)|((regs[1]>>6)&1); else
setprg16(0xC000,bank); setmirror(MI_V);
} setchr8((regs[2] << 2) | ((regs[0] >> 1) & 3));
if(regs[0]&0x20)
setmirror(MI_H);
else
setmirror(MI_V);
setchr8((regs[2]<<2)|((regs[0]>>1)&3));
} }
static DECLFW(BMC64in1nrWriteLo) static DECLFW(BMC64in1nrWriteLo) {
{ regs[A & 3] = V;
regs[A&3]=V; Sync();
Sync();
} }
static DECLFW(BMC64in1nrWriteHi) static DECLFW(BMC64in1nrWriteHi) {
{ regs[3] = V;
regs[3]=V; Sync();
Sync();
} }
static void BMC64in1nrPower(void) static void BMC64in1nrPower(void) {
{ regs[0] = 0x80;
regs[0]=0x80; regs[1] = 0x43;
regs[1]=0x43; regs[2] = regs[3] = 0;
regs[2]=regs[3]=0; Sync();
Sync(); SetWriteHandler(0x5000, 0x5003, BMC64in1nrWriteLo);
SetWriteHandler(0x5000,0x5003,BMC64in1nrWriteLo); SetWriteHandler(0x8000, 0xFFFF, BMC64in1nrWriteHi);
SetWriteHandler(0x8000,0xFFFF,BMC64in1nrWriteHi); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void BMC64in1nr_Init(CartInfo *info) void BMC64in1nr_Init(CartInfo *info) {
{ info->Power = BMC64in1nrPower;
info->Power=BMC64in1nrPower; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0); GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
} }

159
src/boards/bmc70in1.cpp
View File

@ -26,105 +26,96 @@ static uint8 prg_bank;
static uint8 chr_bank; static uint8 chr_bank;
static uint8 bank_mode; static uint8 bank_mode;
static uint8 mirroring; static uint8 mirroring;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&large_bank, 1, "LB"}, { &large_bank, 1, "LB" },
{&hw_switch, 1, "DPSW"}, { &hw_switch, 1, "DPSW" },
{&prg_bank, 1, "PRG"}, { &prg_bank, 1, "PRG" },
{&chr_bank, 1, "CHR"}, { &chr_bank, 1, "CHR" },
{&bank_mode, 1, "BM"}, { &bank_mode, 1, "BM" },
{&mirroring, 1, "MIRR"}, { &mirroring, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ switch (bank_mode) {
switch (bank_mode) case 0x00:
{ case 0x10:
case 0x00: setprg16(0x8000, large_bank | prg_bank);
case 0x10: setprg16(0x8000,large_bank|prg_bank); setprg16(0xC000, large_bank | 7);
setprg16(0xC000,large_bank|7); break;
break; case 0x20:
case 0x20: setprg32(0x8000,(large_bank|prg_bank)>>1); setprg32(0x8000, (large_bank | prg_bank) >> 1);
break; break;
case 0x30: setprg16(0x8000,large_bank|prg_bank); case 0x30:
setprg16(0xC000,large_bank|prg_bank); setprg16(0x8000, large_bank | prg_bank);
break; setprg16(0xC000, large_bank | prg_bank);
} break;
setmirror(mirroring); }
if(!is_large_banks) setmirror(mirroring);
setchr8(chr_bank); if (!is_large_banks)
setchr8(chr_bank);
} }
static DECLFR(BMC70in1Read) static DECLFR(BMC70in1Read) {
{ if (bank_mode == 0x10)
if(bank_mode==0x10) // if(is_large_banks)
// if(is_large_banks) return CartBR((A & 0xFFF0) | hw_switch);
return CartBR((A&0xFFF0)|hw_switch); // else
// else // return CartBR((A&0xFFF0)|hw_switch);
// return CartBR((A&0xFFF0)|hw_switch); else
else return CartBR(A);
return CartBR(A);
} }
static DECLFW(BMC70in1Write) static DECLFW(BMC70in1Write) {
{ if (A & 0x4000) {
if(A&0x4000) bank_mode = A & 0x30;
{ prg_bank = A & 7;
bank_mode=A&0x30; } else {
prg_bank=A&7; mirroring = ((A & 0x20) >> 5) ^ 1;
} if (is_large_banks)
else large_bank = (A & 3) << 3;
{ else
mirroring=((A&0x20)>>5)^1; chr_bank = A & 7;
if(is_large_banks) }
large_bank=(A&3)<<3; Sync();
else
chr_bank=A&7;
}
Sync();
} }
static void BMC70in1Reset(void) static void BMC70in1Reset(void) {
{ bank_mode = 0;
bank_mode=0; large_bank = 0;
large_bank=0; Sync();
Sync(); hw_switch++;
hw_switch++; hw_switch &= 0xf;
hw_switch&=0xf;
} }
static void BMC70in1Power(void) static void BMC70in1Power(void) {
{ setchr8(0);
setchr8(0); bank_mode = 0;
bank_mode=0; large_bank = 0;
large_bank=0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, BMC70in1Read);
SetReadHandler(0x8000,0xFFFF,BMC70in1Read); SetWriteHandler(0x8000, 0xffff, BMC70in1Write);
SetWriteHandler(0x8000,0xffff,BMC70in1Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void BMC70in1_Init(CartInfo *info) void BMC70in1_Init(CartInfo *info) {
{ is_large_banks = 0;
is_large_banks=0; hw_switch = 0xd;
hw_switch=0xd; info->Power = BMC70in1Power;
info->Power=BMC70in1Power; info->Reset = BMC70in1Reset;
info->Reset=BMC70in1Reset; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }
void BMC70in1B_Init(CartInfo *info) void BMC70in1B_Init(CartInfo *info) {
{ is_large_banks = 1;
is_large_banks=1; hw_switch = 0x6;
hw_switch=0x6; info->Power = BMC70in1Power;
info->Power=BMC70in1Power; info->Reset = BMC70in1Reset;
info->Reset=BMC70in1Reset; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

83
src/boards/bonza.cpp
View File

@ -24,15 +24,21 @@
static uint8 prg_reg; static uint8 prg_reg;
static uint8 chr_reg; static uint8 chr_reg;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&prg_reg, 1, "PREG"}, { &prg_reg, 1, "PREG" },
{&chr_reg, 1, "CREG"}, { &chr_reg, 1, "CREG" },
{0} { 0 }
}; };
/* /*
cmd[0] = response on/off
0x00 - on
0x80 - off
cmd[1] = cmd
_GET_CHALLENGE: .BYTE 0,$B4, 0, 0,$62 _GET_CHALLENGE: .BYTE 0,$B4, 0, 0,$62
_SELECT_FILE_1_0200: .BYTE 0,$A4, 1, 0, 2, 2, 0 _SELECT_FILE_1_0200: .BYTE 0,$A4, 1, 0, 2, 2, 0
@ -78,55 +84,50 @@ byte_8C29: .BYTE 0,$76, 0, 0, 8
byte_8CC6: .BYTE 0,$78, 0, 0,$12 byte_8CC6: .BYTE 0,$78, 0, 0,$12
*/ */
static uint8 sim0reset[0x1F] = { 0x3B, 0xE9, 0x00, 0xFF, 0xC1, 0x10, 0x31, 0xFE, static uint8 sim0reset[0x1F] = {
0x55, 0xC8, 0x10, 0x20, 0x55, 0x47, 0x4F, 0x53, 0x3B, 0xE9, 0x00, 0xFF, 0xC1, 0x10, 0x31, 0xFE,
0x56, 0x53, 0x43, 0xAD, 0x10, 0x10, 0x10, 0x10, 0x55, 0xC8, 0x10, 0x20, 0x55, 0x47, 0x4F, 0x53,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10 }; 0x56, 0x53, 0x43, 0xAD, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10
};
static void Sync(void) static void Sync(void) {
{ setprg32(0x8000, prg_reg);
setprg32(0x8000, prg_reg); setchr8(chr_reg);
setchr8(chr_reg);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
static DECLFW(M216WriteHi) static DECLFW(M216WriteHi) {
{ prg_reg = A & 1;
prg_reg=A&1; chr_reg = (A & 0x0E) >> 1;
chr_reg=(A&0x0E)>>1; Sync();
Sync();
} }
static DECLFW(M216Write5000) static DECLFW(M216Write5000) {
{ // FCEU_printf("WRITE: %04x:%04x (PC=%02x cnt=%02x)\n",A,V,X.PC,sim0bcnt);
// FCEU_printf("WRITE: %04x:%04x (PC=%02x cnt=%02x)\n",A,V,X.PC,sim0bcnt);
} }
static DECLFR(M216Read5000) static DECLFR(M216Read5000) {
{ // FCEU_printf("READ: %04x PC=%04x out=%02x byte=%02x cnt=%02x bit=%02x\n",A,X.PC,sim0out,sim0byte,sim0bcnt,sim0bit);
// FCEU_printf("READ: %04x PC=%04x out=%02x byte=%02x cnt=%02x bit=%02x\n",A,X.PC,sim0out,sim0byte,sim0bcnt,sim0bit); return 0;
return 0;
} }
static void Power(void) static void Power(void) {
{ prg_reg = 0;
prg_reg = 0; chr_reg = 0;
chr_reg = 0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M216WriteHi);
SetWriteHandler(0x8000,0xFFFF,M216WriteHi); SetWriteHandler(0x5000, 0x5000, M216Write5000);
SetWriteHandler(0x5000,0x5000,M216Write5000); SetReadHandler(0x5000, 0x5000, M216Read5000);
SetReadHandler(0x5000,0x5000,M216Read5000);
} }
void Mapper216_Init(CartInfo *info) void Mapper216_Init(CartInfo *info) {
{ info->Power = Power;
info->Power=Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

95
src/boards/bs-5.cpp
View File

@ -24,68 +24,61 @@ static uint8 reg_prg[4];
static uint8 reg_chr[4]; static uint8 reg_chr[4];
static uint8 dip_switch; static uint8 dip_switch;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg_prg, 4, "PREG"}, { reg_prg, 4, "PREG" },
{reg_chr, 4, "CREG"}, { reg_chr, 4, "CREG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x8000, reg_prg[0]);
setprg8(0x8000,reg_prg[0]); setprg8(0xa000, reg_prg[1]);
setprg8(0xa000,reg_prg[1]); setprg8(0xc000, reg_prg[2]);
setprg8(0xc000,reg_prg[2]); setprg8(0xe000, reg_prg[3]);
setprg8(0xe000,reg_prg[3]); setchr2(0x0000, reg_chr[0]);
setchr2(0x0000,reg_chr[0]); setchr2(0x0800, reg_chr[1]);
setchr2(0x0800,reg_chr[1]); setchr2(0x1000, reg_chr[2]);
setchr2(0x1000,reg_chr[2]); setchr2(0x1800, reg_chr[3]);
setchr2(0x1800,reg_chr[3]); setmirror(MI_V);
setmirror(MI_V);
} }
static DECLFW(MBS5Write) static DECLFW(MBS5Write) {
{ int bank_sel = (A & 0xC00) >> 10;
int bank_sel = (A&0xC00)>>10; switch (A & 0xF000) {
switch (A&0xF000) case 0x8000:
{ reg_chr[bank_sel] = A & 0x1F;
case 0x8000: break;
reg_chr[bank_sel]=A&0x1F; case 0xA000:
break; if (A & (1 << (dip_switch + 4)))
case 0xA000: reg_prg[bank_sel] = A & 0x0F;
if(A&(1<<(dip_switch+4))) break;
reg_prg[bank_sel]=A&0x0F; }
break; Sync();
}
Sync();
} }
static void MBS5Reset(void) static void MBS5Reset(void) {
{ dip_switch++;
dip_switch++; dip_switch &= 3;
dip_switch&=3; reg_prg[0] = reg_prg[1] = reg_prg[2] = reg_prg[3] = ~0;
reg_prg[0]=reg_prg[1]=reg_prg[2]=reg_prg[3]=~0; Sync();
Sync();
} }
static void MBS5Power(void) static void MBS5Power(void) {
{ dip_switch = 0;
dip_switch=0; reg_prg[0] = reg_prg[1] = reg_prg[2] = reg_prg[3] = ~0;
reg_prg[0]=reg_prg[1]=reg_prg[2]=reg_prg[3]=~0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, MBS5Write);
SetWriteHandler(0x8000,0xFFFF,MBS5Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void BMCBS5_Init(CartInfo *info) void BMCBS5_Init(CartInfo *info) {
{ info->Power = MBS5Power;
info->Power=MBS5Power; info->Reset = MBS5Reset;
info->Reset=MBS5Reset; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

119
src/boards/dance2000.cpp
View File

@ -16,93 +16,88 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* Dance 2000 12-in-1
*
*/ */
#include "mapinc.h" #include "mapinc.h"
static uint8 prg, mirr, prgmode; static uint8 prg, mirr, prgmode;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&prg, 1, "REGS"}, { &prg, 1, "REGS" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{&prgmode, 1, "MIRR"}, { &prgmode, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setmirror(mirr);
setmirror(mirr); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setchr8(0);
setchr8(0); if (prgmode)
if(prgmode) setprg32(0x8000, prg & 7);
setprg32(0x8000,prg&7); else {
else { setprg16(0x8000, prg & 0x0f);
setprg16(0x8000,prg&0x0f); setprg16(0xC000, 0);
setprg16(0xC000,0); }
}
} }
static DECLFW(UNLD2000Write) static DECLFW(UNLD2000Write) {
{ // FCEU_printf("write %04x:%04x\n",A,V);
// FCEU_printf("write %04x:%04x\n",A,V); switch (A) {
switch(A) { case 0x5000: prg = V; Sync(); break;
case 0x5000: prg = V; Sync(); break; case 0x5200: mirr = (V & 1) ^ 1; prgmode = V & 4; Sync(); break;
case 0x5200: mirr = (V & 1)^1; prgmode = V & 4; Sync(); break; // default: FCEU_printf("write %04x:%04x\n",A,V);
// default: FCEU_printf("write %04x:%04x\n",A,V); }
}
} }
static DECLFR(UNLD2000Read) static DECLFR(UNLD2000Read) {
{ if (prg & 0x40)
if(prg & 0x40) return X.DB;
return X.DB; else
else return CartBR(A);
return CartBR(A);
} }
static void UNLD2000Power(void) static void UNLD2000Power(void) {
{ prg = prgmode = 0;
prg = prgmode = 0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetReadHandler(0x8000, 0xFFFF, UNLD2000Read);
SetReadHandler(0x8000,0xFFFF,UNLD2000Read); SetWriteHandler(0x4020, 0x5FFF, UNLD2000Write);
SetWriteHandler(0x4020,0x5FFF,UNLD2000Write);
} }
static void UNLAX5705IRQ(void) static void UNLAX5705IRQ(void) {
{ if (scanline > 174) setchr4(0x0000, 1);
if(scanline > 174) setchr4(0x0000,1); else setchr4(0x0000, 0);
else setchr4(0x0000,0);
} }
static void UNLD2000Close(void) static void UNLD2000Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLD2000_Init(CartInfo *info) void UNLD2000_Init(CartInfo *info) {
{ info->Power = UNLD2000Power;
info->Power=UNLD2000Power; info->Close = UNLD2000Close;
info->Close=UNLD2000Close; GameHBIRQHook = UNLAX5705IRQ;
GameHBIRQHook=UNLAX5705IRQ; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

41
src/boards/dream.cpp
View File

@ -22,35 +22,30 @@
static uint8 latche; static uint8 latche;
static void Sync(void) static void Sync(void) {
{ setprg16(0x8000, latche);
setprg16(0x8000,latche); setprg16(0xC000, 8);
setprg16(0xC000,8);
} }
static DECLFW(DREAMWrite) static DECLFW(DREAMWrite) {
{ latche = V & 7;
latche=V&7; Sync();
Sync();
} }
static void DREAMPower(void) static void DREAMPower(void) {
{ latche = 0;
latche=0; Sync();
Sync(); setchr8(0);
setchr8(0); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x5020, 0x5020, DREAMWrite);
SetWriteHandler(0x5020,0x5020,DREAMWrite);
} }
static void Restore(int version) static void Restore(int version) {
{ Sync();
Sync();
} }
void DreamTech01_Init(CartInfo *info) void DreamTech01_Init(CartInfo *info) {
{ GameStateRestore = Restore;
GameStateRestore=Restore; info->Power = DREAMPower;
info->Power=DREAMPower; AddExState(&latche, 1, 0, "LATC");
AddExState(&latche, 1, 0, "LATC");
} }

83
src/boards/edu2000.cpp
View File

@ -21,64 +21,57 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint8 reg; static uint8 reg;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr8(0);
setchr8(0); setprg8r(0x10, 0x6000, (reg & 0xC0) >> 6);
setprg8r(0x10,0x6000,(reg&0xC0)>>6); setprg32(0x8000, reg & 0x1F);
setprg32(0x8000,reg&0x1F); // setmirror(((reg&0x20)>>5));
// setmirror(((reg&0x20)>>5));
} }
static DECLFW(UNLEDU2000HiWrite) static DECLFW(UNLEDU2000HiWrite) {
{ // FCEU_printf("%04x:%02x\n",A,V);
// FCEU_printf("%04x:%02x\n",A,V); reg = V;
reg=V; Sync();
Sync();
} }
static void UNLEDU2000Power(void) static void UNLEDU2000Power(void) {
{ setmirror(MI_0);
setmirror(MI_0); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x6000, 0xFFFF, CartBW);
SetWriteHandler(0x6000,0xFFFF,CartBW); SetWriteHandler(0x8000, 0xFFFF, UNLEDU2000HiWrite);
SetWriteHandler(0x8000,0xFFFF,UNLEDU2000HiWrite); reg = 0;
reg=0; Sync();
Sync();
} }
static void UNLEDU2000Close(void) static void UNLEDU2000Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void UNLEDU2000Restore(int version) static void UNLEDU2000Restore(int version) {
{ Sync();
Sync();
} }
void UNLEDU2000_Init(CartInfo *info) void UNLEDU2000_Init(CartInfo *info) {
{ info->Power = UNLEDU2000Power;
info->Power=UNLEDU2000Power; info->Close = UNLEDU2000Close;
info->Close=UNLEDU2000Close; GameStateRestore = UNLEDU2000Restore;
GameStateRestore=UNLEDU2000Restore; WRAM = (uint8*)FCEU_gmalloc(32768);
WRAM=(uint8*)FCEU_gmalloc(32768); SetupCartPRGMapping(0x10, WRAM, 32768, 1);
SetupCartPRGMapping(0x10,WRAM,32768,1); if (info->battery) {
if(info->battery) info->SaveGame[0] = WRAM;
{ info->SaveGameLen[0] = 32768;
info->SaveGame[0]=WRAM; }
info->SaveGameLen[0]=32768; AddExState(WRAM, 32768, 0, "WRAM");
} AddExState(StateRegs, ~0, 0, 0);
AddExState(WRAM, 32768, 0, "WRAM");
AddExState(StateRegs, ~0, 0, 0);
} }

135
src/boards/famicombox.cpp
View File

@ -24,101 +24,92 @@ static uint8 regs[8];
static uint8 *WRAM = NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{regs, 8, "REGS"}, { regs, 8, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg2r(0x10, 0x0800, 0);
setprg2r(0x10,0x0800,0); setprg2r(0x10, 0x1000, 1);
setprg2r(0x10,0x1000,1); setprg2r(0x10, 0x1800, 2);
setprg2r(0x10,0x1800,2); setprg8r(0x10, 0x6000, 1);
setprg8r(0x10,0x6000,1); setprg16(0x8000, 0);
setprg16(0x8000,0); setprg16(0xC000, ~0);
setprg16(0xC000,~0); setchr8(0);
setchr8(0);
} }
//static DECLFW(SSSNROMWrite) //static DECLFW(SSSNROMWrite)
//{ //{
// CartBW(A,V); // CartBW(A,V);
//} //}
static DECLFW(SSSNROMWrite) static DECLFW(SSSNROMWrite) {
{ // FCEU_printf("write %04x %02x\n",A,V);
//FCEU_printf("write %04x %02x\n",A,V); // regs[A&7] = V;
//regs[A&7] = V;
} }
static DECLFR(SSSNROMRead) static DECLFR(SSSNROMRead) {
{ // FCEU_printf("read %04x\n",A);
//FCEU_printf("read %04x\n",A); switch (A & 7) {
switch(A&7) { case 0: return regs[0] = 0xff; // clear all exceptions
case 0: return regs[0]=0xff; // clear all exceptions case 2: return 0xc0; // DIP selftest + freeplay
case 2: return 0xc0; // DIP selftest + freeplay case 3: return 0x00; // 0, 1 - attract
case 3: return 0x00; // 0, 1 - attract // 2
// 2 // 4 - menu
// 4 - menu // 8 - self check and game casette check
// 8 - self check and game casette check // 10 - lock?
// 10 - lock? // 20 - game title & count display
// 20 - game title & count display case 7: return 0x22; // TV type, key not turned, relay B
case 7: return 0x22; // TV type, key not turned, relay B default: return 0;
default: return 0; }
}
} }
static void SSSNROMPower(void) static void SSSNROMPower(void) {
{ regs[0] = regs[1] = regs[2] = regs[3] = regs[4] = regs[5] = regs[6] = 0;
regs[0]=regs[1]=regs[2]=regs[3]=regs[4]=regs[5]=regs[6]=0; regs[7] = 0xff;
regs[7]=0xff; Sync();
Sync(); memset(WRAM, 0x00, WRAMSIZE);
memset(WRAM,0x00,WRAMSIZE); // SetWriteHandler(0x0000,0x1FFF,SSSNROMRamWrite);
// SetWriteHandler(0x0000,0x1FFF,SSSNROMRamWrite); SetReadHandler(0x0800, 0x1FFF, CartBR);
SetReadHandler(0x0800,0x1FFF,CartBR); SetWriteHandler(0x0800, 0x1FFF, CartBW);
SetWriteHandler(0x0800,0x1FFF,CartBW); SetReadHandler(0x5000, 0x5FFF, SSSNROMRead);
SetReadHandler(0x5000,0x5FFF,SSSNROMRead); SetWriteHandler(0x5000, 0x5FFF, SSSNROMWrite);
SetWriteHandler(0x5000,0x5FFF,SSSNROMWrite); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
} }
static void SSSNROMReset(void) static void SSSNROMReset(void) {
{ regs[1] = regs[2] = regs[3] = regs[4] = regs[5] = regs[6] = 0;
regs[1]=regs[2]=regs[3]=regs[4]=regs[5]=regs[6]=0;
} }
static void SSSNROMClose(void) static void SSSNROMClose(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void SSSNROMIRQHook(void) static void SSSNROMIRQHook(void) {
{ // X6502_IRQBegin(FCEU_IQEXT);
// X6502_IRQBegin(FCEU_IQEXT);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void SSSNROM_Init(CartInfo *info) void SSSNROM_Init(CartInfo *info) {
{ info->Reset = SSSNROMReset;
info->Reset=SSSNROMReset; info->Power = SSSNROMPower;
info->Power=SSSNROMPower; info->Close = SSSNROMClose;
info->Close=SSSNROMClose; GameHBIRQHook = SSSNROMIRQHook;
GameHBIRQHook=SSSNROMIRQHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=16384; WRAMSIZE = 16384;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

108
src/boards/ghostbusters63in1.cpp
View File

@ -22,85 +22,75 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[2], bank; static uint8 reg[2], bank;
static uint8 banks[4] = {0, 0, 1, 2}; static uint8 banks[4] = { 0, 0, 1, 2 };
static uint8 *CHRROM=NULL; static uint8 *CHRROM = NULL;
static uint32 CHRROMSIZE; static uint32 CHRROMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 2, "REGS"}, { reg, 2, "REGS" },
{&bank, 1, "BANK"}, { &bank, 1, "BANK" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ if (reg[0] & 0x20) {
if(reg[0]&0x20) setprg16r(banks[bank], 0x8000, reg[0] & 0x1F);
{ setprg16r(banks[bank], 0xC000, reg[0] & 0x1F);
setprg16r(banks[bank],0x8000,reg[0]&0x1F); } else
setprg16r(banks[bank],0xC000,reg[0]&0x1F); setprg32r(banks[bank], 0x8000, (reg[0] >> 1) & 0x0F);
} if (reg[1] & 2)
else setchr8r(0x10, 0);
setprg32r(banks[bank],0x8000,(reg[0]>>1)&0x0F); else
if(reg[1]&2) setchr8(0);
setchr8r(0x10,0); setmirror((reg[0] & 0x40) >> 6);
else
setchr8(0);
setmirror((reg[0]&0x40)>>6);
} }
static DECLFW(BMCGhostbusters63in1Write) static DECLFW(BMCGhostbusters63in1Write) {
{ reg[A & 1] = V;
reg[A&1]=V; bank = ((reg[0] & 0x80) >> 7) | ((reg[1] & 1) << 1);
bank=((reg[0]&0x80)>>7)|((reg[1]&1)<<1);
// FCEU_printf("reg[0]=%02x, reg[1]=%02x, bank=%02x\n",reg[0],reg[1],bank); // FCEU_printf("reg[0]=%02x, reg[1]=%02x, bank=%02x\n",reg[0],reg[1],bank);
Sync(); Sync();
} }
static DECLFR(BMCGhostbusters63in1Read) static DECLFR(BMCGhostbusters63in1Read) {
{ if (bank == 1)
if(bank==1) return X.DB;
return X.DB; else
else return CartBR(A);
return CartBR(A);
} }
static void BMCGhostbusters63in1Power(void) static void BMCGhostbusters63in1Power(void) {
{ reg[0] = reg[1] = 0;
reg[0]=reg[1]=0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, BMCGhostbusters63in1Read);
SetReadHandler(0x8000,0xFFFF,BMCGhostbusters63in1Read); SetWriteHandler(0x8000, 0xFFFF, BMCGhostbusters63in1Write);
SetWriteHandler(0x8000,0xFFFF,BMCGhostbusters63in1Write);
} }
static void BMCGhostbusters63in1Reset(void) static void BMCGhostbusters63in1Reset(void) {
{ reg[0] = reg[1] = 0;
reg[0]=reg[1]=0;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
static void BMCGhostbusters63in1Close(void) static void BMCGhostbusters63in1Close(void) {
{ if (CHRROM)
if(CHRROM) FCEU_gfree(CHRROM);
FCEU_gfree(CHRROM); CHRROM = NULL;
CHRROM=NULL;
} }
void BMCGhostbusters63in1_Init(CartInfo *info) void BMCGhostbusters63in1_Init(CartInfo *info) {
{ info->Reset = BMCGhostbusters63in1Reset;
info->Reset=BMCGhostbusters63in1Reset; info->Power = BMCGhostbusters63in1Power;
info->Power=BMCGhostbusters63in1Power; info->Close = BMCGhostbusters63in1Close;
info->Close=BMCGhostbusters63in1Close;
CHRROMSIZE=8192; // dummy CHRROM, VRAM disable CHRROMSIZE = 8192; // dummy CHRROM, VRAM disable
CHRROM=(uint8*)FCEU_gmalloc(CHRROMSIZE); CHRROM = (uint8*)FCEU_gmalloc(CHRROMSIZE);
SetupCartPRGMapping(0x10,CHRROM,CHRROMSIZE,0); SetupCartPRGMapping(0x10, CHRROM, CHRROMSIZE, 0);
AddExState(CHRROM, CHRROMSIZE, 0, "CROM"); AddExState(CHRROM, CHRROMSIZE, 0, "CROM");
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

58
src/boards/gs-2004.cpp
View File

@ -21,49 +21,43 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg, mirr; static uint8 reg, mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REGS"}, { &reg, 1, "REGS" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8r(1, 0x6000, 0);
setprg8r(1,0x6000,0); setprg32(0x8000, reg);
setprg32(0x8000,reg); setchr8(0);
setchr8(0);
} }
static DECLFW(BMCGS2004Write) static DECLFW(BMCGS2004Write) {
{ reg = V;
reg=V; Sync();
Sync();
} }
static void BMCGS2004Power(void) static void BMCGS2004Power(void) {
{ reg = ~0;
reg=~0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, BMCGS2004Write);
SetWriteHandler(0x8000,0xFFFF,BMCGS2004Write);
} }
static void BMCGS2004Reset(void) static void BMCGS2004Reset(void) {
{ reg = ~0;
reg=~0;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void BMCGS2004_Init(CartInfo *info) void BMCGS2004_Init(CartInfo *info) {
{ info->Reset = BMCGS2004Reset;
info->Reset=BMCGS2004Reset; info->Power = BMCGS2004Power;
info->Power=BMCGS2004Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

58
src/boards/gs-2013.cpp
View File

@ -21,49 +21,43 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg, mirr; static uint8 reg, mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REGS"}, { &reg, 1, "REGS" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8r(0, 0x6000, ~0);
setprg8r(0,0x6000,~0); setprg32r((reg & 8) >> 3, 0x8000, reg);
setprg32r((reg&8)>>3,0x8000,reg); setchr8(0);
setchr8(0);
} }
static DECLFW(BMCGS2013Write) static DECLFW(BMCGS2013Write) {
{ reg = V;
reg=V; Sync();
Sync();
} }
static void BMCGS2013Power(void) static void BMCGS2013Power(void) {
{ reg = ~0;
reg=~0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, BMCGS2013Write);
SetWriteHandler(0x8000,0xFFFF,BMCGS2013Write);
} }
static void BMCGS2013Reset(void) static void BMCGS2013Reset(void) {
{ reg = ~0;
reg=~0;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void BMCGS2013_Init(CartInfo *info) void BMCGS2013_Init(CartInfo *info) {
{ info->Reset = BMCGS2013Reset;
info->Reset=BMCGS2013Reset; info->Power = BMCGS2013Power;
info->Power=BMCGS2013Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

82
src/boards/h2288.cpp
View File

@ -23,58 +23,48 @@
extern uint8 m114_perm[8]; extern uint8 m114_perm[8];
static void H2288PW(uint32 A, uint8 V) static void H2288PW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & 0x40) {
if(EXPREGS[0]&0x40) uint8 bank = (EXPREGS[0] & 5) | ((EXPREGS[0] & 8) >> 2) | ((EXPREGS[0] & 0x20) >> 2);
{ if (EXPREGS[0] & 2)
uint8 bank=(EXPREGS[0]&5)|((EXPREGS[0]&8)>>2)|((EXPREGS[0]&0x20)>>2); setprg32(0x8000, bank >> 1);
if(EXPREGS[0]&2) else{
setprg32(0x8000,bank>>1); setprg16(0x8000, bank);
else setprg16(0xC000, bank);
{ }
setprg16(0x8000,bank); } else
setprg16(0xC000,bank); setprg8(A, V & 0x3F);
}
}
else
setprg8(A,V&0x3F);
} }
static DECLFW(H2288WriteHi) static DECLFW(H2288WriteHi) {
{ switch (A & 0x8001) {
switch (A&0x8001) case 0x8000: MMC3_CMDWrite(0x8000, (V & 0xC0) | (m114_perm[V & 7])); break;
{ case 0x8001: MMC3_CMDWrite(0x8001, V); break;
case 0x8000: MMC3_CMDWrite(0x8000,(V&0xC0)|(m114_perm[V&7])); break; }
case 0x8001: MMC3_CMDWrite(0x8001,V); break;
}
} }
static DECLFW(H2288WriteLo) static DECLFW(H2288WriteLo) {
{ if (A & 0x800) {
if(A&0x800) if (A & 1)
{ EXPREGS[1] = V;
if(A&1) else
EXPREGS[1]=V; EXPREGS[0] = V;
else FixMMC3PRG(MMC3_cmd);
EXPREGS[0]=V; }
FixMMC3PRG(MMC3_cmd);
}
} }
static void H2288Power(void) static void H2288Power(void) {
{ EXPREGS[0] = EXPREGS[1] = 0;
EXPREGS[0]=EXPREGS[1]=0; GenMMC3Power();
GenMMC3Power(); // SetReadHandler(0x5000,0x5FFF,H2288Read);
// SetReadHandler(0x5000,0x5FFF,H2288Read); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x5000, 0x5FFF, H2288WriteLo);
SetWriteHandler(0x5000,0x5FFF,H2288WriteLo); SetWriteHandler(0x8000, 0x9FFF, H2288WriteHi);
SetWriteHandler(0x8000,0x9FFF,H2288WriteHi);
} }
void UNLH2288_Init(CartInfo *info) void UNLH2288_Init(CartInfo *info) {
{ GenMMC3_Init(info, 256, 256, 0, 0);
GenMMC3_Init(info, 256, 256, 0, 0); pwrap = H2288PW;
pwrap=H2288PW; info->Power = H2288Power;
info->Power=H2288Power; AddExState(EXPREGS, 2, 0, "EXPR");
AddExState(EXPREGS, 2, 0, "EXPR");
} }

62
src/boards/karaoke.cpp
View File

@ -23,49 +23,41 @@
extern uint32 ROM_size; extern uint32 ROM_size;
static uint8 latche; static uint8 latche;
static void Sync(void) static void Sync(void) {
{ if (latche) {
if(latche) if (latche & 0x10)
{ setprg16(0x8000, (latche & 7));
if(latche&0x10) else
setprg16(0x8000,(latche&7)); setprg16(0x8000, (latche & 7) | 8);
else } else
setprg16(0x8000,(latche&7)|8); setprg16(0x8000, 7 + (ROM_size >> 4));
}
else
setprg16(0x8000,7+(ROM_size>>4));
} }
static DECLFW(M188Write) static DECLFW(M188Write) {
{ latche = V;
latche=V; Sync();
Sync();
} }
static DECLFR(ExtDev) static DECLFR(ExtDev) {
{ return(3);
return(3);
} }
static void Power(void) static void Power(void) {
{ latche = 0;
latche=0; Sync();
Sync(); setchr8(0);
setchr8(0); setprg16(0xc000, 0x7);
setprg16(0xc000,0x7); SetReadHandler(0x6000, 0x7FFF, ExtDev);
SetReadHandler(0x6000,0x7FFF,ExtDev); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, M188Write);
SetWriteHandler(0x8000,0xFFFF,M188Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper188_Init(CartInfo *info) void Mapper188_Init(CartInfo *info) {
{ info->Power = Power;
info->Power=Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&latche, 1, 0, "LATC");
AddExState(&latche, 1, 0, "LATC");
} }

36
src/boards/kof97.cpp
View File

@ -21,30 +21,26 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static DECLFW(UNLKOF97CMDWrite) static DECLFW(UNLKOF97CMDWrite) {
{ V = (V & 0xD8) | ((V & 0x20) >> 4) | ((V & 4) << 3) | ((V & 2) >> 1) | ((V & 1) << 2); //76143502
V=(V&0xD8)|((V&0x20)>>4)|((V&4)<<3)|((V&2)>>1)|((V&1)<<2); //76143502 if (A == 0x9000) A = 0x8001;
if(A==0x9000) A=0x8001; MMC3_CMDWrite(A, V);
MMC3_CMDWrite(A,V);
} }
static DECLFW(UNLKOF97IRQWrite) static DECLFW(UNLKOF97IRQWrite) {
{ V = (V & 0xD8) | ((V & 0x20) >> 4) | ((V & 4) << 3) | ((V & 2) >> 1) | ((V & 1) << 2);
V=(V&0xD8)|((V&0x20)>>4)|((V&4)<<3)|((V&2)>>1)|((V&1)<<2); if (A == 0xD000) A = 0xC001;
if(A==0xD000) A=0xC001; else if (A == 0xF000) A = 0xE001;
else if(A==0xF000) A=0xE001; MMC3_IRQWrite(A, V);
MMC3_IRQWrite(A,V);
} }
static void UNLKOF97Power(void) static void UNLKOF97Power(void) {
{ GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x8000, 0xA000, UNLKOF97CMDWrite);
SetWriteHandler(0x8000,0xA000,UNLKOF97CMDWrite); SetWriteHandler(0xC000, 0xF000, UNLKOF97IRQWrite);
SetWriteHandler(0xC000,0xF000,UNLKOF97IRQWrite);
} }
void UNLKOF97_Init(CartInfo *info) void UNLKOF97_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 256, 0, 0);
GenMMC3_Init(info, 128, 256, 0, 0); info->Power = UNLKOF97Power;
info->Power=UNLKOF97Power;
} }

319
src/boards/konami-qtai.cpp
View File

@ -1,7 +1,7 @@
/* FCE Ultra - NES/Famicom Emulator /* FCE Ultra - NES/Famicom Emulator
* *
* Copyright notice for this file: * Copyright notice for this file:
* Copyright (C) 2005-2008 CaH4e3 * Copyright (C) 2005 CaH4e3
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@ -17,7 +17,8 @@
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
* *
* CAI Shogakko no Sansu * VRC-5 (CAI Shogakko no Sansu)
*
*/ */
#include "mapinc.h" #include "mapinc.h"
@ -27,7 +28,7 @@ static writefunc old2007wrap;
static uint16 CHRSIZE = 8192; static uint16 CHRSIZE = 8192;
static uint16 WRAMSIZE = 8192 + 4096; static uint16 WRAMSIZE = 8192 + 4096;
static uint8 *CHRRAM=NULL; static uint8 *CHRRAM = NULL;
static uint8 *WRAM = NULL; static uint8 *WRAM = NULL;
static uint8 IRQa, K4IRQ; static uint8 IRQa, K4IRQ;
@ -35,208 +36,190 @@ static uint32 IRQLatch, IRQCount;
static uint8 regs[16]; static uint8 regs[16];
//static uint8 test[8]; //static uint8 test[8];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQLatch, 1, "IRQL"}, { &IRQLatch, 1, "IRQL" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&K4IRQ, 1, "KIRQ"}, { &K4IRQ, 1, "KIRQ" },
{regs, 16, "REGS"}, { regs, 16, "REGS" },
{0} { 0 }
}; };
static void chrSync(void) static void chrSync(void) {
{ setchr4r(0x10, 0x0000, regs[5] & 1);
setchr4r(0x10,0x0000,regs[5]&1); setchr4r(0x10, 0x1000, 0);
setchr4r(0x10,0x1000,0);
} }
static void Sync(void) static void Sync(void) {
{ chrSync();
chrSync(); // if(regs[0xA]&0x10)
// if(regs[0xA]&0x10) // {
// { /* setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);
/* setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0); setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);
setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1); setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);
setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2); setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);
setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3); setchr1r(0x10,0x1000,0);
setchr1r(0x10,0x1000,0); setchr1r(0x10,0x1400,1);
setchr1r(0x10,0x1400,1); setchr1r(0x10,0x1800,2);
setchr1r(0x10,0x1800,2); setchr1r(0x10,0x1c00,3);*/
setchr1r(0x10,0x1c00,3);*/ /* setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0);
/* setchr1r(0x10,0x0000,(((regs[5]&1))<<2)+0); setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1);
setchr1r(0x10,0x0400,(((regs[5]&1))<<2)+1); setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2);
setchr1r(0x10,0x0800,(((regs[5]&1))<<2)+2); setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3);
setchr1r(0x10,0x0c00,(((regs[5]&1))<<2)+3); setchr1r(0x10,0x1000,(((regs[5]&1)^1)<<2)+4);
setchr1r(0x10,0x1000,(((regs[5]&1)^1)<<2)+4); setchr1r(0x10,0x1400,(((regs[5]&1)^1)<<2)+5);
setchr1r(0x10,0x1400,(((regs[5]&1)^1)<<2)+5); setchr1r(0x10,0x1800,(((regs[5]&1)^1)<<2)+6);
setchr1r(0x10,0x1800,(((regs[5]&1)^1)<<2)+6); setchr1r(0x10,0x1c00,(((regs[5]&1)^1)<<2)+7);
setchr1r(0x10,0x1c00,(((regs[5]&1)^1)<<2)+7);
*/ */
// } // }
// else // else
// { // {
/* /*
setchr1r(0x10,0x0000,(((regs[5]&1)^1)<<2)+0); setchr1r(0x10,0x0000,(((regs[5]&1)^1)<<2)+0);
setchr1r(0x10,0x0400,(((regs[5]&1)^1)<<2)+1); setchr1r(0x10,0x0400,(((regs[5]&1)^1)<<2)+1);
setchr1r(0x10,0x0800,(((regs[5]&1)^1)<<2)+2); setchr1r(0x10,0x0800,(((regs[5]&1)^1)<<2)+2);
setchr1r(0x10,0x0c00,(((regs[5]&1)^1)<<2)+3); setchr1r(0x10,0x0c00,(((regs[5]&1)^1)<<2)+3);
setchr1r(0x10,0x1000,(((regs[5]&1))<<2)+4); setchr1r(0x10,0x1000,(((regs[5]&1))<<2)+4);
setchr1r(0x10,0x1400,(((regs[5]&1))<<2)+5); setchr1r(0x10,0x1400,(((regs[5]&1))<<2)+5);
setchr1r(0x10,0x1800,(((regs[5]&1))<<2)+6); setchr1r(0x10,0x1800,(((regs[5]&1))<<2)+6);
setchr1r(0x10,0x1c00,(((regs[5]&1))<<2)+7); setchr1r(0x10,0x1c00,(((regs[5]&1))<<2)+7);
// } // }
//*/ //*/
/* setchr1r(1,0x0000,test[0]); /* setchr1r(1,0x0000,test[0]);
setchr1r(1,0x0400,test[1]); setchr1r(1,0x0400,test[1]);
setchr1r(1,0x0800,test[2]); setchr1r(1,0x0800,test[2]);
setchr1r(1,0x0c00,test[3]); setchr1r(1,0x0c00,test[3]);
setchr1r(1,0x1000,test[4]); setchr1r(1,0x1000,test[4]);
setchr1r(1,0x1400,test[5]); setchr1r(1,0x1400,test[5]);
setchr1r(1,0x1800,test[6]); setchr1r(1,0x1800,test[6]);
setchr1r(1,0x1c00,test[7]); setchr1r(1,0x1c00,test[7]);
*/ */
setprg4r(0x10,0x6000,regs[0]&1); setprg4r(0x10, 0x6000, regs[0] & 1);
if(regs[2]>=0x40) if (regs[2] >= 0x40)
setprg8r(1,0x8000,(regs[2]-0x40)); setprg8r(1, 0x8000, (regs[2] - 0x40));
else else
setprg8r(0,0x8000,(regs[2]&0x3F)); setprg8r(0, 0x8000, (regs[2] & 0x3F));
if(regs[3]>=0x40) if (regs[3] >= 0x40)
setprg8r(1,0xA000,(regs[3]-0x40)); setprg8r(1, 0xA000, (regs[3] - 0x40));
else else
setprg8r(0,0xA000,(regs[3]&0x3F)); setprg8r(0, 0xA000, (regs[3] & 0x3F));
if(regs[4]>=0x40) if (regs[4] >= 0x40)
setprg8r(1,0xC000,(regs[4]-0x40)); setprg8r(1, 0xC000, (regs[4] - 0x40));
else else
setprg8r(0,0xC000,(regs[4]&0x3F)); setprg8r(0, 0xC000, (regs[4] & 0x3F));
setprg8r(1,0xE000,~0); setprg8r(1, 0xE000, ~0);
setmirror(MI_V); setmirror(MI_V);
} }
/*static DECLFW(TestWrite) /*static DECLFW(TestWrite)
{ {
test[A&7] = V; test[A&7] = V;
Sync(); Sync();
}*/ }*/
static DECLFW(M190Write) static DECLFW(M190Write) {
{ // FCEU_printf("write %04x:%04x %d, %d\n",A,V,scanline,timestamp);
// FCEU_printf("write %04x:%04x %d, %d\n",A,V,scanline,timestamp); regs[(A & 0x0F00) >> 8] = V;
regs[(A&0x0F00)>>8]=V; switch (A) {
switch(A) case 0xd600: IRQLatch &= 0xFF00; IRQLatch |= V; break;
{ case 0xd700: IRQLatch &= 0x00FF; IRQLatch |= V << 8; break;
case 0xd600:IRQLatch&=0xFF00;IRQLatch|=V;break; case 0xd900: IRQCount = IRQLatch; IRQa = V & 2; K4IRQ = V & 1; X6502_IRQEnd(FCEU_IQEXT); break;
case 0xd700:IRQLatch&=0x00FF;IRQLatch|=V<<8;break; case 0xd800: IRQa = K4IRQ; X6502_IRQEnd(FCEU_IQEXT); break;
case 0xd900:IRQCount=IRQLatch;IRQa=V&2;K4IRQ=V&1;X6502_IRQEnd(FCEU_IQEXT);break; }
case 0xd800:IRQa=K4IRQ;X6502_IRQEnd(FCEU_IQEXT);break; Sync();
}
Sync();
} }
static DECLFR(M190Read) static DECLFR(M190Read) {
{ // FCEU_printf("read %04x:%04x %d, %d\n",A,regs[(A&0x0F00)>>8],scanline,timestamp);
// FCEU_printf("read %04x:%04x %d, %d\n",A,regs[(A&0x0F00)>>8],scanline,timestamp); return regs[(A & 0x0F00) >> 8] + regs[0x0B];
return regs[(A&0x0F00)>>8]+regs[0x0B];
} }
static void VRC5IRQ(int a) static void VRC5IRQ(int a) {
{ if (IRQa) {
if(IRQa) IRQCount += a;
{ if (IRQCount & 0x10000) {
IRQCount+=a; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount&0x10000) IRQCount = IRQLatch;
{ }
X6502_IRQBegin(FCEU_IQEXT); }
// IRQCount=IRQLatch;
}
}
} }
static void Mapper190_PPU(uint32 A) //static void Mapper190_PPU(uint32 A)
{ //{
if(A>=0x2000) // if(A<0x2000)
{ // setchr4r(0x10,0x1000,QTAINTRAM[A&0x1FFF]&1);
setchr4r(0x10,0x0000,QTAINTRAM[A&0x1FFF]&1); // else
setchr4r(0x10,0x1000,QTAINTRAM[A&0x1FFF]&1); // chrSync();
} //}
// else
// chrSync();
}
static DECLFW(M1902007Wrap) static DECLFW(M1902007Wrap) {
{ if (A >= 0x2000) {
if(A>=0x2000) if (regs[0xA] & 1)
{ QTAINTRAM[A & 0x1FFF] = V;
if(regs[0xA]&1) else
QTAINTRAM[A&0x1FFF]=V; old2007wrap(A, V);
else }
old2007wrap(A,V);
}
} }
static void M190Power(void) static void M190Power(void) {
{ /* test[0]=0;
/* test[0]=0; test[1]=1;
test[1]=1; test[2]=2;
test[2]=2; test[3]=3;
test[3]=3; test[4]=4;
test[4]=4; test[5]=5;
test[5]=5; test[6]=6;
test[6]=6; test[7]=7;
test[7]=7;
*/ */
setprg4r(0x10,0x7000,2); setprg4r(0x10, 0x7000, 2);
old2007wrap=GetWriteHandler(0x2007); old2007wrap = GetWriteHandler(0x2007);
SetWriteHandler(0x2007,0x2007,M1902007Wrap); SetWriteHandler(0x2007, 0x2007, M1902007Wrap);
SetReadHandler(0x6000,0xFFFF,CartBR); SetReadHandler(0x6000, 0xFFFF, CartBR);
// SetWriteHandler(0x5000,0x5007,TestWrite); // SetWriteHandler(0x5000,0x5007,TestWrite);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x8000,0xFFFF,M190Write); SetWriteHandler(0x8000, 0xFFFF, M190Write);
SetReadHandler(0xDC00,0xDC00,M190Read); SetReadHandler(0xDC00, 0xDC00, M190Read);
SetReadHandler(0xDD00,0xDD00,M190Read); SetReadHandler(0xDD00, 0xDD00, M190Read);
Sync(); Sync();
} }
static void M190Close(void) static void M190Close(void) {
{ if (CHRRAM)
if(CHRRAM) FCEU_gfree(CHRRAM);
FCEU_gfree(CHRRAM); CHRRAM = NULL;
CHRRAM=NULL; if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void Mapper190_Init(CartInfo *info) void Mapper190_Init(CartInfo *info) {
{ info->Power = M190Power;
info->Power=M190Power; info->Close = M190Close;
info->Close=M190Close; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
MapIRQHook=VRC5IRQ; MapIRQHook = VRC5IRQ;
//PPU_hook=Mapper190_PPU; // PPU_hook=Mapper190_PPU;
CHRRAM=(uint8*)FCEU_gmalloc(CHRSIZE); CHRRAM = (uint8*)FCEU_gmalloc(CHRSIZE);
SetupCartCHRMapping(0x10,CHRRAM,CHRSIZE,1); SetupCartCHRMapping(0x10, CHRRAM, CHRSIZE, 1);
AddExState(CHRRAM, CHRSIZE, 0, "CRAM"); AddExState(CHRRAM, CHRSIZE, 0, "CRAM");
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
if(info->battery) if (info->battery) {
{ info->SaveGame[0] = WRAM;
info->SaveGame[0] = WRAM; info->SaveGameLen[0] = WRAMSIZE - 4096;
info->SaveGameLen[0] = WRAMSIZE - 4096; }
}
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

88
src/boards/ks7012.cpp
View File

@ -21,71 +21,63 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg; static uint8 reg;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REGS"}, { &reg, 1, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg32(0x8000, reg & 1);
setprg32(0x8000,reg&1); setchr8(0);
setchr8(0);
} }
static DECLFW(UNLKS7012Write) static DECLFW(UNLKS7012Write) {
{ // FCEU_printf("bs %04x %02x\n",A,V);
// FCEU_printf("bs %04x %02x\n",A,V); switch (A) {
switch(A) case 0xE0A0: reg = 0; Sync(); break;
{ case 0xEE36: reg = 1; Sync(); break;
case 0xE0A0: reg=0; Sync(); break; }
case 0xEE36: reg=1; Sync(); break;
}
} }
static void UNLKS7012Power(void) static void UNLKS7012Power(void) {
{ reg = ~0;
reg = ~0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLKS7012Write);
SetWriteHandler(0x8000,0xFFFF,UNLKS7012Write);
} }
static void UNLKS7012Reset(void) static void UNLKS7012Reset(void) {
{ reg = ~0;
reg = ~0; Sync();
Sync();
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
static void UNLKS7012Close(void) static void UNLKS7012Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
void UNLKS7012_Init(CartInfo *info) void UNLKS7012_Init(CartInfo *info) {
{ info->Power = UNLKS7012Power;
info->Power=UNLKS7012Power; info->Reset = UNLKS7012Reset;
info->Reset=UNLKS7012Reset; info->Close = UNLKS7012Close;
info->Close=UNLKS7012Close;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

75
src/boards/ks7013.cpp
View File

@ -16,65 +16,62 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* Just another pirate cart with pirate mapper, instead of original MMC1
* Kaiser Highway Star
*
*/ */
#include "mapinc.h" #include "mapinc.h"
static uint8 reg, mirr; static uint8 reg, mirr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REGS"}, { &reg, 1, "REGS" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg16(0x8000, reg);
setprg16(0x8000,reg); setprg16(0xc000, ~0);
setprg16(0xc000,~0); setmirror(mirr);
setmirror(mirr); setchr8(0);
setchr8(0);
} }
static DECLFW(UNLKS7013BLoWrite) static DECLFW(UNLKS7013BLoWrite) {
{ reg = V;
reg = V; Sync();
Sync();
} }
static DECLFW(UNLKS7013BHiWrite) static DECLFW(UNLKS7013BHiWrite) {
{ mirr = (V & 1) ^ 1;
mirr = (V & 1) ^ 1; Sync();
Sync();
} }
static void UNLKS7013BPower(void) static void UNLKS7013BPower(void) {
{ reg = 0;
reg = 0; mirr = 0;
mirr = 0; Sync();
Sync(); SetWriteHandler(0x6000, 0x7FFF, UNLKS7013BLoWrite);
SetWriteHandler(0x6000,0x7FFF,UNLKS7013BLoWrite); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLKS7013BHiWrite);
SetWriteHandler(0x8000,0xFFFF,UNLKS7013BHiWrite);
} }
static void UNLKS7013BReset(void) static void UNLKS7013BReset(void) {
{ reg = 0;
reg = 0; Sync();
Sync();
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLKS7013B_Init(CartInfo *info) void UNLKS7013B_Init(CartInfo *info) {
{ info->Power = UNLKS7013BPower;
info->Power=UNLKS7013BPower; info->Reset = UNLKS7013BReset;
info->Reset=UNLKS7013BReset;
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

158
src/boards/ks7017.cpp
View File

@ -25,110 +25,90 @@
static uint8 reg, mirr; static uint8 reg, mirr;
static int32 IRQa, IRQCount, IRQLatch; static int32 IRQa, IRQCount, IRQLatch;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{&reg, 1, "REGS"}, { &reg, 1, "REGS" },
{&IRQa, 4, "IRQA"}, { &IRQa, 4, "IRQA" },
{&IRQCount, 4, "IRQC"}, { &IRQCount, 4, "IRQC" },
{&IRQLatch, 4, "IRQL"}, { &IRQLatch, 4, "IRQL" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg16(0x8000, reg);
setprg16(0x8000,reg); setprg16(0xC000, 2);
setprg16(0xC000,2); setmirror(mirr);
setmirror(mirr);
} }
static DECLFW(UNLKS7017Write) static DECLFW(UNLKS7017Write) {
{ // FCEU_printf("bs %04x %02x\n",A,V);
// FCEU_printf("bs %04x %02x\n",A,V); if ((A & 0xFF00) == 0x4A00) {
if((A & 0xFF00) == 0x4A00) reg = ((A >> 2) & 3) | ((A >> 4) & 4);
{ } else if ((A & 0xFF00) == 0x5100) {
reg = ((A >> 2) & 3)|((A >> 4) & 4); Sync();
} } else if (A == 0x4020) {
else if ((A & 0xFF00) == 0x5100) X6502_IRQEnd(FCEU_IQEXT);
{ IRQCount &= 0xFF00;
Sync(); IRQCount |= V;
} } else if (A == 0x4021) {
else if (A == 0x4020) X6502_IRQEnd(FCEU_IQEXT);
{ IRQCount &= 0xFF;
X6502_IRQEnd(FCEU_IQEXT); IRQCount |= V << 8;
IRQCount&=0xFF00; IRQa = 1;
IRQCount|=V; } else if (A == 0x4025) {
} mirr = ((V & 8) >> 3) ^ 1;
else if (A == 0x4021) }
{ }
X6502_IRQEnd(FCEU_IQEXT); static DECLFR(FDSRead4030) {
IRQCount&=0xFF; X6502_IRQEnd(FCEU_IQEXT);
IRQCount|=V<<8; return X.IRQlow & FCEU_IQEXT ? 1 : 0;
IRQa = 1;
}
else if (A == 0x4025)
{
mirr = ((V & 8) >> 3) ^ 1;
}
} }
static DECLFR(FDSRead4030) static void UNL7017IRQ(int a) {
{ if (IRQa) {
X6502_IRQEnd(FCEU_IQEXT); IRQCount -= a;
return X.IRQlow&FCEU_IQEXT?1:0; if (IRQCount <= 0) {
IRQa = 0;
X6502_IRQBegin(FCEU_IQEXT);
}
}
} }
static void UNL7017IRQ(int a) static void UNLKS7017Power(void) {
{ Sync();
if(IRQa) setchr8(0);
{ setprg8r(0x10, 0x6000, 0);
IRQCount-=a; SetReadHandler(0x6000, 0x7FFF, CartBR);
if(IRQCount<=0) SetWriteHandler(0x6000, 0x7FFF, CartBW);
{ SetReadHandler(0x8000, 0xFFFF, CartBR);
IRQa=0; SetReadHandler(0x4030, 0x4030, FDSRead4030);
X6502_IRQBegin(FCEU_IQEXT); SetWriteHandler(0x4020, 0x5FFF, UNLKS7017Write);
}
}
} }
static void UNLKS7017Power(void) static void UNLKS7017Close(void) {
{ if (WRAM)
Sync(); FCEU_gfree(WRAM);
setchr8(0); WRAM = NULL;
setprg8r(0x10,0x6000,0);
SetReadHandler(0x6000,0x7FFF,CartBR);
SetWriteHandler(0x6000,0x7FFF,CartBW);
SetReadHandler(0x8000,0xFFFF,CartBR);
SetReadHandler(0x4030,0x4030,FDSRead4030);
SetWriteHandler(0x4020,0x5FFF,UNLKS7017Write);
} }
static void UNLKS7017Close(void) static void StateRestore(int version) {
{ Sync();
if(WRAM)
FCEU_gfree(WRAM);
WRAM=NULL;
} }
static void StateRestore(int version) void UNLKS7017_Init(CartInfo *info) {
{ info->Power = UNLKS7017Power;
Sync(); info->Close = UNLKS7017Close;
} MapIRQHook = UNL7017IRQ;
void UNLKS7017_Init(CartInfo *info) WRAMSIZE = 8192;
{ WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
info->Power=UNLKS7017Power; SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
info->Close=UNLKS7017Close; AddExState(WRAM, WRAMSIZE, 0, "WRAM");
MapIRQHook=UNL7017IRQ;
GameStateRestore = StateRestore;
WRAMSIZE=8192; AddExState(&StateRegs, ~0, 0, 0);
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
} }

159
src/boards/ks7030.cpp
View File

@ -28,124 +28,113 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg0, reg1; static uint8 reg0, reg1;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg0, 1, "REG0"}, { &reg0, 1, "REG0" },
{&reg1, 1, "REG1"}, { &reg1, 1, "REG1" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr8(0);
setchr8(0); setprg32(0x8000, ~0);
setprg32(0x8000,~0); setprg4(0xb800, reg0);
setprg4(0xb800,reg0); setprg4(0xc800, 8 + reg1);
setprg4(0xc800,8+reg1);
} }
// 6000 - 6BFF - RAM // 6000 - 6BFF - RAM
// 6C00 - 6FFF - BANK 1K REG1 // 6C00 - 6FFF - BANK 1K REG1
// 7000 - 7FFF - BANK 4K REG0 // 7000 - 7FFF - BANK 4K REG0
static DECLFW(UNLKS7030RamWrite0) static DECLFW(UNLKS7030RamWrite0) {
{ if ((A >= 0x6000) && A <= 0x6BFF) {
if((A >= 0x6000) && A <= 0x6BFF) { WRAM[A - 0x6000] = V;
WRAM[A-0x6000]=V; } else if ((A >= 0x6C00) && A <= 0x6FFF) {
} else if((A >= 0x6C00) && A <= 0x6FFF) { CartBW(0xC800 + (A - 0x6C00), V);
CartBW(0xC800 + (A - 0x6C00), V); } else if ((A >= 0x7000) && A <= 0x7FFF) {
} else if((A >= 0x7000) && A <= 0x7FFF) { CartBW(0xB800 + (A - 0x7000), V);
CartBW(0xB800 + (A - 0x7000), V); }
}
} }
static DECLFR(UNLKS7030RamRead0) static DECLFR(UNLKS7030RamRead0) {
{ if ((A >= 0x6000) && A <= 0x6BFF) {
if((A >= 0x6000) && A <= 0x6BFF) { return WRAM[A - 0x6000];
return WRAM[A-0x6000]; } else if ((A >= 0x6C00) && A <= 0x6FFF) {
} else if((A >= 0x6C00) && A <= 0x6FFF) { return CartBR(0xC800 + (A - 0x6C00));
return CartBR(0xC800 + (A - 0x6C00)); } else if ((A >= 0x7000) && A <= 0x7FFF) {
} else if((A >= 0x7000) && A <= 0x7FFF) { return CartBR(0xB800 + (A - 0x7000));
return CartBR(0xB800 + (A - 0x7000)); }
} return 0;
return 0;
} }
// B800 - BFFF - RAM // B800 - BFFF - RAM
// C000 - CBFF - BANK 3K // C000 - CBFF - BANK 3K
// CC00 - D7FF - RAM // CC00 - D7FF - RAM
static DECLFW(UNLKS7030RamWrite1) static DECLFW(UNLKS7030RamWrite1) {
{ if ((A >= 0xB800) && A <= 0xBFFF) {
if((A >= 0xB800) && A <= 0xBFFF) { WRAM[0x0C00 + (A - 0xB800)] = V;
WRAM[0x0C00+(A-0xB800)]=V; } else if ((A >= 0xC000) && A <= 0xCBFF) {
} else if((A >= 0xC000) && A <= 0xCBFF) { CartBW(0xCC00 + (A - 0xC000), V);
CartBW(0xCC00 + (A - 0xC000), V); } else if ((A >= 0xCC00) && A <= 0xD7FF) {
} else if((A >= 0xCC00) && A <= 0xD7FF) { WRAM[0x1400 + (A - 0xCC00)] = V;
WRAM[0x1400+(A-0xCC00)]=V; }
}
} }
static DECLFR(UNLKS7030RamRead1) static DECLFR(UNLKS7030RamRead1) {
{ if ((A >= 0xB800) && A <= 0xBFFF) {
if((A >= 0xB800) && A <= 0xBFFF) { return WRAM[0x0C00 + (A - 0xB800)];
return WRAM[0x0C00+(A-0xB800)]; } else if ((A >= 0xC000) && A <= 0xCBFF) {
} else if((A >= 0xC000) && A <= 0xCBFF) { return CartBR(0xCC00 + (A - 0xC000));
return CartBR(0xCC00 + (A - 0xC000)); } else if ((A >= 0xCC00) && A <= 0xD7FF) {
} else if((A >= 0xCC00) && A <= 0xD7FF) { return WRAM[0x1400 + (A - 0xCC00)];
return WRAM[0x1400+(A-0xCC00)]; }
} return 0;
return 0;
} }
static DECLFW(UNLKS7030Write0) static DECLFW(UNLKS7030Write0) {
{ reg0 = A & 7;
reg0=A&7; Sync();
Sync();
} }
static DECLFW(UNLKS7030Write1) static DECLFW(UNLKS7030Write1) {
{ reg1 = A & 15;
reg1=A&15; Sync();
Sync();
} }
static void UNLKS7030Power(void) static void UNLKS7030Power(void) {
{ reg0 = reg1 = ~0;
reg0=reg1=~0; Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, UNLKS7030RamRead0);
SetReadHandler(0x6000,0x7FFF,UNLKS7030RamRead0); SetWriteHandler(0x6000, 0x7FFF, UNLKS7030RamWrite0);
SetWriteHandler(0x6000,0x7FFF,UNLKS7030RamWrite0); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0x8FFF, UNLKS7030Write0);
SetWriteHandler(0x8000,0x8FFF,UNLKS7030Write0); SetWriteHandler(0x9000, 0x9FFF, UNLKS7030Write1);
SetWriteHandler(0x9000,0x9FFF,UNLKS7030Write1); SetReadHandler(0xB800, 0xD7FF, UNLKS7030RamRead1);
SetReadHandler(0xB800,0xD7FF,UNLKS7030RamRead1); SetWriteHandler(0xB800, 0xD7FF, UNLKS7030RamWrite1);
SetWriteHandler(0xB800,0xD7FF,UNLKS7030RamWrite1);
} }
static void UNLKS7030Close(void) static void UNLKS7030Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLKS7030_Init(CartInfo *info) void UNLKS7030_Init(CartInfo *info) {
{ info->Power = UNLKS7030Power;
info->Power=UNLKS7030Power; info->Close = UNLKS7030Close;
info->Close=UNLKS7030Close; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

81
src/boards/ks7031.cpp
View File

@ -25,61 +25,56 @@
static uint8 reg[4]; static uint8 reg[4];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 4, "REGS"}, { reg, 4, "REGS" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg2(0x6000, reg[0]);
setprg2(0x6000,reg[0]); setprg2(0x6800, reg[1]);
setprg2(0x6800,reg[1]); setprg2(0x7000, reg[2]);
setprg2(0x7000,reg[2]); setprg2(0x7800, reg[3]);
setprg2(0x7800,reg[3]);
setprg2(0x8000,15); setprg2(0x8000, 15);
setprg2(0x8800,14); setprg2(0x8800, 14);
setprg2(0x9000,13); setprg2(0x9000, 13);
setprg2(0x9800,12); setprg2(0x9800, 12);
setprg2(0xa000,11); setprg2(0xa000, 11);
setprg2(0xa800,10); setprg2(0xa800, 10);
setprg2(0xb000,9); setprg2(0xb000, 9);
setprg2(0xb800,8); setprg2(0xb800, 8);
setprg2(0xc000,7); setprg2(0xc000, 7);
setprg2(0xc800,6); setprg2(0xc800, 6);
setprg2(0xd000,5); setprg2(0xd000, 5);
setprg2(0xd800,4); setprg2(0xd800, 4);
setprg2(0xe000,3); setprg2(0xe000, 3);
setprg2(0xe800,2); setprg2(0xe800, 2);
setprg2(0xf000,1); setprg2(0xf000, 1);
setprg2(0xf800,0); setprg2(0xf800, 0);
setchr8(0); setchr8(0);
} }
static DECLFW(UNLKS7031Write) static DECLFW(UNLKS7031Write) {
{ reg[(A >> 11) & 3] = V;
reg[(A >> 11) & 3] = V; Sync();
Sync();
} }
static void UNLKS7031Power(void) static void UNLKS7031Power(void) {
{ Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xffff, UNLKS7031Write);
SetWriteHandler(0x8000,0xffff,UNLKS7031Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLKS7031_Init(CartInfo *info) void UNLKS7031_Init(CartInfo *info) {
{ info->Power = UNLKS7031Power;
info->Power=UNLKS7031Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

104
src/boards/ks7032.cpp
View File

@ -23,72 +23,66 @@
static uint8 reg[8], cmd, IRQa = 0, isirqused = 0; static uint8 reg[8], cmd, IRQa = 0, isirqused = 0;
static int32 IRQCount; static int32 IRQCount;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&cmd, 1, "CMD"}, { &cmd, 1, "CMD" },
{reg, 8, "REGS"}, { reg, 8, "REGS" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 4, "IRQC"}, { &IRQCount, 4, "IRQC" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x6000, reg[4]);
setprg8(0x6000,reg[4]); setprg8(0x8000, reg[1]);
setprg8(0x8000,reg[1]); setprg8(0xA000, reg[2]);
setprg8(0xA000,reg[2]); setprg8(0xC000, reg[3]);
setprg8(0xC000,reg[3]); setprg8(0xE000, ~0);
setprg8(0xE000,~0); setchr8(0);
setchr8(0);
} }
static DECLFW(UNLKS7032Write) static DECLFW(UNLKS7032Write) {
{ // FCEU_printf("bs %04x %02x\n",A,V);
// FCEU_printf("bs %04x %02x\n",A,V); switch (A & 0xF000) {
switch(A&0xF000) // case 0x8FFF: reg[4]=V; Sync(); break;
{ case 0x8000: X6502_IRQEnd(FCEU_IQEXT); IRQCount = (IRQCount & 0x000F) | (V & 0x0F); isirqused = 1; break;
// case 0x8FFF: reg[4]=V; Sync(); break; case 0x9000: X6502_IRQEnd(FCEU_IQEXT); IRQCount = (IRQCount & 0x00F0) | ((V & 0x0F) << 4); isirqused = 1; break;
case 0x8000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x000F)|(V&0x0F); isirqused = 1; break; case 0xA000: X6502_IRQEnd(FCEU_IQEXT); IRQCount = (IRQCount & 0x0F00) | ((V & 0x0F) << 8); isirqused = 1; break;
case 0x9000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x00F0)|((V&0x0F)<<4); isirqused = 1; break; case 0xB000: X6502_IRQEnd(FCEU_IQEXT); IRQCount = (IRQCount & 0xF000) | (V << 12); isirqused = 1; break;
case 0xA000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0x0F00)|((V&0x0F)<<8); isirqused = 1; break; case 0xC000: if (isirqused) {
case 0xB000: X6502_IRQEnd(FCEU_IQEXT); IRQCount=(IRQCount&0xF000)|(V<<12); isirqused = 1; break; X6502_IRQEnd(FCEU_IQEXT); IRQa = 1;
case 0xC000: if(isirqused) { X6502_IRQEnd(FCEU_IQEXT); IRQa=1; } break; }
case 0xE000: cmd=V&7; break; break;
case 0xF000: reg[cmd]=V; Sync(); break; case 0xE000: cmd = V & 7; break;
} case 0xF000: reg[cmd] = V; Sync(); break;
}
} }
static void UNLSMB2JIRQHook(int a) static void UNLSMB2JIRQHook(int a) {
{ if (IRQa) {
if(IRQa) IRQCount += a;
{ if (IRQCount >= 0xFFFF) {
IRQCount+=a; IRQa = 0;
if(IRQCount>=0xFFFF) IRQCount = 0;
{ X6502_IRQBegin(FCEU_IQEXT);
IRQa=0; }
IRQCount=0; }
X6502_IRQBegin(FCEU_IQEXT);
}
}
} }
static void UNLKS7032Power(void) static void UNLKS7032Power(void) {
{ Sync();
Sync(); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4020, 0xFFFF, UNLKS7032Write);
SetWriteHandler(0x4020,0xFFFF,UNLKS7032Write);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLKS7032_Init(CartInfo *info) void UNLKS7032_Init(CartInfo *info) {
{ info->Power = UNLKS7032Power;
info->Power=UNLKS7032Power; MapIRQHook = UNLSMB2JIRQHook;
MapIRQHook=UNLSMB2JIRQHook; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

150
src/boards/ks7037.cpp
View File

@ -24,112 +24,102 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[8], cmd; static uint8 reg[8], cmd;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static void(*WSync)(void); static void (*WSync)(void);
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&cmd, 1, "CMD"}, { &cmd, 1, "CMD" },
{reg, 8, "REGS"}, { reg, 8, "REGS" },
{0} { 0 }
}; };
static void SyncKS7037(void) static void SyncKS7037(void) {
{ setprg4r(0x10, 0x6000, 0);
setprg4r(0x10,0x6000,0); setprg4(0x7000, 15);
setprg4(0x7000,15); setprg8(0x8000, reg[6]);
setprg8(0x8000,reg[6]); setprg4(0xA000, ~3);
setprg4(0xA000,~3); setprg4r(0x10, 0xB000, 1);
setprg4r(0x10,0xB000,1); setprg8(0xC000, reg[7]);
setprg8(0xC000,reg[7]); setprg8(0xE000, ~0);
setprg8(0xE000,~0); setchr8(0);
setchr8(0); setmirrorw(reg[2] & 1, reg[4] & 1, reg[3] & 1, reg[5] & 1);
setmirrorw(reg[2]&1,reg[4]&1,reg[3]&1,reg[5]&1);
} }
static void SyncLH10(void) static void SyncLH10(void) {
{ setprg8(0x6000, ~1);
setprg8(0x6000,~1); setprg8(0x8000, reg[6]);
setprg8(0x8000,reg[6]); setprg8(0xA000, reg[7]);
setprg8(0xA000,reg[7]); setprg8r(0x10, 0xC000, 0);
setprg8r(0x10,0xC000,0); setprg8(0xE000, ~0);
setprg8(0xE000,~0); setchr8(0);
setchr8(0); setmirror(0);
setmirror(0);
} }
static DECLFW(UNLKS7037Write) static DECLFW(UNLKS7037Write) {
{ switch (A & 0xE001) {
switch(A & 0xE001) case 0x8000: cmd = V & 7; break;
{ case 0x8001: reg[cmd] = V; WSync(); break;
case 0x8000: cmd = V & 7; break; }
case 0x8001: reg[cmd] = V; WSync(); break;
}
} }
static void UNLKS7037Power(void) static void UNLKS7037Power(void) {
{ reg[0] = reg[1] = reg[2] = reg[3] = reg[4] = reg[5] = reg[6] = reg[7] = 0;
reg[0]=reg[1]=reg[2]=reg[3]=reg[4]=reg[5]=reg[6]=reg[7]=0; WSync();
WSync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetWriteHandler(0x8000, 0x9FFF, UNLKS7037Write);
SetWriteHandler(0x8000,0x9FFF,UNLKS7037Write); SetWriteHandler(0xA000, 0xBFFF, CartBW);
SetWriteHandler(0xA000,0xBFFF,CartBW); SetWriteHandler(0xC000, 0xFFFF, UNLKS7037Write);
SetWriteHandler(0xC000,0xFFFF,UNLKS7037Write);
} }
static void LH10Power(void) static void LH10Power(void) {
{ reg[0] = reg[1] = reg[2] = reg[3] = reg[4] = reg[5] = reg[6] = reg[7] = 0;
reg[0]=reg[1]=reg[2]=reg[3]=reg[4]=reg[5]=reg[6]=reg[7]=0; WSync();
WSync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xBFFF, UNLKS7037Write);
SetWriteHandler(0x8000,0xBFFF,UNLKS7037Write); SetWriteHandler(0xC000, 0xDFFF, CartBW);
SetWriteHandler(0xC000,0xDFFF,CartBW); SetWriteHandler(0xE000, 0xFFFF, UNLKS7037Write);
SetWriteHandler(0xE000,0xFFFF,UNLKS7037Write);
} }
static void Close(void) static void Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ WSync();
WSync();
} }
void UNLKS7037_Init(CartInfo *info) void UNLKS7037_Init(CartInfo *info) {
{ info->Power = UNLKS7037Power;
info->Power=UNLKS7037Power; info->Close = Close;
info->Close=Close;
WSync = SyncKS7037; WSync = SyncKS7037;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }
void LH10_Init(CartInfo *info) void LH10_Init(CartInfo *info) {
{ info->Power = LH10Power;
info->Power=LH10Power; info->Close = Close;
info->Close=Close;
WSync = SyncLH10; WSync = SyncLH10;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

115
src/boards/ks7057.cpp
View File

@ -15,7 +15,7 @@
* *
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
* *
* FDS Conversion * FDS Conversion
* *
@ -24,74 +24,69 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[8], mirror; static uint8 reg[8], mirror;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 8, "PRG"}, { reg, 8, "PRG" },
{&mirror, 1, "MIRR"}, { &mirror, 1, "MIRR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg2(0x6000, reg[4]);
setprg2(0x6000,reg[4]); setprg2(0x6800, reg[5]);
setprg2(0x6800,reg[5]); setprg2(0x7000, reg[6]);
setprg2(0x7000,reg[6]); setprg2(0x7800, reg[7]);
setprg2(0x7800,reg[7]); setprg2(0x8000, reg[0]);
setprg2(0x8000,reg[0]); setprg2(0x8800, reg[1]);
setprg2(0x8800,reg[1]); setprg2(0x9000, reg[2]);
setprg2(0x9000,reg[2]); setprg2(0x9800, reg[3]);
setprg2(0x9800,reg[3]); setprg8(0xA000, 0xd);
setprg8(0xA000,0xd); setprg16(0xC000, 7);
setprg16(0xC000,7); setchr8(0);
setchr8(0); setmirror(mirror);
setmirror(mirror);
} }
static DECLFW(UNLKS7057Write) static DECLFW(UNLKS7057Write) {
{ switch (A & 0xF003) {
switch(A&0xF003) { case 0x8000:
case 0x8000: case 0x8001:
case 0x8001: case 0x8002:
case 0x8002: case 0x8003:
case 0x8003: case 0x9000:
case 0x9000: case 0x9001:
case 0x9001: case 0x9002:
case 0x9002: case 0x9003: mirror = V & 1; Sync(); break;
case 0x9003: mirror = V & 1; Sync(); break; case 0xB000: reg[0] = (reg[0] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xB000: reg[0] = (reg[0] & 0xF0) | (V & 0x0F); Sync(); break; case 0xB001: reg[0] = (reg[0] & 0x0F) | (V << 4); Sync(); break;
case 0xB001: reg[0] = (reg[0] & 0x0F) | (V << 4); Sync(); break; case 0xB002: reg[1] = (reg[1] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xB002: reg[1] = (reg[1] & 0xF0) | (V & 0x0F); Sync(); break; case 0xB003: reg[1] = (reg[1] & 0x0F) | (V << 4); Sync(); break;
case 0xB003: reg[1] = (reg[1] & 0x0F) | (V << 4); Sync(); break; case 0xC000: reg[2] = (reg[2] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xC000: reg[2] = (reg[2] & 0xF0) | (V & 0x0F); Sync(); break; case 0xC001: reg[2] = (reg[2] & 0x0F) | (V << 4); Sync(); break;
case 0xC001: reg[2] = (reg[2] & 0x0F) | (V << 4); Sync(); break; case 0xC002: reg[3] = (reg[3] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xC002: reg[3] = (reg[3] & 0xF0) | (V & 0x0F); Sync(); break; case 0xC003: reg[3] = (reg[3] & 0x0F) | (V << 4); Sync(); break;
case 0xC003: reg[3] = (reg[3] & 0x0F) | (V << 4); Sync(); break; case 0xD000: reg[4] = (reg[4] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xD000: reg[4] = (reg[4] & 0xF0) | (V & 0x0F); Sync(); break; case 0xD001: reg[4] = (reg[4] & 0x0F) | (V << 4); Sync(); break;
case 0xD001: reg[4] = (reg[4] & 0x0F) | (V << 4); Sync(); break; case 0xD002: reg[5] = (reg[5] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xD002: reg[5] = (reg[5] & 0xF0) | (V & 0x0F); Sync(); break; case 0xD003: reg[5] = (reg[5] & 0x0F) | (V << 4); Sync(); break;
case 0xD003: reg[5] = (reg[5] & 0x0F) | (V << 4); Sync(); break; case 0xE000: reg[6] = (reg[6] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xE000: reg[6] = (reg[6] & 0xF0) | (V & 0x0F); Sync(); break; case 0xE001: reg[6] = (reg[6] & 0x0F) | (V << 4); Sync(); break;
case 0xE001: reg[6] = (reg[6] & 0x0F) | (V << 4); Sync(); break; case 0xE002: reg[7] = (reg[7] & 0xF0) | (V & 0x0F); Sync(); break;
case 0xE002: reg[7] = (reg[7] & 0xF0) | (V & 0x0F); Sync(); break; case 0xE003: reg[7] = (reg[7] & 0x0F) | (V << 4); Sync(); break;
case 0xE003: reg[7] = (reg[7] & 0x0F) | (V << 4); Sync(); break; }
}
} }
static void UNLKS7057Power(void) static void UNLKS7057Power(void) {
{ Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLKS7057Write);
SetWriteHandler(0x8000,0xFFFF,UNLKS7057Write);
} }
static void UNLKS7057Reset(void) static void UNLKS7057Reset(void) {
{ Sync();
Sync();
} }
void UNLKS7057_Init(CartInfo *info) void UNLKS7057_Init(CartInfo *info) {
{ info->Power = UNLKS7057Power;
info->Power=UNLKS7057Power; info->Reset = UNLKS7057Reset;
info->Reset=UNLKS7057Reset; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

52
src/boards/le05.cpp
View File

@ -24,43 +24,39 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 chr; static uint8 chr;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&chr, 1, "CHR"}, { &chr, 1, "CHR" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg2r(0, 0xE000, 0);
setprg2r(0,0xE000,0); setprg2r(0, 0xE800, 0);
setprg2r(0,0xE800,0); setprg2r(0, 0xF000, 0);
setprg2r(0,0xF000,0); setprg2r(0, 0xF800, 0);
setprg2r(0,0xF800,0);
setprg8r(1,0x6000,3); setprg8r(1, 0x6000, 3);
setprg8r(1,0x8000,0); setprg8r(1, 0x8000, 0);
setprg8r(1,0xA000,1); setprg8r(1, 0xA000, 1);
setprg8r(1,0xC000,2); setprg8r(1, 0xC000, 2);
setchr8(chr & 1); setchr8(chr & 1);
setmirror(MI_V); setmirror(MI_V);
} }
static DECLFW(LE05Write) static DECLFW(LE05Write) {
{ chr = V;
chr = V; Sync();
Sync();
} }
static void LE05Power(void) static void LE05Power(void) {
{ Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, LE05Write);
SetWriteHandler(0x8000,0xFFFF,LE05Write);
} }
void LE05_Init(CartInfo *info) void LE05_Init(CartInfo *info) {
{ info->Power = LE05Power;
info->Power=LE05Power; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

74
src/boards/lh32.cpp
View File

@ -24,61 +24,55 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg; static uint8 reg;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setprg8(0x6000, reg);
setprg8(0x6000,reg); setprg8(0x8000, ~3);
setprg8(0x8000,~3); setprg8(0xa000, ~2);
setprg8(0xa000,~2); setprg8r(0x10, 0xc000, 0);
setprg8r(0x10,0xc000,0); setprg8(0xe000, ~0);
setprg8(0xe000,~0); setchr8(0);
setchr8(0);
} }
static DECLFW(LH32Write) static DECLFW(LH32Write) {
{ reg = V;
reg=V; Sync();
Sync();
} }
static void LH32Power(void) static void LH32Power(void) {
{ Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0xC000, 0xDFFF, CartBW);
SetWriteHandler(0xC000,0xDFFF,CartBW); SetWriteHandler(0x6000, 0x6000, LH32Write);
SetWriteHandler(0x6000,0x6000,LH32Write);
} }
static void LH32Close(void) static void LH32Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void LH32_Init(CartInfo *info) void LH32_Init(CartInfo *info) {
{ info->Power = LH32Power;
info->Power=LH32Power; info->Close = LH32Close;
info->Close=LH32Close;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

122
src/boards/lh53.cpp
View File

@ -25,93 +25,83 @@
static uint8 reg, IRQa; static uint8 reg, IRQa;
static int32 IRQCount; static int32 IRQCount;
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&reg, 1, "REG"}, { &reg, 1, "REG" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&IRQCount, 4, "IRQC"}, { &IRQCount, 4, "IRQC" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setchr8(0);
setchr8(0); setprg8(0x6000, reg);
setprg8(0x6000,reg); setprg8(0x8000, 0xc);
setprg8(0x8000,0xc); setprg4(0xa000, (0xd << 1));
setprg4(0xa000,(0xd<<1)); setprg2(0xb000, (0xd << 2) + 2);
setprg2(0xb000,(0xd<<2)+2); setprg2r(0x10, 0xb800, 4);
setprg2r(0x10,0xb800,4); setprg2r(0x10, 0xc000, 5);
setprg2r(0x10,0xc000,5); setprg2r(0x10, 0xc800, 6);
setprg2r(0x10,0xc800,6); setprg2r(0x10, 0xd000, 7);
setprg2r(0x10,0xd000,7); setprg2(0xd800, (0xe << 2) + 3);
setprg2(0xd800,(0xe<<2)+3); setprg8(0xe000, 0xf);
setprg8(0xe000,0xf);
} }
static DECLFW(LH53RamWrite) static DECLFW(LH53RamWrite) {
{ WRAM[(A - 0xB800) & 0x1FFF] = V;
WRAM[(A-0xB800)&0x1FFF]=V;
} }
static DECLFW(LH53Write) static DECLFW(LH53Write) {
{ reg = V;
reg=V; Sync();
Sync();
} }
static DECLFW(LH53IRQaWrite) static DECLFW(LH53IRQaWrite) {
{ IRQa = V & 2;
IRQa = V&2; IRQCount = 0;
IRQCount = 0; if (!IRQa)
if(!IRQa) X6502_IRQEnd(FCEU_IQEXT);
X6502_IRQEnd(FCEU_IQEXT);
} }
static void LH53IRQ(int a) static void LH53IRQ(int a) {
{ if (IRQa) {
if(IRQa) IRQCount += a;
{ if (IRQCount > 7560)
IRQCount+=a; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount>7560) }
X6502_IRQBegin(FCEU_IQEXT);
}
} }
static void LH53Power(void) static void LH53Power(void) {
{ Sync();
Sync(); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); SetWriteHandler(0xB800, 0xD7FF, LH53RamWrite);
SetWriteHandler(0xB800,0xD7FF,LH53RamWrite); SetWriteHandler(0xE000, 0xEFFF, LH53IRQaWrite);
SetWriteHandler(0xE000,0xEFFF,LH53IRQaWrite); SetWriteHandler(0xF000, 0xFFFF, LH53Write);
SetWriteHandler(0xF000,0xFFFF,LH53Write);
} }
static void LH53Close(void) static void LH53Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void LH53_Init(CartInfo *info) void LH53_Init(CartInfo *info) {
{ info->Power = LH53Power;
info->Power=LH53Power; info->Close = LH53Close;
info->Close=LH53Close; MapIRQHook = LH53IRQ;
MapIRQHook=LH53IRQ; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

28
src/boards/malee.cpp
View File

@ -22,21 +22,19 @@
static uint8 WRAM[2048]; static uint8 WRAM[2048];
static void MALEEPower(void) static void MALEEPower(void) {
{ setprg2r(0x10, 0x7000, 0);
setprg2r(0x10,0x7000,0); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x6000, 0x67FF, CartBR);
SetReadHandler(0x6000,0x67FF,CartBR); SetReadHandler(0x7000, 0x77FF, CartBR);
SetReadHandler(0x7000,0x77FF,CartBR); SetWriteHandler(0x7000, 0x77FF, CartBW);
SetWriteHandler(0x7000,0x77FF,CartBW); setprg2r(1, 0x6000, 0);
setprg2r(1,0x6000,0); setprg32(0x8000, 0);
setprg32(0x8000,0); setchr8(0);
setchr8(0);
} }
void MALEE_Init(CartInfo *info) void MALEE_Init(CartInfo *info) {
{ info->Power = MALEEPower;
info->Power=MALEEPower; SetupCartPRGMapping(0x10, WRAM, 2048, 1);
SetupCartPRGMapping(0x10, WRAM, 2048, 1); AddExState(WRAM, 2048, 0, "WRAM");
AddExState(WRAM, 2048, 0,"WRAM");
} }

581
src/boards/mmc1.cpp
View File

@ -25,427 +25,368 @@ static void GenMMC1Power(void);
static void GenMMC1Init(CartInfo *info, int prg, int chr, int wram, int battery); static void GenMMC1Init(CartInfo *info, int prg, int chr, int wram, int battery);
static uint8 DRegs[4]; static uint8 DRegs[4];
static uint8 Buffer,BufferShift; static uint8 Buffer, BufferShift;
static int mmc1opts; static int mmc1opts;
static void (*MMC1CHRHook4)(uint32 A, uint8 V); static void (*MMC1CHRHook4)(uint32 A, uint8 V);
static void (*MMC1PRGHook16)(uint32 A, uint8 V); static void (*MMC1PRGHook16)(uint32 A, uint8 V);
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint8 *CHRRAM=NULL; static uint8 *CHRRAM = NULL;
static int is155, is171; static int is155, is171;
static DECLFW(MBWRAM) static DECLFW(MBWRAM) {
{ if (!(DRegs[3] & 0x10) || is155)
if(!(DRegs[3]&0x10)||is155) Page[A >> 11][A] = V; // WRAM is enabled.
Page[A>>11][A]=V; // WRAM is enabled.
} }
static DECLFR(MAWRAM) static DECLFR(MAWRAM) {
{ if ((DRegs[3] & 0x10) && !is155)
if((DRegs[3]&0x10)&&!is155) return X.DB; // WRAM is disabled
return X.DB; // WRAM is disabled return(Page[A >> 11][A]);
return(Page[A>>11][A]);
} }
static void MMC1CHR(void) static void MMC1CHR(void) {
{ if (mmc1opts & 4) {
if(mmc1opts&4) if (DRegs[0] & 0x10)
{ setprg8r(0x10, 0x6000, (DRegs[1] >> 4) & 1);
if(DRegs[0]&0x10) else
setprg8r(0x10,0x6000,(DRegs[1]>>4)&1); setprg8r(0x10, 0x6000, (DRegs[1] >> 3) & 1);
else }
setprg8r(0x10,0x6000,(DRegs[1]>>3)&1);
}
if(MMC1CHRHook4) if (MMC1CHRHook4) {
{ if (DRegs[0] & 0x10) {
if(DRegs[0]&0x10) MMC1CHRHook4(0x0000, DRegs[1]);
{ MMC1CHRHook4(0x1000, DRegs[2]);
MMC1CHRHook4(0x0000,DRegs[1]); } else {
MMC1CHRHook4(0x1000,DRegs[2]); MMC1CHRHook4(0x0000, (DRegs[1] & 0xFE));
} MMC1CHRHook4(0x1000, DRegs[1] | 1);
else }
{ } else {
MMC1CHRHook4(0x0000,(DRegs[1]&0xFE)); if (DRegs[0] & 0x10) {
MMC1CHRHook4(0x1000,DRegs[1]|1); setchr4(0x0000, DRegs[1]);
} setchr4(0x1000, DRegs[2]);
} } else
else setchr8(DRegs[1] >> 1);
{ }
if(DRegs[0]&0x10)
{
setchr4(0x0000,DRegs[1]);
setchr4(0x1000,DRegs[2]);
}
else
setchr8(DRegs[1]>>1);
}
} }
static void MMC1PRG(void) static void MMC1PRG(void) {
{ uint8 offs = DRegs[1] & 0x10;
uint8 offs=DRegs[1]&0x10; if (MMC1PRGHook16) {
if(MMC1PRGHook16) switch (DRegs[0] & 0xC) {
{ case 0xC:
switch(DRegs[0]&0xC) MMC1PRGHook16(0x8000, (DRegs[3] + offs));
{ MMC1PRGHook16(0xC000, 0xF + offs);
case 0xC: MMC1PRGHook16(0x8000,(DRegs[3]+offs)); break;
MMC1PRGHook16(0xC000,0xF+offs); case 0x8:
break; MMC1PRGHook16(0xC000, (DRegs[3] + offs));
case 0x8: MMC1PRGHook16(0xC000,(DRegs[3]+offs)); MMC1PRGHook16(0x8000, offs);
MMC1PRGHook16(0x8000,offs); break;
break; case 0x0:
case 0x0: case 0x4:
case 0x4: MMC1PRGHook16(0x8000, ((DRegs[3] & ~1) + offs));
MMC1PRGHook16(0x8000,((DRegs[3]&~1)+offs)); MMC1PRGHook16(0xc000, ((DRegs[3] & ~1) + offs + 1));
MMC1PRGHook16(0xc000,((DRegs[3]&~1)+offs+1)); break;
break; }
} } else {
} switch (DRegs[0] & 0xC) {
else case 0xC:
{ setprg16(0x8000, (DRegs[3] + offs));
switch(DRegs[0]&0xC) setprg16(0xC000, 0xF + offs);
{ break;
case 0xC: setprg16(0x8000,(DRegs[3]+offs)); case 0x8:
setprg16(0xC000,0xF+offs); setprg16(0xC000, (DRegs[3] + offs));
break; setprg16(0x8000, offs);
case 0x8: setprg16(0xC000,(DRegs[3]+offs)); break;
setprg16(0x8000,offs); case 0x0:
break; case 0x4:
case 0x0: setprg16(0x8000, ((DRegs[3] & ~1) + offs));
case 0x4: setprg16(0xc000, ((DRegs[3] & ~1) + offs + 1));
setprg16(0x8000,((DRegs[3]&~1)+offs)); break;
setprg16(0xc000,((DRegs[3]&~1)+offs+1)); }
break; }
}
}
} }
static void MMC1MIRROR(void) static void MMC1MIRROR(void) {
{ if (!is171)
if(!is171) switch (DRegs[0] & 3) {
switch(DRegs[0]&3) case 2: setmirror(MI_V); break;
{ case 3: setmirror(MI_H); break;
case 2: setmirror(MI_V); break; case 0: setmirror(MI_0); break;
case 3: setmirror(MI_H); break; case 1: setmirror(MI_1); break;
case 0: setmirror(MI_0); break; }
case 1: setmirror(MI_1); break;
}
} }
static uint64 lreset; static uint64 lreset;
static DECLFW(MMC1_write) static DECLFW(MMC1_write) {
{ int n = (A >> 13) - 4;
int n=(A>>13)-4;
//FCEU_DispMessage("%016x",timestampbase+timestamp);
// FCEU_printf("$%04x:$%02x, $%04x\n",A,V,X.PC);
//DumpMem("out",0xe000,0xffff);
/* The MMC1 is busy so ignore the write. */ /* The MMC1 is busy so ignore the write. */
/* As of version FCE Ultra 0.81, the timestamp is only /* As of version FCE Ultra 0.81, the timestamp is only
increased before each instruction is executed(in other words increased before each instruction is executed(in other words
precision isn't that great), but this should still work to precision isn't that great), but this should still work to
deal with 2 writes in a row from a single RMW instruction. deal with 2 writes in a row from a single RMW instruction.
*/ */
if((timestampbase+timestamp)<(lreset+2)) if ((timestampbase + timestamp) < (lreset + 2))
return; return;
// FCEU_printf("Write %04x:%02x\n",A,V); // FCEU_printf("Write %04x:%02x\n",A,V);
if(V&0x80) if (V & 0x80) {
{ DRegs[0] |= 0xC;
DRegs[0]|=0xC; BufferShift = Buffer = 0;
BufferShift=Buffer=0; MMC1PRG();
MMC1PRG(); lreset = timestampbase + timestamp;
lreset=timestampbase+timestamp; return;
return; }
}
Buffer|=(V&1)<<(BufferShift++); Buffer |= (V & 1) << (BufferShift++);
if(BufferShift==5) if (BufferShift == 5) {
{ DRegs[n] = Buffer;
DRegs[n] = Buffer; BufferShift = Buffer = 0;
BufferShift = Buffer = 0; switch (n) {
switch(n) case 0: MMC1MIRROR(); MMC1CHR(); MMC1PRG(); break;
{ case 1: MMC1CHR(); MMC1PRG(); break;
case 0: MMC1MIRROR(); MMC1CHR(); MMC1PRG(); break; case 2: MMC1CHR(); break;
case 1: MMC1CHR(); MMC1PRG(); break; case 3: MMC1PRG(); break;
case 2: MMC1CHR(); break; }
case 3: MMC1PRG(); break; }
}
}
} }
static void MMC1_Restore(int version) static void MMC1_Restore(int version) {
{ MMC1MIRROR();
MMC1MIRROR(); MMC1CHR();
MMC1CHR(); MMC1PRG();
MMC1PRG(); lreset = 0; // timestamp(base) is not stored in save states.
lreset=0; /* timestamp(base) is not stored in save states. */
} }
static void MMC1CMReset(void) static void MMC1CMReset(void) {
{ int i;
int i;
for(i=0;i<4;i++) for (i = 0; i < 4; i++)
DRegs[i]=0; DRegs[i] = 0;
Buffer = BufferShift = 0; Buffer = BufferShift = 0;
DRegs[0]=0x1F; DRegs[0] = 0x1F;
DRegs[1]=0; DRegs[1] = 0;
DRegs[2]=0; // Should this be something other than 0? DRegs[2] = 0; // Should this be something other than 0?
DRegs[3]=0; DRegs[3] = 0;
MMC1MIRROR(); MMC1MIRROR();
MMC1CHR(); MMC1CHR();
MMC1PRG(); MMC1PRG();
} }
static int DetectMMC1WRAMSize(uint32 crc32) static int DetectMMC1WRAMSize(uint32 crc32) {
{ switch (crc32) {
switch(crc32) case 0xc6182024: // Romance of the 3 Kingdoms
{ case 0x2225c20f: // Genghis Khan
case 0xc6182024: /* Romance of the 3 Kingdoms */ case 0x4642dda6: // Nobunaga's Ambition
case 0x2225c20f: /* Genghis Khan */ case 0x29449ba9: // "" "" (J)
case 0x4642dda6: /* Nobunaga's Ambition */ case 0x2b11e0b0: // "" "" (J)
case 0x29449ba9: /* "" "" (J) */ case 0xb8747abf: // Best Play Pro Yakyuu Special (J)
case 0x2b11e0b0: /* "" "" (J) */ case 0xc9556b36: // Final Fantasy I & II (J) [!]
case 0xb8747abf: /* Best Play Pro Yakyuu Special (J) */ FCEU_printf(" >8KB external WRAM present. Use UNIF if you hack the ROM image.\n");
case 0xc9556b36: /* Final Fantasy I & II (J) [!] */ return(16);
FCEU_printf(" >8KB external WRAM present. Use UNIF if you hack the ROM image.\n"); break;
return(16); default: return(8);
break; }
default:return(8);
}
} }
static uint32 NWCIRQCount; static uint32 NWCIRQCount;
static uint8 NWCRec; static uint8 NWCRec;
#define NWCDIP 0xE #define NWCDIP 0xE
static void NWCIRQHook(int a) static void NWCIRQHook(int a) {
{ if (!(NWCRec & 0x10)) {
if(!(NWCRec&0x10)) NWCIRQCount += a;
{ if ((NWCIRQCount | (NWCDIP << 25)) >= 0x3e000000) {
NWCIRQCount+=a; NWCIRQCount = 0;
if((NWCIRQCount|(NWCDIP<<25))>=0x3e000000) X6502_IRQBegin(FCEU_IQEXT);
{ }
NWCIRQCount=0; }
X6502_IRQBegin(FCEU_IQEXT);
}
}
} }
static void NWCCHRHook(uint32 A, uint8 V) static void NWCCHRHook(uint32 A, uint8 V) {
{ if ((V & 0x10)) { // && !(NWCRec&0x10))
if((V&0x10)) // && !(NWCRec&0x10)) NWCIRQCount = 0;
{ X6502_IRQEnd(FCEU_IQEXT);
NWCIRQCount=0; }
X6502_IRQEnd(FCEU_IQEXT);
}
NWCRec=V; NWCRec = V;
if(V&0x08) if (V & 0x08)
MMC1PRG(); MMC1PRG();
else else
setprg32(0x8000,(V>>1)&3); setprg32(0x8000, (V >> 1) & 3);
} }
static void NWCPRGHook(uint32 A, uint8 V) static void NWCPRGHook(uint32 A, uint8 V) {
{ if (NWCRec & 0x8)
if(NWCRec&0x8) setprg16(A, 8 | (V & 0x7));
setprg16(A,8|(V&0x7)); else
else setprg32(0x8000, (NWCRec >> 1) & 3);
setprg32(0x8000,(NWCRec>>1)&3);
} }
static void NWCPower(void) static void NWCPower(void) {
{ GenMMC1Power();
GenMMC1Power(); setchr8r(0, 0);
setchr8r(0,0);
} }
void Mapper105_Init(CartInfo *info) void Mapper105_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 256, 8, 0);
GenMMC1Init(info, 256, 256, 8, 0); MMC1CHRHook4 = NWCCHRHook;
MMC1CHRHook4=NWCCHRHook; MMC1PRGHook16 = NWCPRGHook;
MMC1PRGHook16=NWCPRGHook; MapIRQHook = NWCIRQHook;
MapIRQHook=NWCIRQHook; info->Power = NWCPower;
info->Power=NWCPower;
} }
static void GenMMC1Power(void) static void GenMMC1Power(void) {
{ lreset = 0;
lreset=0; if (mmc1opts & 1) {
if(mmc1opts&1) FCEU_CheatAddRAM(8, 0x6000, WRAM);
{ if (mmc1opts & 4)
FCEU_CheatAddRAM(8,0x6000,WRAM); FCEU_dwmemset(WRAM, 0, 8192)
if(mmc1opts&4) else if (!(mmc1opts & 2))
FCEU_dwmemset(WRAM,0,8192) FCEU_dwmemset(WRAM, 0, 8192);
else if(!(mmc1opts&2)) }
FCEU_dwmemset(WRAM,0,8192); SetWriteHandler(0x8000, 0xFFFF, MMC1_write);
} SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x8000,0xFFFF,MMC1_write);
SetReadHandler(0x8000,0xFFFF,CartBR);
if(mmc1opts&1) if (mmc1opts & 1) {
{ SetReadHandler(0x6000, 0x7FFF, MAWRAM);
SetReadHandler(0x6000,0x7FFF,MAWRAM); SetWriteHandler(0x6000, 0x7FFF, MBWRAM);
SetWriteHandler(0x6000,0x7FFF,MBWRAM); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); }
}
MMC1CMReset(); MMC1CMReset();
} }
static void GenMMC1Close(void) static void GenMMC1Close(void) {
{ if (CHRRAM)
if(CHRRAM) FCEU_gfree(CHRRAM);
FCEU_gfree(CHRRAM); if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); CHRRAM = WRAM = NULL;
CHRRAM=WRAM=NULL;
} }
static void GenMMC1Init(CartInfo *info, int prg, int chr, int wram, int battery) static void GenMMC1Init(CartInfo *info, int prg, int chr, int wram, int battery) {
{ is155 = 0;
is155=0;
info->Close=GenMMC1Close; info->Close = GenMMC1Close;
MMC1PRGHook16=MMC1CHRHook4=0; MMC1PRGHook16 = MMC1CHRHook4 = 0;
mmc1opts=0; mmc1opts = 0;
PRGmask16[0]&=(prg>>14)-1; PRGmask16[0] &= (prg >> 14) - 1;
CHRmask4[0]&=(chr>>12)-1; CHRmask4[0] &= (chr >> 12) - 1;
CHRmask8[0]&=(chr>>13)-1; CHRmask8[0] &= (chr >> 13) - 1;
if(wram) if (wram) {
{ WRAM = (uint8*)FCEU_gmalloc(wram * 1024);
WRAM=(uint8*)FCEU_gmalloc(wram*1024); //mbg 17-jun-08 - this shouldve been cleared to re-initialize save ram
//mbg 17-jun-08 - this shouldve been cleared to re-initialize save ram //ch4 10-dec-08 - nope, this souldn't
//ch4 10-dec-08 - nope, this souldn't //mbg 29-mar-09 - no time to debate this, we need to keep from breaking some old stuff.
//mbg 29-mar-09 - no time to debate this, we need to keep from breaking some old stuff. //we really need to make up a policy for how compatibility and accuracy can be resolved.
//we really need to make up a policy for how compatibility and accuracy can be resolved. memset(WRAM, 0, wram * 1024);
memset(WRAM,0,wram*1024); mmc1opts |= 1;
mmc1opts|=1; if (wram > 8) mmc1opts |= 4;
if(wram>8) mmc1opts|=4; SetupCartPRGMapping(0x10, WRAM, wram * 1024, 1);
SetupCartPRGMapping(0x10,WRAM,wram*1024,1); AddExState(WRAM, wram * 1024, 0, "WRAM");
AddExState(WRAM, wram*1024, 0, "WRAM"); if (battery) {
if(battery) mmc1opts |= 2;
{ info->SaveGame[0] = WRAM + ((mmc1opts & 4) ? 8192 : 0);
mmc1opts|=2; info->SaveGameLen[0] = 8192;
info->SaveGame[0]=WRAM+((mmc1opts&4)?8192:0); }
info->SaveGameLen[0]=8192; }
} if (!chr) {
} CHRRAM = (uint8*)FCEU_gmalloc(8192);
if(!chr) SetupCartCHRMapping(0, CHRRAM, 8192, 1);
{ AddExState(CHRRAM, 8192, 0, "CHRR");
CHRRAM=(uint8*)FCEU_gmalloc(8192); }
SetupCartCHRMapping(0, CHRRAM, 8192, 1); AddExState(DRegs, 4, 0, "DREG");
AddExState(CHRRAM, 8192, 0, "CHRR");
}
AddExState(DRegs, 4, 0, "DREG");
info->Power=GenMMC1Power; info->Power = GenMMC1Power;
GameStateRestore=MMC1_Restore; GameStateRestore = MMC1_Restore;
AddExState(&lreset, 8, 1, "LRST"); AddExState(&lreset, 8, 1, "LRST");
AddExState(&Buffer, 1, 1, "BFFR"); AddExState(&Buffer, 1, 1, "BFFR");
AddExState(&BufferShift, 1, 1, "BFRS"); AddExState(&BufferShift, 1, 1, "BFRS");
} }
void Mapper1_Init(CartInfo *info) void Mapper1_Init(CartInfo *info) {
{ int ws = DetectMMC1WRAMSize(info->CRC32);
int ws=DetectMMC1WRAMSize(info->CRC32); GenMMC1Init(info, 512, 256, ws, info->battery);
GenMMC1Init(info, 512, 256, ws, info->battery);
} }
/* Same as mapper 1, without respect for WRAM enable bit. */ /* Same as mapper 1, without respect for WRAM enable bit. */
void Mapper155_Init(CartInfo *info) void Mapper155_Init(CartInfo *info) {
{ GenMMC1Init(info, 512, 256, 8, info->battery);
GenMMC1Init(info,512,256,8,info->battery); is155 = 1;
is155=1;
} }
/* Same as mapper 1, with different (or without) mirroring control. */ /* Same as mapper 1, with different (or without) mirroring control. */
/* Kaiser KS7058 board, KS203 custom chip */ /* Kaiser KS7058 board, KS203 custom chip */
void Mapper171_Init(CartInfo *info) void Mapper171_Init(CartInfo *info) {
{ GenMMC1Init(info, 32, 32, 0, 0);
GenMMC1Init(info,32,32,0,0); is171 = 1;
is171=1;
} }
void SAROM_Init(CartInfo *info) void SAROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 128, 64, 8, info->battery);
GenMMC1Init(info, 128, 64, 8, info->battery);
} }
void SBROM_Init(CartInfo *info) void SBROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 128, 64, 0, 0);
GenMMC1Init(info, 128, 64, 0, 0);
} }
void SCROM_Init(CartInfo *info) void SCROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 128, 128, 0, 0);
GenMMC1Init(info, 128, 128, 0, 0);
} }
void SEROM_Init(CartInfo *info) void SEROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 32, 64, 0, 0);
GenMMC1Init(info, 32, 64, 0, 0);
} }
void SGROM_Init(CartInfo *info) void SGROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 0, 0, 0);
GenMMC1Init(info, 256, 0, 0, 0);
} }
void SKROM_Init(CartInfo *info) void SKROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 64, 8, info->battery);
GenMMC1Init(info, 256, 64, 8, info->battery);
} }
void SLROM_Init(CartInfo *info) void SLROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 128, 0, 0);
GenMMC1Init(info, 256, 128, 0, 0);
} }
void SL1ROM_Init(CartInfo *info) void SL1ROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 128, 128, 0, 0);
GenMMC1Init(info, 128, 128, 0, 0);
} }
/* Begin unknown - may be wrong - perhaps they use different MMC1s from the /* Begin unknown - may be wrong - perhaps they use different MMC1s from the
similarly functioning boards? similarly functioning boards?
*/ */
void SL2ROM_Init(CartInfo *info) void SL2ROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 256, 0, 0);
GenMMC1Init(info, 256, 256, 0, 0);
} }
void SFROM_Init(CartInfo *info) void SFROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 256, 0, 0);
GenMMC1Init(info, 256, 256, 0, 0);
} }
void SHROM_Init(CartInfo *info) void SHROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 256, 0, 0);
GenMMC1Init(info, 256, 256, 0, 0);
} }
/* End unknown */ /* End unknown */
/* */ /* */
/* */ /* */
void SNROM_Init(CartInfo *info) void SNROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 0, 8, info->battery);
GenMMC1Init(info, 256, 0, 8, info->battery);
} }
void SOROM_Init(CartInfo *info) void SOROM_Init(CartInfo *info) {
{ GenMMC1Init(info, 256, 0, 16, info->battery);
GenMMC1Init(info, 256, 0, 16, info->battery);
} }

1320
src/boards/mmc5.cpp
View File

File diff suppressed because it is too large Load Diff

103
src/boards/n-c22m.cpp
View File

@ -1,103 +0,0 @@
/* FCE Ultra - NES/Famicom Emulator
*
* Copyright notice for this file:
* Copyright (C) 2006 CaH4e3
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
* Mortal Kombat 2 YOKO */
#include "mapinc.h"
#include "mmc3.h"
static uint8 reg[8];
static SFORMAT StateRegs[]=
{
{reg, 8, "REGS"},
{0}
};
static void Sync(void)
{
// FCEU_printf("(%02x, %02x)\n",reg[3],reg[4]);
setprg8(0x8000,reg[0]);
setprg8(0xA000,reg[1]);
setprg8(0xC000,reg[2]);
setprg8(0xE000,~0);
// setchr2(0x0000,reg[3]);
// setchr2(0x0800,reg[4]);
// setchr2(0x1000,reg[5]);
// setchr2(0x1800,reg[6]);
setchr2(0x0000,reg[3]);
setchr2(0x0800,reg[4]);
setchr2(0x1000,reg[5]);
setchr2(0x1800,reg[6]);
}
static DECLFW(MCN22MWrite)
{
//FCEU_printf("bs %04x %02x\n",A,V);
switch(A)
{
case 0x8c00:
case 0x8c01:
case 0x8c02: reg[A&3]=V; break;
case 0x8d10: reg[3]=V; break;
case 0x8d11: reg[4]=V; break;
case 0x8d16: reg[5]=V; break;
case 0x8d17: reg[6]=V; break;
}
Sync();
}
static void MCN22MPower(void)
{
reg[0]=reg[1]=reg[2]=0;
Sync();
SetReadHandler(0x8000,0xFFFF,CartBR);
SetWriteHandler(0x8000,0xFFFF,MCN22MWrite);
}
/*
static void MCN22MIRQHook(void)
{
int count = IRQCount;
if(!count || IRQReload)
{
IRQCount = IRQLatch;
IRQReload = 0;
}
else
IRQCount--;
if(!IRQCount)
{
if(IRQa)
{
X6502_IRQBegin(FCEU_IQEXT);
}
}
}
*/
static void StateRestore(int version)
{
Sync();
}
void UNLCN22M_Init(CartInfo *info)
{
info->Power=MCN22MPower;
// GameHBIRQHook=MCN22MIRQHook;
GameStateRestore=StateRestore;
AddExState(&StateRegs, ~0, 0, 0);
}

630
src/boards/n106.cpp
View File

@ -26,14 +26,12 @@ static uint8 IRQa;
static uint8 WRAM[8192]; static uint8 WRAM[8192];
static uint8 IRAM[128]; static uint8 IRAM[128];
static DECLFR(AWRAM) static DECLFR(AWRAM) {
{ return(WRAM[A - 0x6000]);
return(WRAM[A-0x6000]);
} }
static DECLFW(BWRAM) static DECLFW(BWRAM) {
{ WRAM[A - 0x6000] = V;
WRAM[A-0x6000]=V;
} }
void Mapper19_ESI(void); void Mapper19_ESI(void);
@ -55,419 +53,375 @@ static int is210; /* Lesser mapper. */
static uint8 PRG[3]; static uint8 PRG[3];
static uint8 CHR[8]; static uint8 CHR[8];
static SFORMAT N106_StateRegs[]={ static SFORMAT N106_StateRegs[] = {
{PRG,3,"PRG"}, { PRG, 3, "PRG" },
{CHR,8,"CHR"}, { CHR, 8, "CHR" },
{NTAPage,4,"NTA"}, { NTAPage, 4, "NTA" },
{0} { 0 }
}; };
static void SyncPRG(void) static void SyncPRG(void) {
{ setprg8(0x8000, PRG[0]);
setprg8(0x8000,PRG[0]); setprg8(0xa000, PRG[1]);
setprg8(0xa000,PRG[1]); setprg8(0xc000, PRG[2]);
setprg8(0xc000,PRG[2]); setprg8(0xe000, 0x3F);
setprg8(0xe000,0x3F);
} }
static void NamcoIRQHook(int a) static void NamcoIRQHook(int a) {
{ if (IRQa) {
if(IRQa) IRQCount += a;
{ if (IRQCount >= 0x7FFF) {
IRQCount+=a; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount>=0x7FFF) IRQa = 0;
{ IRQCount = 0x7FFF; //7FFF;
X6502_IRQBegin(FCEU_IQEXT); }
IRQa=0; }
IRQCount=0x7FFF; //7FFF;
}
}
} }
static DECLFR(Namco_Read4800) static DECLFR(Namco_Read4800) {
{ uint8 ret = IRAM[dopol & 0x7f];
uint8 ret=IRAM[dopol&0x7f]; /* Maybe I should call NamcoSoundHack() here? */
/* Maybe I should call NamcoSoundHack() here? */ #ifdef FCEUDEF_DEBUGGER
#ifdef FCEUDEF_DEBUGGER if (!fceuindbg)
if(!fceuindbg) #endif
#endif if (dopol & 0x80)
if(dopol&0x80) dopol = (dopol & 0x80) | ((dopol + 1) & 0x7f);
dopol=(dopol&0x80)|((dopol+1)&0x7f); return ret;
return ret;
} }
static DECLFR(Namco_Read5000) static DECLFR(Namco_Read5000) {
{ return(IRQCount);
return(IRQCount);
} }
static DECLFR(Namco_Read5800) static DECLFR(Namco_Read5800) {
{ return(IRQCount >> 8);
return(IRQCount>>8);
} }
static void DoNTARAMROM(int w, uint8 V) static void DoNTARAMROM(int w, uint8 V) {
{ NTAPage[w] = V;
NTAPage[w]=V; if (V >= 0xE0)
if(V>=0xE0) setntamem(NTARAM + ((V & 1) << 10), 1, w);
setntamem(NTARAM+((V&1)<<10), 1, w); else{
else V &= CHRmask1[0];
{ setntamem(CHRptr[0] + (V << 10), 0, w);
V&=CHRmask1[0]; }
setntamem(CHRptr[0]+(V<<10), 0, w);
}
} }
static void FixNTAR(void) static void FixNTAR(void) {
{ int x;
int x; for (x = 0; x < 4; x++)
for(x=0;x<4;x++) DoNTARAMROM(x, NTAPage[x]);
DoNTARAMROM(x,NTAPage[x]);
} }
static void DoCHRRAMROM(int x, uint8 V) static void DoCHRRAMROM(int x, uint8 V) {
{ CHR[x] = V;
CHR[x]=V; if (!is210 && !((gorfus >> ((x >> 2) + 6)) & 1) && (V >= 0xE0)) {
if(!is210 && !((gorfus>>((x>>2)+6))&1) && (V>=0xE0)) // printf("BLAHAHA: %d, %02x\n",x,V);
{ // setchr1r(0x10,x<<10,V&7);
// printf("BLAHAHA: %d, %02x\n",x,V); } else
//setchr1r(0x10,x<<10,V&7); setchr1(x << 10, V);
}
else
setchr1(x<<10,V);
} }
static void FixCRR(void) static void FixCRR(void) {
{ int x;
int x; for (x = 0; x < 8; x++)
for(x=0;x<8;x++) DoCHRRAMROM(x, CHR[x]);
DoCHRRAMROM(x,CHR[x]);
} }
static DECLFW(Mapper19C0D8_write) static DECLFW(Mapper19C0D8_write) {
{ DoNTARAMROM((A - 0xC000) >> 11, V);
DoNTARAMROM((A-0xC000)>>11,V);
} }
static uint32 FreqCache[8]; static uint32 FreqCache[8];
static uint32 EnvCache[8]; static uint32 EnvCache[8];
static uint32 LengthCache[8]; static uint32 LengthCache[8];
static void FixCache(int a,int V) static void FixCache(int a, int V) {
{ int w = (a >> 3) & 0x7;
int w=(a>>3)&0x7; switch (a & 0x07) {
switch(a&0x07) case 0x00: FreqCache[w] &= ~0x000000FF; FreqCache[w] |= V; break;
{ case 0x02: FreqCache[w] &= ~0x0000FF00; FreqCache[w] |= V << 8; break;
case 0x00:FreqCache[w]&=~0x000000FF;FreqCache[w]|=V;break; case 0x04:
case 0x02:FreqCache[w]&=~0x0000FF00;FreqCache[w]|=V<<8;break; FreqCache[w] &= ~0x00030000; FreqCache[w] |= (V & 3) << 16;
case 0x04:FreqCache[w]&=~0x00030000;FreqCache[w]|=(V&3)<<16; LengthCache[w] = (8 - ((V >> 2) & 7)) << 2;
LengthCache[w]=(8-((V>>2)&7))<<2; break;
break; case 0x07: EnvCache[w] = (double)(V & 0xF) * 576716; break;
case 0x07:EnvCache[w]=(double)(V&0xF)*576716;break; }
}
} }
static DECLFW(Mapper19_write) static DECLFW(Mapper19_write) {
{ A &= 0xF800;
A&=0xF800; if (A >= 0x8000 && A <= 0xb800)
if(A>=0x8000 && A<=0xb800) DoCHRRAMROM((A - 0x8000) >> 11, V);
DoCHRRAMROM((A-0x8000)>>11,V); else
else switch(A) switch (A) {
{ case 0x4800:
case 0x4800: if (dopol & 0x40) {
if(dopol&0x40) if (FSettings.SndRate) {
{ NamcoSoundHack();
if(FSettings.SndRate) GameExpSound.Fill = NamcoSound;
{ GameExpSound.HiFill = DoNamcoSoundHQ;
NamcoSoundHack(); GameExpSound.HiSync = SyncHQ;
GameExpSound.Fill=NamcoSound; }
GameExpSound.HiFill=DoNamcoSoundHQ; FixCache(dopol, V);
GameExpSound.HiSync=SyncHQ; }
} IRAM[dopol & 0x7f] = V;
FixCache(dopol,V); if (dopol & 0x80)
} dopol = (dopol & 0x80) | ((dopol + 1) & 0x7f);
IRAM[dopol&0x7f]=V; break;
if(dopol&0x80) case 0xf800:
dopol=(dopol&0x80)|((dopol+1)&0x7f); dopol = V; break;
break; case 0x5000:
case 0xf800: IRQCount &= 0xFF00; IRQCount |= V; X6502_IRQEnd(FCEU_IQEXT); break;
dopol=V;break; case 0x5800:
case 0x5000: IRQCount &= 0x00ff; IRQCount |= (V & 0x7F) << 8;
IRQCount&=0xFF00;IRQCount|=V;X6502_IRQEnd(FCEU_IQEXT);break; IRQa = V & 0x80;
case 0x5800: X6502_IRQEnd(FCEU_IQEXT);
IRQCount&=0x00ff;IRQCount|=(V&0x7F)<<8; break;
IRQa=V&0x80; case 0xE000:
X6502_IRQEnd(FCEU_IQEXT); gorko = V & 0xC0;
break; PRG[0] = V & 0x3F;
case 0xE000: SyncPRG();
gorko=V&0xC0; break;
PRG[0]=V&0x3F; case 0xE800:
SyncPRG(); gorfus = V & 0xC0;
break; FixCRR();
case 0xE800: PRG[1] = V & 0x3F;
gorfus=V&0xC0; SyncPRG();
FixCRR(); break;
PRG[1]=V&0x3F; case 0xF000:
SyncPRG(); PRG[2] = V & 0x3F;
break; SyncPRG();
case 0xF000: break;
PRG[2]=V&0x3F; }
SyncPRG();
break;
}
} }
static int dwave=0; static int dwave = 0;
static void NamcoSoundHack(void) static void NamcoSoundHack(void) {
{ int32 z, a;
int32 z,a; if (FSettings.soundq >= 1) {
if(FSettings.soundq>=1) DoNamcoSoundHQ();
{ return;
DoNamcoSoundHQ(); }
return; z = ((SOUNDTS << 16) / soundtsinc) >> 4;
} a = z - dwave;
z=((SOUNDTS<<16)/soundtsinc)>>4; if (a) DoNamcoSound(&Wave[dwave], a);
a=z-dwave; dwave += a;
if(a) DoNamcoSound(&Wave[dwave], a);
dwave+=a;
} }
static void NamcoSound(int Count) static void NamcoSound(int Count) {
{ int32 z, a;
int32 z,a; z = ((SOUNDTS << 16) / soundtsinc) >> 4;
z=((SOUNDTS<<16)/soundtsinc)>>4; a = z - dwave;
a=z-dwave; if (a) DoNamcoSound(&Wave[dwave], a);
if(a) DoNamcoSound(&Wave[dwave], a); dwave = 0;
dwave=0;
} }
static uint32 PlayIndex[8]; static uint32 PlayIndex[8];
static int32 vcount[8]; static int32 vcount[8];
static int32 CVBC; static int32 CVBC;
#define TOINDEX (16+1) #define TOINDEX (16 + 1)
// 16:15 // 16:15
static void SyncHQ(int32 ts) static void SyncHQ(int32 ts) {
{ CVBC = ts;
CVBC=ts;
} }
/* Things to do: /* Things to do:
1 Read freq low 1 Read freq low
2 Read freq mid 2 Read freq mid
3 Read freq high 3 Read freq high
4 Read envelope 4 Read envelope
...? ...?
*/ */
static INLINE uint32 FetchDuff(uint32 P, uint32 envelope) static INLINE uint32 FetchDuff(uint32 P, uint32 envelope) {
{ uint32 duff;
uint32 duff; duff = IRAM[((IRAM[0x46 + (P << 3)] + (PlayIndex[P] >> TOINDEX)) & 0xFF) >> 1];
duff=IRAM[((IRAM[0x46+(P<<3)]+(PlayIndex[P]>>TOINDEX))&0xFF)>>1]; if ((IRAM[0x46 + (P << 3)] + (PlayIndex[P] >> TOINDEX)) & 1)
if((IRAM[0x46+(P<<3)]+(PlayIndex[P]>>TOINDEX))&1) duff >>= 4;
duff>>=4; duff &= 0xF;
duff&=0xF; duff = (duff * envelope) >> 16;
duff=(duff*envelope)>>16; return(duff);
return(duff);
} }
static void DoNamcoSoundHQ(void) static void DoNamcoSoundHQ(void) {
{ int32 P, V;
uint32 V; //mbg merge 7/17/06 made uint32 int32 cyclesuck = (((IRAM[0x7F] >> 4) & 7) + 1) * 15;
int32 P;
int32 cyclesuck=(((IRAM[0x7F]>>4)&7)+1)*15;
for(P=7;P>=(7-((IRAM[0x7F]>>4)&7));P--) for (P = 7; P >= (7 - ((IRAM[0x7F] >> 4) & 7)); P--) {
{ if ((IRAM[0x44 + (P << 3)] & 0xE0) && (IRAM[0x47 + (P << 3)] & 0xF)) {
if((IRAM[0x44+(P<<3)]&0xE0) && (IRAM[0x47+(P<<3)]&0xF)) uint32 freq;
{ int32 vco;
uint32 freq; uint32 duff2, lengo, envelope;
int32 vco;
uint32 duff2,lengo,envelope;
vco=vcount[P]; vco = vcount[P];
freq=FreqCache[P]; freq = FreqCache[P];
envelope=EnvCache[P]; envelope = EnvCache[P];
lengo=LengthCache[P]; lengo = LengthCache[P];
duff2=FetchDuff(P,envelope); duff2 = FetchDuff(P, envelope);
for(V=CVBC<<1;V<SOUNDTS<<1;V++) for (V = CVBC << 1; V < SOUNDTS << 1; V++) {
{ WaveHi[V >> 1] += duff2;
WaveHi[V>>1]+=duff2; if (!vco) {
if(!vco) PlayIndex[P] += freq;
{ while ((PlayIndex[P] >> TOINDEX) >= lengo) PlayIndex[P] -= lengo << TOINDEX;
PlayIndex[P]+=freq; duff2 = FetchDuff(P, envelope);
while((PlayIndex[P]>>TOINDEX)>=lengo) PlayIndex[P]-=lengo<<TOINDEX; vco = cyclesuck;
duff2=FetchDuff(P,envelope); }
vco=cyclesuck; vco--;
} }
vco--; vcount[P] = vco;
} }
vcount[P]=vco; }
} CVBC = SOUNDTS;
}
CVBC=SOUNDTS;
} }
static void DoNamcoSound(int32 *Wave, int Count) static void DoNamcoSound(int32 *Wave, int Count) {
{ int P, V;
int P,V; for (P = 7; P >= 7 - ((IRAM[0x7F] >> 4) & 7); P--) {
for(P=7;P>=7-((IRAM[0x7F]>>4)&7);P--) if ((IRAM[0x44 + (P << 3)] & 0xE0) && (IRAM[0x47 + (P << 3)] & 0xF)) {
{ int32 inc;
if((IRAM[0x44+(P<<3)]&0xE0) && (IRAM[0x47+(P<<3)]&0xF)) uint32 freq;
{ int32 vco;
int32 inc; uint32 duff, duff2, lengo, envelope;
uint32 freq;
int32 vco;
uint32 duff,duff2,lengo,envelope;
vco=vcount[P]; vco = vcount[P];
freq=FreqCache[P]; freq = FreqCache[P];
envelope=EnvCache[P]; envelope = EnvCache[P];
lengo=LengthCache[P]; lengo = LengthCache[P];
if(!freq) {/*printf("Ack");*/ continue;} if (!freq) { /*printf("Ack");*/
continue;
}
{ {
int c=((IRAM[0x7F]>>4)&7)+1; int c = ((IRAM[0x7F] >> 4) & 7) + 1;
inc=(long double)(FSettings.SndRate<<15)/((long double)freq*21477272/((long double)0x400000*c*45)); inc = (long double)(FSettings.SndRate << 15) / ((long double)freq * 21477272 / ((long double)0x400000 * c * 45));
} }
duff=IRAM[(((IRAM[0x46+(P<<3)]+PlayIndex[P])&0xFF)>>1)]; duff = IRAM[(((IRAM[0x46 + (P << 3)] + PlayIndex[P]) & 0xFF) >> 1)];
if((IRAM[0x46+(P<<3)]+PlayIndex[P])&1) if ((IRAM[0x46 + (P << 3)] + PlayIndex[P]) & 1)
duff>>=4; duff >>= 4;
duff&=0xF; duff &= 0xF;
duff2=(duff*envelope)>>19; duff2 = (duff * envelope) >> 19;
for(V=0;V<Count*16;V++) for (V = 0; V < Count * 16; V++) {
{ if (vco >= inc) {
if(vco>=inc) PlayIndex[P]++;
{ if (PlayIndex[P] >= lengo)
PlayIndex[P]++; PlayIndex[P] = 0;
if(PlayIndex[P]>=lengo) vco -= inc;
PlayIndex[P]=0; duff = IRAM[(((IRAM[0x46 + (P << 3)] + PlayIndex[P]) & 0xFF) >> 1)];
vco-=inc; if ((IRAM[0x46 + (P << 3)] + PlayIndex[P]) & 1)
duff=IRAM[(((IRAM[0x46+(P<<3)]+PlayIndex[P])&0xFF)>>1)]; duff >>= 4;
if((IRAM[0x46+(P<<3)]+PlayIndex[P])&1) duff &= 0xF;
duff>>=4; duff2 = (duff * envelope) >> 19;
duff&=0xF; }
duff2=(duff*envelope)>>19; Wave[V >> 4] += duff2;
} vco += 0x8000;
Wave[V>>4]+=duff2; }
vco+=0x8000; vcount[P] = vco;
} }
vcount[P]=vco; }
}
}
} }
static void Mapper19_StateRestore(int version) static void Mapper19_StateRestore(int version) {
{ SyncPRG();
int x; FixNTAR();
SyncPRG(); FixCRR();
FixNTAR(); int x;
FixCRR(); for (x = 0x40; x < 0x80; x++)
for(x=0x40;x<0x80;x++) FixCache(x, IRAM[x]);
FixCache(x,IRAM[x]);
} }
static void M19SC(void) static void M19SC(void) {
{ if (FSettings.SndRate)
if(FSettings.SndRate) Mapper19_ESI();
Mapper19_ESI();
} }
void Mapper19_ESI(void) void Mapper19_ESI(void) {
{ GameExpSound.RChange = M19SC;
GameExpSound.RChange=M19SC; memset(vcount, 0, sizeof(vcount));
memset(vcount,0,sizeof(vcount)); memset(PlayIndex, 0, sizeof(PlayIndex));
memset(PlayIndex,0,sizeof(PlayIndex)); CVBC = 0;
CVBC=0;
} }
void NSFN106_Init(void) void NSFN106_Init(void) {
{ SetWriteHandler(0xf800, 0xffff, Mapper19_write);
SetWriteHandler(0xf800,0xffff,Mapper19_write); SetWriteHandler(0x4800, 0x4fff, Mapper19_write);
SetWriteHandler(0x4800,0x4fff,Mapper19_write); SetReadHandler(0x4800, 0x4fff, Namco_Read4800);
SetReadHandler(0x4800,0x4fff,Namco_Read4800); Mapper19_ESI();
Mapper19_ESI();
} }
static int battery=0; static int battery = 0;
static void N106_Power(void) static void N106_Power(void) {
{ int x;
int x; SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xffff, Mapper19_write);
SetWriteHandler(0x8000,0xffff,Mapper19_write); SetWriteHandler(0x4020, 0x5fff, Mapper19_write);
SetWriteHandler(0x4020,0x5fff,Mapper19_write); if (!is210) {
if(!is210) SetWriteHandler(0xc000, 0xdfff, Mapper19C0D8_write);
{ SetReadHandler(0x4800, 0x4fff, Namco_Read4800);
SetWriteHandler(0xc000,0xdfff,Mapper19C0D8_write); SetReadHandler(0x5000, 0x57ff, Namco_Read5000);
SetReadHandler(0x4800,0x4fff,Namco_Read4800); SetReadHandler(0x5800, 0x5fff, Namco_Read5800);
SetReadHandler(0x5000,0x57ff,Namco_Read5000); NTAPage[0] = NTAPage[1] = NTAPage[2] = NTAPage[3] = 0xFF;
SetReadHandler(0x5800,0x5fff,Namco_Read5800); FixNTAR();
NTAPage[0]=NTAPage[1]=NTAPage[2]=NTAPage[3]=0xFF; }
FixNTAR();
}
SetReadHandler(0x6000,0x7FFF,AWRAM); SetReadHandler(0x6000, 0x7FFF, AWRAM);
SetWriteHandler(0x6000,0x7FFF,BWRAM); SetWriteHandler(0x6000, 0x7FFF, BWRAM);
FCEU_CheatAddRAM(8,0x6000,WRAM); FCEU_CheatAddRAM(8, 0x6000, WRAM);
gorfus=0xFF; gorfus = 0xFF;
SyncPRG(); SyncPRG();
FixCRR(); FixCRR();
if(!battery) if (!battery) {
{ FCEU_dwmemset(WRAM, 0, 8192);
FCEU_dwmemset(WRAM,0,8192); FCEU_dwmemset(IRAM, 0, 128);
FCEU_dwmemset(IRAM,0,128); }
} for (x = 0x40; x < 0x80; x++)
for(x=0x40;x<0x80;x++) FixCache(x, IRAM[x]);
FixCache(x,IRAM[x]);
} }
void Mapper19_Init(CartInfo *info) void Mapper19_Init(CartInfo *info) {
{ is210 = 0;
is210=0; battery = info->battery;
battery=info->battery; info->Power = N106_Power;
info->Power=N106_Power;
MapIRQHook=NamcoIRQHook; MapIRQHook = NamcoIRQHook;
GameStateRestore=Mapper19_StateRestore; GameStateRestore = Mapper19_StateRestore;
GameExpSound.RChange=M19SC; GameExpSound.RChange = M19SC;
if(FSettings.SndRate) if (FSettings.SndRate)
Mapper19_ESI(); Mapper19_ESI();
AddExState(WRAM, 8192, 0, "WRAM"); AddExState(WRAM, 8192, 0, "WRAM");
AddExState(IRAM, 128, 0, "IRAM"); AddExState(IRAM, 128, 0, "IRAM");
AddExState(N106_StateRegs, ~0, 0, 0); AddExState(N106_StateRegs, ~0, 0, 0);
if(info->battery) if (info->battery) {
{ info->SaveGame[0] = WRAM;
info->SaveGame[0]=WRAM; info->SaveGameLen[0] = 8192;
info->SaveGameLen[0]=8192; info->SaveGame[1] = IRAM;
info->SaveGame[1]=IRAM; info->SaveGameLen[1] = 128;
info->SaveGameLen[1]=128; }
}
} }
static void Mapper210_StateRestore(int version) static void Mapper210_StateRestore(int version) {
{ SyncPRG();
SyncPRG(); FixCRR();
FixCRR();
} }
void Mapper210_Init(CartInfo *info) void Mapper210_Init(CartInfo *info) {
{ is210 = 1;
is210=1; GameStateRestore = Mapper210_StateRestore;
GameStateRestore=Mapper210_StateRestore; info->Power = N106_Power;
info->Power=N106_Power; AddExState(WRAM, 8192, 0, "WRAM");
AddExState(WRAM, 8192, 0, "WRAM"); AddExState(N106_StateRegs, ~0, 0, 0);
AddExState(N106_StateRegs, ~0, 0, 0);
} }

116
src/boards/n625092.cpp
View File

@ -16,7 +16,9 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software * along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*
* 700in1 and 400in1 carts * 700in1 and 400in1 carts
*
*/ */
@ -24,86 +26,70 @@
static uint16 cmd, bank; static uint16 cmd, bank;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&cmd, 2, "CMD"}, { &cmd, 2, "CMD" },
{&bank, 2, "BANK"}, { &bank, 2, "BANK" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ setmirror((cmd & 1) ^ 1);
setmirror((cmd&1)^1); setchr8(0);
setchr8(0); if (cmd & 2) {
if(cmd&2) if (cmd & 0x100) {
{ setprg16(0x8000, ((cmd & 0xfc) >> 2) | bank);
if(cmd&0x100) setprg16(0xC000, ((cmd & 0xfc) >> 2) | 7);
{ } else {
setprg16(0x8000,((cmd&0xfc)>>2)|bank); setprg16(0x8000, ((cmd & 0xfc) >> 2) | (bank & 6));
setprg16(0xC000,((cmd&0xfc)>>2)|7); setprg16(0xC000, ((cmd & 0xfc) >> 2) | ((bank & 6) | 1));
} }
else } else {
{ setprg16(0x8000, ((cmd & 0xfc) >> 2) | bank);
setprg16(0x8000,((cmd&0xfc)>>2)|(bank&6)); setprg16(0xC000, ((cmd & 0xfc) >> 2) | bank);
setprg16(0xC000,((cmd&0xfc)>>2)|((bank&6)|1)); }
}
}
else
{
setprg16(0x8000,((cmd&0xfc)>>2)|bank);
setprg16(0xC000,((cmd&0xfc)>>2)|bank);
}
} }
static uint16 ass = 0; static uint16 ass = 0;
static DECLFW(UNLN625092WriteCommand) static DECLFW(UNLN625092WriteCommand) {
{ cmd = A;
cmd=A; if (A == 0x80F8) {
if(A==0x80F8) setprg16(0x8000, ass);
{ setprg16(0xC000, ass);
setprg16(0x8000,ass); } else {
setprg16(0xC000,ass); Sync();
} }
else
{
Sync();
}
} }
static DECLFW(UNLN625092WriteBank) static DECLFW(UNLN625092WriteBank) {
{ bank = A & 7;
bank=A&7; Sync();
Sync();
} }
static void UNLN625092Power(void) static void UNLN625092Power(void) {
{ cmd = 0;
cmd=0; bank = 0;
bank=0; Sync();
Sync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xBFFF, UNLN625092WriteCommand);
SetWriteHandler(0x8000,0xBFFF,UNLN625092WriteCommand); SetWriteHandler(0xC000, 0xFFFF, UNLN625092WriteBank);
SetWriteHandler(0xC000,0xFFFF,UNLN625092WriteBank);
} }
static void UNLN625092Reset(void) static void UNLN625092Reset(void) {
{ cmd = 0;
cmd=0; bank = 0;
bank=0; ass++;
ass++; FCEU_printf("%04x\n", ass);
FCEU_printf("%04x\n",ass);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLN625092_Init(CartInfo *info) void UNLN625092_Init(CartInfo *info) {
{ info->Reset = UNLN625092Reset;
info->Reset=UNLN625092Reset; info->Power = UNLN625092Power;
info->Power=UNLN625092Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

39
src/boards/novel.cpp
View File

@ -22,34 +22,29 @@
static uint8 latch; static uint8 latch;
static void DoNovel(void) static void DoNovel(void) {
{ setprg32(0x8000, latch & 3);
setprg32(0x8000,latch&3); setchr8(latch & 7);
setchr8(latch&7);
} }
static DECLFW(NovelWrite) static DECLFW(NovelWrite) {
{ latch = A & 0xFF;
latch=A&0xFF; DoNovel();
DoNovel();
} }
static void NovelReset(void) static void NovelReset(void) {
{ SetWriteHandler(0x8000, 0xFFFF, NovelWrite);
SetWriteHandler(0x8000,0xFFFF,NovelWrite); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); setprg32(0x8000, 0);
setprg32(0x8000,0); setchr8(0);
setchr8(0);
} }
static void NovelRestore(int version) static void NovelRestore(int version) {
{ DoNovel();
DoNovel();
} }
void Novel_Init(CartInfo *info) void Novel_Init(CartInfo *info) {
{ AddExState(&latch, 1, 0, "L1");
AddExState(&latch, 1, 0,"L1"); info->Power = NovelReset;
info->Power=NovelReset; GameStateRestore = NovelRestore;
GameStateRestore=NovelRestore;
} }

435
src/boards/onebus.cpp
View File

@ -35,8 +35,8 @@ static uint8 IRQCount, IRQa, IRQReload;
#define IRQLatch cpu410x[0x1] #define IRQLatch cpu410x[0x1]
// MMC3 Registers // MMC3 Registers
static uint8 inv_hack = 0; // some OneBus Systems have swapped PRG reg commans in MMC3 inplementation, static uint8 inv_hack = 0; // some OneBus Systems have swapped PRG reg commans in MMC3 inplementation,
// trying to autodetect unusual behavior, due not to add a new mapper. // trying to autodetect unusual behavior, due not to add a new mapper.
#define mmc3cmd cpu410x[0x5] #define mmc3cmd cpu410x[0x5]
#define mirror cpu410x[0x6] #define mirror cpu410x[0x6]
@ -47,279 +47,246 @@ static int16 pcm_addr, pcm_size, pcm_latch, pcm_clock = 0xF6;
static writefunc defapuwrite[64]; static writefunc defapuwrite[64];
static readfunc defapuread[64]; static readfunc defapuread[64];
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{cpu410x, 16, "REGC"}, { cpu410x, 16, "REGC" },
{ppu201x, 16, "REGS"}, { ppu201x, 16, "REGS" },
{apu40xx, 64, "REGA"}, { apu40xx, 64, "REGA" },
{&IRQReload, 1, "IRQR"}, { &IRQReload, 1, "IRQR" },
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{&pcm_enable, 1, "PCME"}, { &pcm_enable, 1, "PCME" },
{&pcm_irq, 1, "PCMI"}, { &pcm_irq, 1, "PCMI" },
{&pcm_addr, 2, "PCMA"}, { &pcm_addr, 2, "PCMA" },
{&pcm_size, 2, "PCMS"}, { &pcm_size, 2, "PCMS" },
{&pcm_latch, 2, "PCML"}, { &pcm_latch, 2, "PCML" },
{&pcm_clock, 2, "PCMC"}, { &pcm_clock, 2, "PCMC" },
{0} { 0 }
}; };
static void PSync(void) static void PSync(void) {
{ uint8 bankmode = cpu410x[0xb] & 7;
uint8 bankmode = cpu410x[0xb] & 7; uint8 mask = (bankmode == 0x7) ? (0xff) : (0x3f >> bankmode);
uint8 mask = (bankmode == 0x7)?(0xff):(0x3f >> bankmode); uint32 block = ((cpu410x[0x0] & 0xf0) << 4) + (cpu410x[0xa] & (~mask));
uint32 block = ((cpu410x[0x0] & 0xf0) << 4) + (cpu410x[0xa] & (~mask)); uint32 pswap = (mmc3cmd & 0x40) << 8;
uint32 pswap = (mmc3cmd & 0x40) << 8;
// uint8 bank0 = (cpu410x[0xb] & 0x40)?(~1):(cpu410x[0x7]); // uint8 bank0 = (cpu410x[0xb] & 0x40)?(~1):(cpu410x[0x7]);
// uint8 bank1 = cpu410x[0x8]; // uint8 bank1 = cpu410x[0x8];
// uint8 bank2 = (cpu410x[0xb] & 0x40)?(cpu410x[0x9]):(~1); // uint8 bank2 = (cpu410x[0xb] & 0x40)?(cpu410x[0x9]):(~1);
// uint8 bank3 = ~0; // uint8 bank3 = ~0;
uint8 bank0 = cpu410x[0x7^inv_hack]; uint8 bank0 = cpu410x[0x7 ^ inv_hack];
uint8 bank1 = cpu410x[0x8^inv_hack]; uint8 bank1 = cpu410x[0x8 ^ inv_hack];
uint8 bank2 = (cpu410x[0xb] & 0x40)?(cpu410x[0x9]):(~1); uint8 bank2 = (cpu410x[0xb] & 0x40) ? (cpu410x[0x9]) : (~1);
uint8 bank3 = ~0; uint8 bank3 = ~0;
// FCEU_printf(" PRG: %04x [%02x]",0x8000^pswap,block | (bank0 & mask)); // FCEU_printf(" PRG: %04x [%02x]",0x8000^pswap,block | (bank0 & mask));
setprg8(0x8000^pswap, block | (bank0 & mask)); setprg8(0x8000 ^ pswap, block | (bank0 & mask));
// FCEU_printf(" %04x [%02x]",0xa000^pswap,block | (bank1 & mask)); // FCEU_printf(" %04x [%02x]",0xa000^pswap,block | (bank1 & mask));
setprg8(0xa000, block | (bank1 & mask)); setprg8(0xa000, block | (bank1 & mask));
// FCEU_printf(" %04x [%02x]",0xc000^pswap,block | (bank2 & mask)); // FCEU_printf(" %04x [%02x]",0xc000^pswap,block | (bank2 & mask));
setprg8(0xc000^pswap, block | (bank2 & mask)); setprg8(0xc000 ^ pswap, block | (bank2 & mask));
// FCEU_printf(" %04x [%02x]\n",0xe000^pswap,block | (bank3 & mask)); // FCEU_printf(" %04x [%02x]\n",0xe000^pswap,block | (bank3 & mask));
setprg8(0xe000, block | (bank3 & mask)); setprg8(0xe000, block | (bank3 & mask));
} }
static void CSync(void) static void CSync(void) {
{ static const uint8 midx[8] = { 0, 1, 2, 0, 3, 4, 5, 0 };
static const uint8 midx[8] = {0, 1, 2, 0, 3, 4, 5, 0 }; uint8 mask = 0xff >> midx[ppu201x[0xa] & 7];
uint8 mask = 0xff >> midx[ppu201x[0xa] & 7]; uint32 block = ((cpu410x[0x0] & 0x0f) << 11) + ((ppu201x[0x8] & 0x70) << 4) + (ppu201x[0xa] & (~mask));
uint32 block = ((cpu410x[0x0] & 0x0f) << 11) + ((ppu201x[0x8] & 0x70) << 4) + (ppu201x[0xa] & (~mask)); uint32 cswap = (mmc3cmd & 0x80) << 5;
uint32 cswap = (mmc3cmd & 0x80) << 5;
uint8 bank0 = ppu201x[0x6]&(~1); uint8 bank0 = ppu201x[0x6] & (~1);
uint8 bank1 = ppu201x[0x6]|1; uint8 bank1 = ppu201x[0x6] | 1;
uint8 bank2 = ppu201x[0x7]&(~1); uint8 bank2 = ppu201x[0x7] & (~1);
uint8 bank3 = ppu201x[0x7]|1; uint8 bank3 = ppu201x[0x7] | 1;
uint8 bank4 = ppu201x[0x2]; uint8 bank4 = ppu201x[0x2];
uint8 bank5 = ppu201x[0x3]; uint8 bank5 = ppu201x[0x3];
uint8 bank6 = ppu201x[0x4]; uint8 bank6 = ppu201x[0x4];
uint8 bank7 = ppu201x[0x5]; uint8 bank7 = ppu201x[0x5];
setchr1(0x0000^cswap, block | (bank0 & mask)); setchr1(0x0000 ^ cswap, block | (bank0 & mask));
setchr1(0x0400^cswap, block | (bank1 & mask)); setchr1(0x0400 ^ cswap, block | (bank1 & mask));
setchr1(0x0800^cswap, block | (bank2 & mask)); setchr1(0x0800 ^ cswap, block | (bank2 & mask));
setchr1(0x0c00^cswap, block | (bank3 & mask)); setchr1(0x0c00 ^ cswap, block | (bank3 & mask));
setchr1(0x1000^cswap, block | (bank4 & mask)); setchr1(0x1000 ^ cswap, block | (bank4 & mask));
setchr1(0x1400^cswap, block | (bank5 & mask)); setchr1(0x1400 ^ cswap, block | (bank5 & mask));
setchr1(0x1800^cswap, block | (bank6 & mask)); setchr1(0x1800 ^ cswap, block | (bank6 & mask));
setchr1(0x1c00^cswap, block | (bank7 & mask)); setchr1(0x1c00 ^ cswap, block | (bank7 & mask));
setmirror((mirror & 1) ^ 1); setmirror((mirror & 1) ^ 1);
} }
static void Sync(void) static void Sync(void) {
{ PSync();
PSync(); CSync();
CSync();
} }
static DECLFW(UNLOneBusWriteCPU410X) static DECLFW(UNLOneBusWriteCPU410X) {
{ // FCEU_printf("CPU %04x:%04x\n",A,V);
// FCEU_printf("CPU %04x:%04x\n",A,V); switch (A & 0xf) {
switch(A & 0xf) case 0x1: IRQLatch = V & 0xfe; break;
{ case 0x2: IRQReload = 1; break;
case 0x1: IRQLatch = V & 0xfe; break; case 0x3: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break;
case 0x2: IRQReload = 1; break; case 0x4: IRQa = 1; break;
case 0x3: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break; default:
case 0x4: IRQa = 1; break; cpu410x[A & 0xf] = V;
default: Sync();
cpu410x[A & 0xf] = V; }
Sync();
}
} }
static DECLFW(UNLOneBusWritePPU201X) static DECLFW(UNLOneBusWritePPU201X) {
{ // FCEU_printf("PPU %04x:%04x\n",A,V);
// FCEU_printf("PPU %04x:%04x\n",A,V); ppu201x[A & 0x0f] = V;
ppu201x[A & 0x0f] = V; Sync();
Sync();
} }
static DECLFW(UNLOneBusWriteMMC3) static DECLFW(UNLOneBusWriteMMC3) {
{ // FCEU_printf("MMC %04x:%04x\n",A,V);
// FCEU_printf("MMC %04x:%04x\n",A,V); switch (A & 0xe001) {
switch(A&0xe001) case 0x8000: mmc3cmd = (mmc3cmd & 0x38) | (V & 0xc7); Sync(); break;
{ case 0x8001:
case 0x8000: mmc3cmd = (mmc3cmd & 0x38) | (V & 0xc7); Sync(); break; {
case 0x8001: switch (mmc3cmd & 7) {
{ case 0: ppu201x[0x6] = V; CSync(); break;
switch(mmc3cmd & 7) case 1: ppu201x[0x7] = V; CSync(); break;
{ case 2: ppu201x[0x2] = V; CSync(); break;
case 0: ppu201x[0x6] = V; CSync(); break; case 3: ppu201x[0x3] = V; CSync(); break;
case 1: ppu201x[0x7] = V; CSync(); break; case 4: ppu201x[0x4] = V; CSync(); break;
case 2: ppu201x[0x2] = V; CSync(); break; case 5: ppu201x[0x5] = V; CSync(); break;
case 3: ppu201x[0x3] = V; CSync(); break; case 6: cpu410x[0x7] = V; PSync(); break;
case 4: ppu201x[0x4] = V; CSync(); break; case 7: cpu410x[0x8] = V; PSync(); break;
case 5: ppu201x[0x5] = V; CSync(); break; }
case 6: cpu410x[0x7] = V; PSync(); break; break;
case 7: cpu410x[0x8] = V; PSync(); break; }
} case 0xa000: mirror = V; CSync(); break;
break; case 0xc000: IRQLatch = V & 0xfe; break;
} case 0xc001: IRQReload = 1; break;
case 0xa000: mirror = V; CSync(); break; case 0xe000: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break;
case 0xc000: IRQLatch = V & 0xfe; break; case 0xe001: IRQa = 1; break;
case 0xc001: IRQReload = 1; break; }
case 0xe000: X6502_IRQEnd(FCEU_IQEXT); IRQa = 0; break;
case 0xe001: IRQa = 1; break;
}
} }
static void UNLOneBusIRQHook(void) static void UNLOneBusIRQHook(void) {
{ uint32 count = IRQCount;
int count = IRQCount; if (!count || IRQReload) {
if(!count || IRQReload) IRQCount = IRQLatch;
{ IRQReload = 0;
IRQCount = IRQLatch; } else
IRQReload = 0; IRQCount--;
} if (count && !IRQCount) {
else if (IRQa)
IRQCount--; X6502_IRQBegin(FCEU_IQEXT);
if(count && !IRQCount) }
{
if(IRQa)
X6502_IRQBegin(FCEU_IQEXT);
}
} }
static DECLFW(UNLOneBusWriteAPU40XX) static DECLFW(UNLOneBusWriteAPU40XX) {
{ // FCEU_printf("APU %04x:%04x\n",A,V);
// FCEU_printf("APU %04x:%04x\n",A,V); apu40xx[A & 0x3f] = V;
apu40xx[A & 0x3f] = V; switch (A & 0x3f) {
switch(A & 0x3f) case 0x12:
{ if (apu40xx[0x30] & 0x10) {
case 0x12: pcm_addr = V << 6;
if(apu40xx[0x30] & 0x10) }
{ case 0x13:
pcm_addr = V << 6; if (apu40xx[0x30] & 0x10) {
} pcm_size = (V << 4) + 1;
case 0x13: }
if(apu40xx[0x30] & 0x10) case 0x15:
{ if (apu40xx[0x30] & 0x10) {
pcm_size = (V << 4) + 1; pcm_enable = V & 0x10;
} if (pcm_irq) {
case 0x15: X6502_IRQEnd(FCEU_IQEXT);
if(apu40xx[0x30] & 0x10) pcm_irq = 0;
{ }
pcm_enable = V&0x10; if (pcm_enable)
if(pcm_irq) pcm_latch = pcm_clock;
{ V &= 0xef;
X6502_IRQEnd(FCEU_IQEXT); }
pcm_irq = 0; }
} defapuwrite[A & 0x3f](A, V);
if(pcm_enable)
pcm_latch = pcm_clock;
V &= 0xef;
}
}
defapuwrite[A & 0x3f](A, V);
} }
static DECLFR(UNLOneBusReadAPU40XX) static DECLFR(UNLOneBusReadAPU40XX) {
{ uint8 result = defapuread[A & 0x3f](A);
uint8 result = defapuread[A & 0x3f](A); // FCEU_printf("read %04x, %02x\n",A,result);
// FCEU_printf("read %04x, %02x\n",A,result); switch (A & 0x3f) {
switch(A & 0x3f) case 0x15:
{ if (apu40xx[0x30] & 0x10) {
case 0x15: result = (result & 0x7f) | pcm_irq;
if(apu40xx[0x30] & 0x10) }
{ }
result = (result & 0x7f) | pcm_irq; return result;
}
}
return result;
} }
static void UNLOneBusCpuHook(int a) static void UNLOneBusCpuHook(int a) {
{ if (pcm_enable) {
if(pcm_enable) pcm_latch -= a;
{ if (pcm_latch <= 0) {
pcm_latch-=a; pcm_latch += pcm_clock;
if(pcm_latch<=0) pcm_size--;
{ if (pcm_size < 0) {
pcm_latch+=pcm_clock; pcm_irq = 0x80;
pcm_size--; pcm_enable = 0;
if(pcm_size<0) X6502_IRQBegin(FCEU_IQEXT);
{ } else {
pcm_irq = 0x80; uint8 raw_pcm = ARead[pcm_addr](pcm_addr) >> 1;
pcm_enable = 0; defapuwrite[0x11](0x4011, raw_pcm);
X6502_IRQBegin(FCEU_IQEXT); pcm_addr++;
} pcm_addr &= 0x7FFF;
else }
{ }
uint8 raw_pcm = ARead[pcm_addr](pcm_addr) >> 1; }
defapuwrite[0x11](0x4011,raw_pcm);
pcm_addr++;
pcm_addr&=0x7FFF;
}
}
}
} }
static void UNLOneBusPower(void) static void UNLOneBusPower(void) {
{ uint32 i;
uint32 i; IRQReload = IRQCount = IRQa = 0;
IRQReload = IRQCount = IRQa = 0;
memset(cpu410x, 0x00, sizeof(cpu410x)); memset(cpu410x, 0x00, sizeof(cpu410x));
memset(ppu201x, 0x00, sizeof(ppu201x)); memset(ppu201x, 0x00, sizeof(ppu201x));
memset(apu40xx, 0x00, sizeof(apu40xx)); memset(apu40xx, 0x00, sizeof(apu40xx));
SetupCartCHRMapping(0, PRGptr[0], PRGsize[0], 0); SetupCartCHRMapping(0, PRGptr[0], PRGsize[0], 0);
for(i=0; i<64; i++) for (i = 0; i < 64; i++) {
{ defapuread[i] = GetReadHandler(0x4000 | i);
defapuread[i] = GetReadHandler(0x4000|i); defapuwrite[i] = GetWriteHandler(0x4000 | i);
defapuwrite[i] = GetWriteHandler(0x4000|i); }
} SetReadHandler(0x4000, 0x403f, UNLOneBusReadAPU40XX);
SetReadHandler(0x4000,0x403f,UNLOneBusReadAPU40XX); SetWriteHandler(0x4000, 0x403f, UNLOneBusWriteAPU40XX);
SetWriteHandler(0x4000,0x403f,UNLOneBusWriteAPU40XX);
SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x2010,0x201f,UNLOneBusWritePPU201X); SetWriteHandler(0x2010, 0x201f, UNLOneBusWritePPU201X);
SetWriteHandler(0x4100,0x410f,UNLOneBusWriteCPU410X); SetWriteHandler(0x4100, 0x410f, UNLOneBusWriteCPU410X);
SetWriteHandler(0x8000,0xffff,UNLOneBusWriteMMC3); SetWriteHandler(0x8000, 0xffff, UNLOneBusWriteMMC3);
Sync(); Sync();
} }
static void UNLOneBusReset(void) static void UNLOneBusReset(void) {
{ IRQReload = IRQCount = IRQa = 0;
IRQReload = IRQCount = IRQa = 0;
memset(cpu410x, 0x00, sizeof(cpu410x)); memset(cpu410x, 0x00, sizeof(cpu410x));
memset(ppu201x, 0x00, sizeof(ppu201x)); memset(ppu201x, 0x00, sizeof(ppu201x));
memset(apu40xx, 0x00, sizeof(apu40xx)); memset(apu40xx, 0x00, sizeof(apu40xx));
Sync(); Sync();
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLOneBus_Init(CartInfo *info) void UNLOneBus_Init(CartInfo *info) {
{ info->Power = UNLOneBusPower;
info->Power=UNLOneBusPower; info->Reset = UNLOneBusReset;
info->Reset=UNLOneBusReset;
if(((*(uint32*)&(info->MD5)) == 0x305fcdc3) || // PowerJoy Supermax Carts if (((*(uint32*)&(info->MD5)) == 0x305fcdc3) || // PowerJoy Supermax Carts
((*(uint32*)&(info->MD5)) == 0x6abfce8e) ) ((*(uint32*)&(info->MD5)) == 0x6abfce8e))
inv_hack = 0xf; inv_hack = 0xf;
GameHBIRQHook=UNLOneBusIRQHook; GameHBIRQHook = UNLOneBusIRQHook;
MapIRQHook=UNLOneBusCpuHook; MapIRQHook = UNLOneBusCpuHook;
GameStateRestore=StateRestore; GameStateRestore = StateRestore;
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

137
src/boards/pec-586.cpp
View File

@ -21,104 +21,95 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[7]; static uint8 reg[7];
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 2, "REG"}, { reg, 2, "REG" },
{0} { 0 }
}; };
static uint8 bs_tbl[128] = { static uint8 bs_tbl[128] = {
0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33,
0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67,
0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33, 0x03, 0x13, 0x23, 0x33,
0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67,
0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32,
0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67, 0x45, 0x67,
0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x00, 0x10, 0x20, 0x30, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x02, 0x12, 0x22, 0x32, 0x00, 0x10, 0x20, 0x30,
0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67, 0x47, 0x67,
}; };
static uint8 br_tbl[16] = { static uint8 br_tbl[16] = {
0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
}; };
static void Sync(void) static void Sync(void) {
{ // setchr4(0x0000,(reg[0]&0x80) >> 7);
// setchr4(0x0000,(reg[0]&0x80) >> 7); // setchr4(0x1000,(reg[0]&0x80) >> 7);
// setchr4(0x1000,(reg[0]&0x80) >> 7); setchr8(0);
setchr8(0); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg16(0x8000, bs_tbl[reg[0] & 0x7f] >> 4);
setprg16(0x8000,bs_tbl[reg[0]&0x7f]>>4); setprg16(0xc000, bs_tbl[reg[0] & 0x7f] & 0xf);
setprg16(0xc000,bs_tbl[reg[0]&0x7f]&0xf); setmirror(MI_V);
setmirror(MI_V);
} }
static DECLFW(UNLPEC586Write) static DECLFW(UNLPEC586Write) {
{ reg[(A & 0x700) >> 8] = V;
reg[(A&0x700)>>8]=V; FCEU_printf("bs %04x %02x\n", A, V);
FCEU_printf("bs %04x %02x\n",A,V); Sync();
Sync();
} }
static DECLFR(UNLPEC586Read) static DECLFR(UNLPEC586Read) {
{ FCEU_printf("read %04x\n", A);
FCEU_printf("read %04x\n",A); return (X.DB & 0xD8) | br_tbl[reg[4] >> 4];
return (X.DB & 0xD8) | br_tbl[reg[4]>>4];
} }
static void UNLPEC586Power(void) static void UNLPEC586Power(void) {
{ reg[0] = 0x0E;
reg[0]=0x0E; Sync();
Sync(); setchr8(0);
setchr8(0); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetReadHandler(0x6000,0x7FFF,CartBR); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x5000, 0x5fff, UNLPEC586Write);
SetWriteHandler(0x5000,0x5fff,UNLPEC586Write); SetReadHandler(0x5000, 0x5fff, UNLPEC586Read);
SetReadHandler(0x5000,0x5fff,UNLPEC586Read);
} }
static void UNLPEC586IRQ(void) static void UNLPEC586IRQ(void) {
{ // if(reg[0]&0x80)
// if(reg[0]&0x80) {
{ if (scanline == 128) {
if(scanline==128) { setchr4(0x0000, 1);
setchr4(0x0000,1); setchr4(0x1000, 0);
setchr4(0x1000,0); } else {
} setchr4(0x0000, 0);
else { setchr4(0x1000, 1);
setchr4(0x0000,0); }
setchr4(0x1000,1); }
}
}
} }
static void UNLPEC586Close(void) static void UNLPEC586Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLPEC586Init(CartInfo *info) void UNLPEC586Init(CartInfo *info) {
{ info->Power = UNLPEC586Power;
info->Power=UNLPEC586Power; info->Close = UNLPEC586Close;
info->Close=UNLPEC586Close; GameHBIRQHook = UNLPEC586IRQ;
GameHBIRQHook=UNLPEC586IRQ; GameStateRestore = StateRestore;
GameStateRestore=StateRestore;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(&StateRegs, ~0, 0, 0); AddExState(&StateRegs, ~0, 0, 0);
} }

68
src/boards/sa-9602b.cpp
View File

@ -21,47 +21,41 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static void SA9602BPW(uint32 A, uint8 V) static void SA9602BPW(uint32 A, uint8 V) {
{ setprg8r(EXPREGS[1], A, V & 0x3F);
setprg8r(EXPREGS[1],A,V&0x3F); if (MMC3_cmd & 0x40)
if(MMC3_cmd&0x40) setprg8r(0, 0x8000, ~(1));
setprg8r(0,0x8000,~(1)); else
else setprg8r(0, 0xc000, ~(1));
setprg8r(0,0xc000,~(1)); setprg8r(0, 0xe000, ~(0));
setprg8r(0,0xe000,~(0));
} }
static DECLFW(SA9602BWrite) static DECLFW(SA9602BWrite) {
{ switch (A & 0xe001) {
switch(A & 0xe001) case 0x8000: EXPREGS[0] = V; break;
{ case 0x8001:
case 0x8000: EXPREGS[0] = V; break; if ((EXPREGS[0] & 7) < 6) {
case 0x8001: EXPREGS[1] = V >> 6;
if((EXPREGS[0] & 7) < 6) FixMMC3PRG(MMC3_cmd);
{ }
EXPREGS[1] = V >> 6; break;
FixMMC3PRG(MMC3_cmd); }
} MMC3_CMDWrite(A, V);
break;
}
MMC3_CMDWrite(A, V);
} }
static void SA9602BPower(void) static void SA9602BPower(void) {
{ EXPREGS[0] = EXPREGS[1] = 0;
EXPREGS[0]=EXPREGS[1]=0; GenMMC3Power();
GenMMC3Power(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xBFFF, SA9602BWrite);
SetWriteHandler(0x8000,0xBFFF,SA9602BWrite);
} }
void SA9602B_Init(CartInfo *info) void SA9602B_Init(CartInfo *info) {
{ GenMMC3_Init(info, 512, 0, 0, 0);
GenMMC3_Init(info, 512, 0, 0, 0); pwrap = SA9602BPW;
pwrap=SA9602BPW; mmc3opts |= 2;
mmc3opts|=2; info->SaveGame[0] = UNIFchrrama;
info->SaveGame[0]=UNIFchrrama; info->SaveGameLen[0] = 32 * 1024;
info->SaveGameLen[0]=32 * 1024; info->Power = SA9602BPower;
info->Power=SA9602BPower; AddExState(EXPREGS, 2, 0, "EXPR");
AddExState(EXPREGS, 2, 0, "EXPR");
} }

611
src/boards/sachen.cpp
View File

@ -23,448 +23,387 @@
static uint8 cmd, dip; static uint8 cmd, dip;
static uint8 latch[8]; static uint8 latch[8];
static void S74LS374MSync(uint8 mirr) static void S74LS374MSync(uint8 mirr) {
{ switch (mirr & 3) {
switch(mirr&3) case 0: setmirror(MI_V); break;
{ case 1: setmirror(MI_H); break;
case 0:setmirror(MI_V);break; case 2: setmirrorw(0, 1, 1, 1); break;
case 1:setmirror(MI_H);break; case 3: setmirror(MI_0); break;
case 2:setmirrorw(0,1,1,1);break; }
case 3:setmirror(MI_0);break;
}
} }
static void S74LS374NSynco(void) static void S74LS374NSynco(void) {
{ setprg32(0x8000, latch[0]);
setprg32(0x8000,latch[0]); setchr8(latch[1] | latch[3] | latch[4]);
setchr8(latch[1]|latch[3]|latch[4]); S74LS374MSync(latch[2]);
S74LS374MSync(latch[2]);
} }
static DECLFW(S74LS374NWrite) static DECLFW(S74LS374NWrite) {
{ A &= 0x4101;
A&=0x4101; if (A == 0x4100)
if(A==0x4100) cmd = V & 7;
cmd=V&7; else{
else switch (cmd) {
{ case 2: latch[0] = V & 1; latch[3] = (V & 1) << 3; break;
switch(cmd) case 4: latch[4] = (V & 1) << 2; break;
{ case 5: latch[0] = V & 7; break;
case 2:latch[0]=V&1; latch[3]=(V&1)<<3;break; case 6: latch[1] = V & 3; break;
case 4:latch[4]=(V&1)<<2;break; case 7: latch[2] = V >> 1; break;
case 5:latch[0]=V&7;break; }
case 6:latch[1]=V&3;break; S74LS374NSynco();
case 7:latch[2]=V>>1;break; }
}
S74LS374NSynco();
}
} }
static DECLFR(S74LS374NRead) static DECLFR(S74LS374NRead) {
{ uint8 ret;
uint8 ret; if ((A & 0x4100) == 0x4100)
if((A&0x4100)==0x4100) // ret=(X.DB&0xC0)|((~cmd)&0x3F);
// ret=(X.DB&0xC0)|((~cmd)&0x3F); ret = ((~cmd) & 0x3F) ^ dip;
ret=((~cmd)&0x3F)^dip; else
else ret = X.DB;
ret=X.DB; return ret;
return ret;
} }
static void S74LS374NPower(void) static void S74LS374NPower(void) {
{ dip = 0;
dip=0; latch[0] = latch[1] = latch[2] = latch[3] = latch[4] = 0;
latch[0]=latch[1]=latch[2]=latch[3]=latch[4]=0; S74LS374NSynco();
S74LS374NSynco(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4100, 0x7FFF, S74LS374NWrite);
SetWriteHandler(0x4100,0x7FFF,S74LS374NWrite); SetReadHandler(0x4100, 0x5fff, S74LS374NRead);
SetReadHandler(0x4100,0x5fff,S74LS374NRead);
} }
static void S74LS374NReset(void) static void S74LS374NReset(void) {
{ dip ^= 1;
dip^=1; latch[0] = latch[1] = latch[2] = latch[3] = latch[4] = 0;
latch[0]=latch[1]=latch[2]=latch[3]=latch[4]=0; S74LS374NSynco();
S74LS374NSynco();
} }
static void S74LS374NRestore(int version) static void S74LS374NRestore(int version) {
{ S74LS374NSynco();
S74LS374NSynco();
} }
void S74LS374N_Init(CartInfo *info) void S74LS374N_Init(CartInfo *info) {
{ info->Power = S74LS374NPower;
info->Power=S74LS374NPower; info->Reset = S74LS374NReset;
info->Reset=S74LS374NReset; GameStateRestore = S74LS374NRestore;
GameStateRestore=S74LS374NRestore; AddExState(latch, 5, 0, "LATC");
AddExState(latch, 5, 0, "LATC"); AddExState(&cmd, 1, 0, "CMD");
AddExState(&cmd, 1, 0, "CMD"); AddExState(&dip, 1, 0, "DIP");
AddExState(&dip, 1, 0, "DIP");
} }
static void S74LS374NASynco(void) static void S74LS374NASynco(void) {
{ setprg32(0x8000, latch[0]);
setprg32(0x8000,latch[0]); setchr8(latch[1]);
setchr8(latch[1]); S74LS374MSync(latch[2]);
S74LS374MSync(latch[2]);
} }
static DECLFW(S74LS374NAWrite) static DECLFW(S74LS374NAWrite) {
{ A &= 0x4101;
A&=0x4101; if (A == 0x4100)
if(A==0x4100) cmd = V & 7;
cmd=V&7; else{
else switch (cmd) {
{ case 0: latch[0] = 0; latch[1] = 3; break;
switch(cmd) case 2: latch[3] = (V & 1) << 3; break;
{ case 4: latch[1] = (latch[1] & 6) | (V & 3); break;
case 0:latch[0]=0;latch[1]=3;break; case 5: latch[0] = V & 1; break;
case 2:latch[3]=(V&1)<<3;break; case 6: latch[1] = (latch[1] & 1) | latch[3] | ((V & 3) << 1); break;
case 4:latch[1]=(latch[1]&6)|(V&3);break; case 7: latch[2] = V & 1; break;
case 5:latch[0]=V&1;break; }
case 6:latch[1]=(latch[1]&1)|latch[3]|((V&3)<<1);break; S74LS374NASynco();
case 7:latch[2]=V&1;break; }
}
S74LS374NASynco();
}
} }
static void S74LS374NAPower(void) static void S74LS374NAPower(void) {
{ latch[0] = latch[2] = latch[3] = latch[4] = 0;
latch[0]=latch[2]=latch[3]=latch[4]=0; latch[1] = 3;
latch[1]=3; S74LS374NASynco();
S74LS374NASynco(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4100, 0x7FFF, S74LS374NAWrite);
SetWriteHandler(0x4100,0x7FFF,S74LS374NAWrite);
} }
void S74LS374NA_Init(CartInfo *info) void S74LS374NA_Init(CartInfo *info) {
{ info->Power = S74LS374NAPower;
info->Power=S74LS374NAPower; GameStateRestore = S74LS374NRestore;
GameStateRestore=S74LS374NRestore; AddExState(latch, 5, 0, "LATC");
AddExState(latch, 5, 0, "LATC"); AddExState(&cmd, 1, 0, "CMD");
AddExState(&cmd, 1, 0, "CMD");
} }
static int type; static int type;
static void S8259Synco(void) static void S8259Synco(void) {
{ int x;
int x; setprg32(0x8000, latch[5] & 7);
setprg32(0x8000,latch[5]&7);
if(!UNIFchrrama) // No CHR RAM? Then BS'ing is ok. if (!UNIFchrrama) { // No CHR RAM? Then BS'ing is ok.
{ for (x = 0; x < 4; x++) {
for(x=0;x<4;x++) int bank;
{ if (latch[7] & 1)
int bank; bank = (latch[0] & 0x7) | ((latch[4] & 7) << 3);
if(latch[7]&1) else
bank=(latch[0]&0x7)|((latch[4]&7)<<3); bank = (latch[x] & 0x7) | ((latch[4] & 7) << 3);
else switch (type) {
bank=(latch[x]&0x7)|((latch[4]&7)<<3); case 00: bank = (bank << 1) | (x & 1); setchr2(0x800 * x, bank); break;
switch (type) case 01: setchr2(0x800 * x, bank); break;
{ case 02: bank = (bank << 2) | (x & 3); setchr2(0x800 * x, bank); break;
case 00: bank=(bank<<1)|(x&1); setchr2(0x800*x,bank); break; case 03:
case 01: setchr2(0x800*x,bank); break; bank = latch[x] & 7;
case 02: bank=(bank<<2)|(x&3); setchr2(0x800*x,bank); break; switch (x & 3) {
case 03: bank=latch[x]&7; case 01: bank |= (latch[4] & 1) << 4; break;
switch (x&3) case 02: bank |= (latch[4] & 2) << 3; break;
{ case 03: bank |= ((latch[4] & 4) << 2) | ((latch[6] & 1) << 3); break;
case 01: bank|=(latch[4]&1)<<4;break; }
case 02: bank|=(latch[4]&2)<<3;break; setchr1(0x400 * x, bank);
case 03: bank|=((latch[4]&4)<<2)|((latch[6]&1)<<3);break; setchr4(0x1000, ~0);
} break;
setchr1(0x400*x,bank); }
setchr4(0x1000,~0); }
break; }
} if (!(latch[7] & 1))
} S74LS374MSync(latch[7] >> 1);
} else
if(!(latch[7]&1)) setmirror(MI_V);
S74LS374MSync(latch[7]>>1);
else
setmirror(MI_V);
} }
static DECLFW(S8259Write) static DECLFW(S8259Write) {
{ A &= 0x4101;
A&=0x4101; if (A == 0x4100)
if(A==0x4100) cmd = V;
cmd=V; else{
else latch[cmd & 7] = V;
{ S8259Synco();
latch[cmd&7]=V; }
S8259Synco();
}
} }
static void S8259Reset(void) static void S8259Reset(void) {
{ int x;
int x; cmd = 0;
cmd=0;
for(x=0;x<8;x++) latch[x]=0; for (x = 0; x < 8; x++) latch[x] = 0;
setchr8(0); setchr8(0);
S8259Synco(); S8259Synco();
SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetWriteHandler(0x4100,0x7FFF,S8259Write); SetWriteHandler(0x4100, 0x7FFF, S8259Write);
} }
static void S8259Restore(int version) static void S8259Restore(int version) {
{ S8259Synco();
S8259Synco();
} }
void S8259A_Init(CartInfo *info) // Kevin's Horton 141 mapper void S8259A_Init(CartInfo *info) { // Kevin's Horton 141 mapper
{ info->Power = S8259Reset;
info->Power=S8259Reset; GameStateRestore = S8259Restore;
GameStateRestore=S8259Restore; AddExState(latch, 8, 0, "LATC");
AddExState(latch, 8, 0, "LATC"); AddExState(&cmd, 1, 0, "CMD");
AddExState(&cmd, 1, 0, "CMD"); type = 0;
type=0;
} }
void S8259B_Init(CartInfo *info) // Kevin's Horton 138 mapper void S8259B_Init(CartInfo *info) { // Kevin's Horton 138 mapper
{ info->Power = S8259Reset;
info->Power=S8259Reset; GameStateRestore = S8259Restore;
GameStateRestore=S8259Restore; AddExState(latch, 8, 0, "LATC");
AddExState(latch, 8, 0, "LATC"); AddExState(&cmd, 1, 0, "CMD");
AddExState(&cmd, 1, 0, "CMD"); type = 1;
type=1;
} }
void S8259C_Init(CartInfo *info) // Kevin's Horton 139 mapper void S8259C_Init(CartInfo *info) { // Kevin's Horton 139 mapper
{ info->Power = S8259Reset;
info->Power=S8259Reset; GameStateRestore = S8259Restore;
GameStateRestore=S8259Restore; AddExState(latch, 8, 0, "LATC");
AddExState(latch, 8, 0, "LATC"); AddExState(&cmd, 1, 0, "CMD");
AddExState(&cmd, 1, 0, "CMD"); type = 2;
type=2;
} }
void S8259D_Init(CartInfo *info) // Kevin's Horton 137 mapper void S8259D_Init(CartInfo *info) { // Kevin's Horton 137 mapper
{ info->Power = S8259Reset;
info->Power=S8259Reset; GameStateRestore = S8259Restore;
GameStateRestore=S8259Restore; AddExState(latch, 8, 0, "LATC");
AddExState(latch, 8, 0, "LATC"); AddExState(&cmd, 1, 0, "CMD");
AddExState(&cmd, 1, 0, "CMD"); type = 3;
type=3;
} }
static void(*WSync)(void); static void (*WSync)(void);
static DECLFW(SAWrite) static DECLFW(SAWrite) {
{ if (A & 0x100) {
if(A&0x100) latch[0] = V;
{ WSync();
latch[0]=V; }
WSync();
}
} }
static void SAPower(void) static void SAPower(void) {
{ latch[0] = 0;
latch[0]=0; WSync();
WSync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4100, 0x5FFF, SAWrite);
SetWriteHandler(0x4100,0x5FFF,SAWrite);
} }
static void SARestore(int version) static void SARestore(int version) {
{ WSync();
WSync();
} }
static DECLFW(SADWrite) static DECLFW(SADWrite) {
{ latch[0] = V;
latch[0]=V; WSync();
WSync();
} }
static void SADPower(void) static void SADPower(void) {
{ latch[0] = 0;
latch[0]=0; WSync();
WSync(); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, SADWrite);
SetWriteHandler(0x8000,0xFFFF,SADWrite);
} }
static void SA0161MSynco() static void SA0161MSynco() {
{ setprg32(0x8000, (latch[0] >> 3) & 1);
setprg32(0x8000,(latch[0]>>3)&1); setchr8(latch[0] & 7);
setchr8(latch[0]&7);
} }
static void SA72007Synco() static void SA72007Synco() {
{ setprg32(0x8000, 0);
setprg32(0x8000,0); setchr8(latch[0] >> 7);
setchr8(latch[0]>>7);
} }
static void SA009Synco() static void SA009Synco() {
{ setprg32(0x8000, 0);
setprg32(0x8000,0); setchr8(latch[0] & 1);
setchr8(latch[0]&1);
} }
static void SA72008Synco() static void SA72008Synco() {
{ setprg32(0x8000, (latch[0] >> 2) & 1);
setprg32(0x8000,(latch[0]>>2)&1); setchr8(latch[0] & 3);
setchr8(latch[0]&3);
} }
void SA0161M_Init(CartInfo *info) void SA0161M_Init(CartInfo *info) {
{ WSync = SA0161MSynco;
WSync=SA0161MSynco; GameStateRestore = SARestore;
GameStateRestore=SARestore; info->Power = SAPower;
info->Power=SAPower; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
void SA72007_Init(CartInfo *info) void SA72007_Init(CartInfo *info) {
{ WSync = SA72007Synco;
WSync=SA72007Synco; GameStateRestore = SARestore;
GameStateRestore=SARestore; info->Power = SAPower;
info->Power=SAPower; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
void SA72008_Init(CartInfo *info) void SA72008_Init(CartInfo *info) {
{ WSync = SA72008Synco;
WSync=SA72008Synco; GameStateRestore = SARestore;
GameStateRestore=SARestore; info->Power = SAPower;
info->Power=SAPower; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
void SA009_Init(CartInfo *info) void SA009_Init(CartInfo *info) {
{ WSync = SA009Synco;
WSync=SA009Synco; GameStateRestore = SARestore;
GameStateRestore=SARestore; info->Power = SAPower;
info->Power=SAPower; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
void SA0036_Init(CartInfo *info) void SA0036_Init(CartInfo *info) {
{ WSync = SA72007Synco;
WSync=SA72007Synco; GameStateRestore = SARestore;
GameStateRestore=SARestore; info->Power = SADPower;
info->Power=SADPower; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
void SA0037_Init(CartInfo *info) void SA0037_Init(CartInfo *info) {
{ WSync = SA0161MSynco;
WSync=SA0161MSynco; GameStateRestore = SARestore;
GameStateRestore=SARestore; info->Power = SADPower;
info->Power=SADPower; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
// ----------------------------------------------- // -----------------------------------------------
static void TCU01Synco() static void TCU01Synco() {
{ setprg32(0x8000, ((latch[0] & 0x80) >> 6) | ((latch[0] >> 2) & 1));
setprg32(0x8000,((latch[0]&0x80)>>6)|((latch[0]>>2)&1)); setchr8((latch[0] >> 3) & 0xF);
setchr8((latch[0]>>3)&0xF);
} }
static DECLFW(TCU01Write) static DECLFW(TCU01Write) {
{ if ((A & 0x103) == 0x102) {
if((A&0x103)==0x102) latch[0] = V;
{ TCU01Synco();
latch[0]=V; }
TCU01Synco();
}
} }
static void TCU01Power(void) static void TCU01Power(void) {
{ latch[0] = 0;
latch[0]=0; SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x4100, 0xFFFF, TCU01Write);
SetWriteHandler(0x4100,0xFFFF,TCU01Write); TCU01Synco();
TCU01Synco();
} }
static void TCU01Restore(int version) static void TCU01Restore(int version) {
{ TCU01Synco();
TCU01Synco();
} }
void TCU01_Init(CartInfo *info) void TCU01_Init(CartInfo *info) {
{ GameStateRestore = TCU01Restore;
GameStateRestore=TCU01Restore; info->Power = TCU01Power;
info->Power=TCU01Power; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
//----------------------------------------------- //-----------------------------------------------
static void TCU02Synco() static void TCU02Synco() {
{ setprg32(0x8000, 0);
setprg32(0x8000,0); setchr8(latch[0] & 3);
setchr8(latch[0]&3);
} }
static DECLFW(TCU02Write) static DECLFW(TCU02Write) {
{ if ((A & 0x103) == 0x102) {
if((A&0x103)==0x102) latch[0] = V + 3;
{ TCU02Synco();
latch[0]=V+3; }
TCU02Synco();
}
} }
static DECLFR(TCU02Read) static DECLFR(TCU02Read) {
{ return (latch[0] & 0x3F) | (X.DB & 0xC0);
return (latch[0]&0x3F)|(X.DB&0xC0);
} }
static void TCU02Power(void) static void TCU02Power(void) {
{ latch[0] = 0;
latch[0]=0; SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x4100, 0x4100, TCU02Read);
SetReadHandler(0x4100,0x4100,TCU02Read); SetWriteHandler(0x4100, 0xFFFF, TCU02Write);
SetWriteHandler(0x4100,0xFFFF,TCU02Write); TCU02Synco();
TCU02Synco();
} }
static void TCU02Restore(int version) static void TCU02Restore(int version) {
{ TCU02Synco();
TCU02Synco();
} }
void TCU02_Init(CartInfo *info) void TCU02_Init(CartInfo *info) {
{ GameStateRestore = TCU02Restore;
GameStateRestore=TCU02Restore; info->Power = TCU02Power;
info->Power=TCU02Power; AddExState(&latch[0], 1, 0, "LATC");
AddExState(&latch[0], 1, 0, "LATC");
} }
// --------------------------------------------- // ---------------------------------------------
static DECLFR(TCA01Read) static DECLFR(TCA01Read) {
{ uint8 ret;
uint8 ret; if ((A & 0x4100) == 0x4100)
if((A&0x4100)==0x4100) ret = (X.DB & 0xC0) | ((~A) & 0x3F);
ret=(X.DB&0xC0)|((~A)&0x3F); else
else ret = X.DB;
ret=X.DB; return ret;
return ret;
} }
static void TCA01Power(void) static void TCA01Power(void) {
{ setprg16(0x8000, 0);
setprg16(0x8000,0); setprg16(0xC000, 1);
setprg16(0xC000,1); setchr8(0);
setchr8(0); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x4100, 0x5FFF, TCA01Read);
SetReadHandler(0x4100,0x5FFF,TCA01Read);
} }
void TCA01_Init(CartInfo *info) void TCA01_Init(CartInfo *info) {
{ info->Power = TCA01Power;
info->Power=TCA01Power;
} }

147
src/boards/sc-127.cpp
View File

@ -23,103 +23,92 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 reg[8], chr[8]; static uint8 reg[8], chr[8];
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
static uint16 IRQCount, IRQa; static uint16 IRQCount, IRQa;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{reg, 8, "REGS"}, { reg, 8, "REGS" },
{chr, 8, "CHRS"}, { chr, 8, "CHRS" },
{&IRQCount, 16, "IRQc"}, { &IRQCount, 16, "IRQc" },
{&IRQa, 16, "IRQa"}, { &IRQa, 16, "IRQa" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ int i;
int i; setprg8(0x8000, reg[0]);
setprg8(0x8000,reg[0]); setprg8(0xA000, reg[1]);
setprg8(0xA000,reg[1]); setprg8(0xC000, reg[2]);
setprg8(0xC000,reg[2]); for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chr[i]);
setchr1(i << 10,chr[i]); setmirror(reg[3] ^ 1);
setmirror(reg[3]^1);
} }
static DECLFW(UNLSC127Write) static DECLFW(UNLSC127Write) {
{ switch (A) {
switch(A) case 0x8000: reg[0] = V; break;
{ case 0x8001: reg[1] = V; break;
case 0x8000: reg[0] = V; break; case 0x8002: reg[2] = V; break;
case 0x8001: reg[1] = V; break; case 0x9000: chr[0] = V; break;
case 0x8002: reg[2] = V; break; case 0x9001: chr[1] = V; break;
case 0x9000: chr[0] = V; break; case 0x9002: chr[2] = V; break;
case 0x9001: chr[1] = V; break; case 0x9003: chr[3] = V; break;
case 0x9002: chr[2] = V; break; case 0x9004: chr[4] = V; break;
case 0x9003: chr[3] = V; break; case 0x9005: chr[5] = V; break;
case 0x9004: chr[4] = V; break; case 0x9006: chr[6] = V; break;
case 0x9005: chr[5] = V; break; case 0x9007: chr[7] = V; break;
case 0x9006: chr[6] = V; break; case 0xC002: IRQa = 0; X6502_IRQEnd(FCEU_IQEXT); break;
case 0x9007: chr[7] = V; break; case 0xC005: IRQCount = V; break;
case 0xC002: IRQa=0; X6502_IRQEnd(FCEU_IQEXT); break; case 0xC003: IRQa = 1; break;
case 0xC005: IRQCount=V; break; case 0xD001: reg[3] = V; break;
case 0xC003: IRQa=1; break; }
case 0xD001: reg[3] = V; break; Sync();
}
Sync();
} }
static void UNLSC127Power(void) static void UNLSC127Power(void) {
{ Sync();
Sync(); setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg8(0xE000, ~0);
setprg8(0xE000,~0); SetReadHandler(0x6000, 0x7fff, CartBR);
SetReadHandler(0x6000,0x7fff,CartBR); SetWriteHandler(0x6000, 0x7fff, CartBW);
SetWriteHandler(0x6000,0x7fff,CartBW); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLSC127Write);
SetWriteHandler(0x8000,0xFFFF,UNLSC127Write);
} }
static void UNLSC127IRQ(void) static void UNLSC127IRQ(void) {
{ if (IRQa) {
if(IRQa) IRQCount--;
{ if (IRQCount == 0) {
IRQCount--; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount==0) IRQa = 0;
{ }
X6502_IRQBegin(FCEU_IQEXT); }
IRQa=0;
}
}
} }
static void UNLSC127Reset(void) static void UNLSC127Reset(void) {
{
} }
static void UNLSC127Close(void) static void UNLSC127Close(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ Sync();
Sync();
} }
void UNLSC127_Init(CartInfo *info) void UNLSC127_Init(CartInfo *info) {
{ info->Reset = UNLSC127Reset;
info->Reset=UNLSC127Reset; info->Power = UNLSC127Power;
info->Power=UNLSC127Power; info->Close = UNLSC127Close;
info->Close=UNLSC127Close; GameHBIRQHook = UNLSC127IRQ;
GameHBIRQHook=UNLSC127IRQ; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; WRAMSIZE = 8192;
WRAMSIZE=8192; WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(WRAM, WRAMSIZE, 0, "WRAM"); AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

91
src/boards/sheroes.cpp
View File

@ -21,68 +21,59 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static uint8 *CHRRAM; // there is no more extern CHRRAM in mmc3.h static uint8 *CHRRAM;
// I need chrram here and local static == local
static uint8 tekker; static uint8 tekker;
static void MSHCW(uint32 A, uint8 V) static void MSHCW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & 0x40)
if(EXPREGS[0]&0x40) setchr8r(0x10, 0);
setchr8r(0x10,0); else{
else if (A < 0x800)
{ setchr1(A, V | ((EXPREGS[0] & 8) << 5));
if(A<0x800) else if (A < 0x1000)
setchr1(A,V|((EXPREGS[0]&8)<<5)); setchr1(A, V | ((EXPREGS[0] & 4) << 6));
else if(A<0x1000) else if (A < 0x1800)
setchr1(A,V|((EXPREGS[0]&4)<<6)); setchr1(A, V | ((EXPREGS[0] & 1) << 8));
else if(A<0x1800) else
setchr1(A,V|((EXPREGS[0]&1)<<8)); setchr1(A, V | ((EXPREGS[0] & 2) << 7));
else }
setchr1(A,V|((EXPREGS[0]&2)<<7));
}
} }
static DECLFW(MSHWrite) static DECLFW(MSHWrite) {
{ EXPREGS[0] = V;
EXPREGS[0]=V; FixMMC3CHR(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} }
static DECLFR(MSHRead) static DECLFR(MSHRead) {
{ return(tekker);
return(tekker);
} }
static void MSHReset(void) static void MSHReset(void) {
{ MMC3RegReset();
MMC3RegReset(); tekker ^= 0xFF;
tekker^=0xFF;
} }
static void MSHPower(void) static void MSHPower(void) {
{ tekker = 0x00;
tekker=0x00; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x4100, 0x4100, MSHWrite);
SetWriteHandler(0x4100,0x4100,MSHWrite); SetReadHandler(0x4100, 0x4100, MSHRead);
SetReadHandler(0x4100,0x4100,MSHRead);
} }
static void MSHClose(void) static void MSHClose(void) {
{ if (CHRRAM)
if(CHRRAM) FCEU_gfree(CHRRAM);
FCEU_gfree(CHRRAM); CHRRAM = NULL;
CHRRAM=NULL;
} }
void UNLSHeroes_Init(CartInfo *info) void UNLSHeroes_Init(CartInfo *info) {
{ GenMMC3_Init(info, 256, 512, 0, 0);
GenMMC3_Init(info, 256, 512, 0, 0); cwrap = MSHCW;
cwrap=MSHCW; info->Power = MSHPower;
info->Power=MSHPower; info->Reset = MSHReset;
info->Reset=MSHReset; info->Close = MSHClose;
info->Close=MSHClose; CHRRAM = (uint8*)FCEU_gmalloc(8192);
CHRRAM = (uint8*)FCEU_gmalloc(8192); SetupCartCHRMapping(0x10, CHRRAM, 8192, 1);
SetupCartCHRMapping(0x10, CHRRAM, 8192, 1); AddExState(EXPREGS, 4, 0, "EXPR");
AddExState(EXPREGS, 4, 0, "EXPR"); AddExState(&tekker, 1, 0, "DIPSW");
AddExState(&tekker, 1, 0, "DIPSW");
} }

154
src/boards/sl1632.cpp
View File

@ -21,103 +21,87 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
// brk is a system call in *nix, and is an illegal variable name - soules
static uint8 chrcmd[8], prg0, prg1, bbrk, mirr, swap; static uint8 chrcmd[8], prg0, prg1, bbrk, mirr, swap;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{chrcmd, 8, "CHRC"}, { chrcmd, 8, "CHRC" },
{&prg0, 1, "PRG0"}, { &prg0, 1, "PRG0" },
{&prg1, 1, "PRG1"}, { &prg1, 1, "PRG1" },
{&bbrk, 1, "BRK"}, { &bbrk, 1, "BRK" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{&swap, 1, "SWAP"}, { &swap, 1, "SWAP" },
{0} { 0 }
}; };
static void Sync(void) static void Sync(void) {
{ int i;
int i; setprg8(0x8000, prg0);
setprg8(0x8000,prg0); setprg8(0xA000, prg1);
setprg8(0xA000,prg1); setprg8(0xC000, ~1);
setprg8(0xC000,~1); setprg8(0xE000, ~0);
setprg8(0xE000,~0); for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chrcmd[i]);
setchr1(i<<10,chrcmd[i]); setmirror(mirr ^ 1);
setmirror(mirr^1);
} }
static void UNLSL1632CW(uint32 A, uint8 V) static void UNLSL1632CW(uint32 A, uint8 V) {
{ int cbase = (MMC3_cmd & 0x80) << 5;
int cbase=(MMC3_cmd&0x80)<<5; int page0 = (bbrk & 0x08) << 5;
int page0=(bbrk&0x08)<<5; int page1 = (bbrk & 0x20) << 3;
int page1=(bbrk&0x20)<<3; int page2 = (bbrk & 0x80) << 1;
int page2=(bbrk&0x80)<<1; setchr1(cbase ^ 0x0000, page0 | (DRegBuf[0] & (~1)));
setchr1(cbase^0x0000,page0|(DRegBuf[0]&(~1))); setchr1(cbase ^ 0x0400, page0 | DRegBuf[0] | 1);
setchr1(cbase^0x0400,page0|DRegBuf[0]|1); setchr1(cbase ^ 0x0800, page0 | (DRegBuf[1] & (~1)));
setchr1(cbase^0x0800,page0|(DRegBuf[1]&(~1))); setchr1(cbase ^ 0x0C00, page0 | DRegBuf[1] | 1);
setchr1(cbase^0x0C00,page0|DRegBuf[1]|1); setchr1(cbase ^ 0x1000, page1 | DRegBuf[2]);
setchr1(cbase^0x1000,page1|DRegBuf[2]); setchr1(cbase ^ 0x1400, page1 | DRegBuf[3]);
setchr1(cbase^0x1400,page1|DRegBuf[3]); setchr1(cbase ^ 0x1800, page2 | DRegBuf[4]);
setchr1(cbase^0x1800,page2|DRegBuf[4]); setchr1(cbase ^ 0x1c00, page2 | DRegBuf[5]);
setchr1(cbase^0x1c00,page2|DRegBuf[5]);
} }
static DECLFW(UNLSL1632CMDWrite) static DECLFW(UNLSL1632CMDWrite) {
{ if (A == 0xA131) {
if(A==0xA131) bbrk = V;
{ }
bbrk=V; if (bbrk & 2) {
} FixMMC3PRG(MMC3_cmd);
if(bbrk&2) FixMMC3CHR(MMC3_cmd);
{ if (A < 0xC000)
FixMMC3PRG(MMC3_cmd); MMC3_CMDWrite(A, V);
FixMMC3CHR(MMC3_cmd); else
if(A<0xC000) MMC3_IRQWrite(A, V);
MMC3_CMDWrite(A,V); } else {
else if ((A >= 0xB000) && (A <= 0xE003)) {
MMC3_IRQWrite(A,V); int ind = ((((A & 2) | (A >> 10)) >> 1) + 2) & 7;
} int sar = ((A & 1) << 2);
else chrcmd[ind] = (chrcmd[ind] & (0xF0 >> sar)) | ((V & 0x0F) << sar);
{ } else
if((A>=0xB000)&&(A<=0xE003)) switch (A & 0xF003) {
{ case 0x8000: prg0 = V; break;
int ind=((((A&2)|(A>>10))>>1)+2)&7; case 0xA000: prg1 = V; break;
int sar=((A&1)<<2); case 0x9000: mirr = V & 1; break;
chrcmd[ind]=(chrcmd[ind]&(0xF0>>sar))|((V&0x0F)<<sar); }
} Sync();
else }
switch(A&0xF003)
{
case 0x8000: prg0=V; break;
case 0xA000: prg1=V; break;
case 0x9000: mirr=V&1; break;
}
Sync();
}
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ if (bbrk & 2) {
if(bbrk&2) FixMMC3PRG(MMC3_cmd);
{ FixMMC3CHR(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); } else
FixMMC3CHR(MMC3_cmd); Sync();
}
else
Sync();
} }
static void UNLSL1632Power(void) static void UNLSL1632Power(void) {
{ GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x4100, 0xFFFF, UNLSL1632CMDWrite);
SetWriteHandler(0x4100,0xFFFF,UNLSL1632CMDWrite);
} }
void UNLSL1632_Init(CartInfo *info) void UNLSL1632_Init(CartInfo *info) {
{ GenMMC3_Init(info, 256, 512, 0, 0);
GenMMC3_Init(info, 256, 512, 0, 0); cwrap = UNLSL1632CW;
cwrap=UNLSL1632CW; info->Power = UNLSL1632Power;
info->Power=UNLSL1632Power; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

119
src/boards/super24.cpp
View File

@ -21,80 +21,73 @@
#include "mapinc.h" #include "mapinc.h"
#include "mmc3.h" #include "mmc3.h"
static uint8 *CHRRAM = NULL; // there is no more extern CHRRAM in mmc3.h static uint8 *CHRRAM = NULL;
// I need chrram here and local static == local static int masko8[8] = { 63, 31, 15, 1, 3, 0, 0, 0 };
static int masko8[8]={63,31,15,1,3,0,0,0};
static void Super24PW(uint32 A, uint8 V) static void Super24PW(uint32 A, uint8 V) {
{ uint32 NV = V & masko8[EXPREGS[0] & 7];
uint32 NV=V&masko8[EXPREGS[0]&7]; NV |= (EXPREGS[1] << 1);
NV|=(EXPREGS[1]<<1); setprg8r((NV >> 6) & 0xF, A, NV);
setprg8r((NV>>6)&0xF,A,NV);
} }
static void Super24CW(uint32 A, uint8 V) static void Super24CW(uint32 A, uint8 V) {
{ if (EXPREGS[0] & 0x20)
if(EXPREGS[0]&0x20) setchr1r(0x10, A, V);
setchr1r(0x10,A,V); else{
else uint32 NV = V | (EXPREGS[2] << 3);
{ setchr1r((NV >> 9) & 0xF, A, NV);
uint32 NV=V|(EXPREGS[2]<<3); }
setchr1r((NV>>9)&0xF,A,NV);
}
} }
static DECLFW(Super24Write) static DECLFW(Super24Write) {
{ switch (A) {
switch(A) case 0x5FF0:
{ EXPREGS[0] = V;
case 0x5FF0: EXPREGS[0]=V; FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
FixMMC3CHR(MMC3_cmd); break;
break; case 0x5FF1:
case 0x5FF1: EXPREGS[1]=V; EXPREGS[1] = V;
FixMMC3PRG(MMC3_cmd); FixMMC3PRG(MMC3_cmd);
break; break;
case 0x5FF2: EXPREGS[2]=V; case 0x5FF2:
FixMMC3CHR(MMC3_cmd); EXPREGS[2] = V;
break; FixMMC3CHR(MMC3_cmd);
} break;
}
} }
static void Super24Power(void) static void Super24Power(void) {
{ EXPREGS[0] = 0x24;
EXPREGS[0]=0x24; EXPREGS[1] = 159;
EXPREGS[1]=159; EXPREGS[2] = 0;
EXPREGS[2]=0; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x5000, 0x7FFF, Super24Write);
SetWriteHandler(0x5000,0x7FFF,Super24Write); SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR);
} }
static void Super24Reset(void) static void Super24Reset(void) {
{ EXPREGS[0] = 0x24;
EXPREGS[0]=0x24; EXPREGS[1] = 159;
EXPREGS[1]=159; EXPREGS[2] = 0;
EXPREGS[2]=0; MMC3RegReset();
MMC3RegReset();
} }
static void Super24Close(void) static void Super24Close(void) {
{ if (CHRRAM)
if(CHRRAM) FCEU_gfree(CHRRAM);
FCEU_gfree(CHRRAM); CHRRAM = NULL;
CHRRAM = NULL;
} }
void Super24_Init(CartInfo *info) void Super24_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 256, 0, 0);
GenMMC3_Init(info, 128, 256, 0, 0); info->Power = Super24Power;
info->Power=Super24Power; info->Reset = Super24Reset;
info->Reset=Super24Reset; info->Close = Super24Close;
info->Close=Super24Close; cwrap = Super24CW;
cwrap=Super24CW; pwrap = Super24PW;
pwrap=Super24PW; CHRRAM = (uint8*)FCEU_gmalloc(8192);
CHRRAM=(uint8*)FCEU_gmalloc(8192); SetupCartCHRMapping(0x10, CHRRAM, 8192, 1);
SetupCartCHRMapping(0x10, CHRRAM, 8192, 1); AddExState(CHRRAM, 8192, 0, "CHRR");
AddExState(CHRRAM, 8192, 0, "CHRR"); AddExState(EXPREGS, 3, 0, "BIG2");
AddExState(EXPREGS, 3, 0, "BIG2");
} }

69
src/boards/supervision.cpp
View File

@ -22,53 +22,44 @@
static uint8 cmd0, cmd1; static uint8 cmd0, cmd1;
static void DoSuper(void) static void DoSuper(void) {
{ setprg8r((cmd0 & 0xC) >> 2, 0x6000, ((cmd0 & 0x3) << 4) | 0xF);
setprg8r((cmd0&0xC)>>2,0x6000,((cmd0&0x3)<<4)|0xF); if (cmd0 & 0x10) {
if(cmd0&0x10) setprg16r((cmd0 & 0xC) >> 2, 0x8000, ((cmd0 & 0x3) << 3) | (cmd1 & 7));
{ setprg16r((cmd0 & 0xC) >> 2, 0xc000, ((cmd0 & 0x3) << 3) | 7);
setprg16r((cmd0&0xC)>>2,0x8000,((cmd0&0x3)<<3)|(cmd1&7)); } else
setprg16r((cmd0&0xC)>>2,0xc000,((cmd0&0x3)<<3)|7); setprg32r(4, 0x8000, 0);
} setmirror(((cmd0 & 0x20) >> 5) ^ 1);
else
setprg32r(4,0x8000,0);
setmirror(((cmd0&0x20)>>5)^1);
} }
static DECLFW(SuperWrite) static DECLFW(SuperWrite) {
{ if (!(cmd0 & 0x10)) {
if(!(cmd0&0x10)) cmd0 = V;
{ DoSuper();
cmd0=V; }
DoSuper();
}
} }
static DECLFW(SuperHi) static DECLFW(SuperHi) {
{ cmd1 = V;
cmd1=V; DoSuper();
DoSuper();
} }
static void SuperReset(void) static void SuperReset(void) {
{ SetWriteHandler(0x6000, 0x7FFF, SuperWrite);
SetWriteHandler(0x6000,0x7FFF,SuperWrite); SetWriteHandler(0x8000, 0xFFFF, SuperHi);
SetWriteHandler(0x8000,0xFFFF,SuperHi); SetReadHandler(0x6000, 0xFFFF, CartBR);
SetReadHandler(0x6000,0xFFFF,CartBR); cmd0 = cmd1 = 0;
cmd0=cmd1=0; setprg32r(4, 0x8000, 0);
setprg32r(4,0x8000,0); setchr8(0);
setchr8(0);
} }
static void SuperRestore(int version) static void SuperRestore(int version) {
{ DoSuper();
DoSuper();
} }
void Supervision16_Init(CartInfo *info) void Supervision16_Init(CartInfo *info) {
{ AddExState(&cmd0, 1, 0, "L1");
AddExState(&cmd0, 1, 0,"L1"); AddExState(&cmd1, 1, 0, "L2");
AddExState(&cmd1, 1, 0,"L2"); info->Power = SuperReset;
info->Power=SuperReset; GameStateRestore = SuperRestore;
GameStateRestore=SuperRestore;
} }

136
src/boards/t-227-1.cpp
View File

@ -25,92 +25,76 @@
static uint8 reset_flag = 0x07; static uint8 reset_flag = 0x07;
static void BMCT2271CW(uint32 A, uint8 V) static void BMCT2271CW(uint32 A, uint8 V) {
{ uint32 va = V;
uint32 va = V; if (EXPREGS[0] & 0x20) {
if(EXPREGS[0]&0x20) va |= 0x200;
{ va |= (EXPREGS[0] & 0x10) << 4;
va|=0x200; } else {
va|=(EXPREGS[0]&0x10)<<4; va &= 0x7F;
} va |= (EXPREGS[0] & 0x18) << 4;
else }
{ setchr1(A, va);
va&=0x7F;
va|=(EXPREGS[0]&0x18)<<4;
}
setchr1(A,va);
} }
static void BMCT2271PW(uint32 A, uint8 V) static void BMCT2271PW(uint32 A, uint8 V) {
{ uint32 va = V & 0x3F;
uint32 va = V & 0x3F; if (EXPREGS[0] & 0x20) {
if(EXPREGS[0]&0x20) va &= 0x1F;
{ va |= 0x40;
va&=0x1F; va |= (EXPREGS[0] & 0x10) << 1;
va|=0x40; } else {
va|=(EXPREGS[0]&0x10)<<1; va &= 0x0F;
} va |= (EXPREGS[0] & 0x18) << 1;
else }
{ switch (EXPREGS[0] & 3) {
va&=0x0F; case 0x00: setprg8(A, va); break;
va|=(EXPREGS[0]&0x18)<<1; case 0x02:
} {
switch(EXPREGS[0]&3) va = (va & 0xFD) | ((EXPREGS[0] & 4) >> 1);
{ if (A < 0xC000) {
case 0x00: setprg8(A,va); break; setprg16(0x8000, va >> 1);
case 0x02: setprg16(0xC000, va >> 1);
{ }
va=(va&0xFD)|((EXPREGS[0]&4)>>1); break;
if(A<0xC000) }
{ case 0x01:
setprg16(0x8000,va >> 1); case 0x03: if (A < 0xC000) setprg32(0x8000, va >> 2); break;
setprg16(0xC000,va >> 1); }
}
break;
}
case 0x01:
case 0x03: if(A<0xC000) setprg32(0x8000,va >> 2); break;
}
} }
static DECLFW(BMCT2271LoWrite) static DECLFW(BMCT2271LoWrite) {
{ if (!(EXPREGS[0] & 0x80))
if(!(EXPREGS[0]&0x80)) EXPREGS[0] = A & 0xFF;
EXPREGS[0] = A & 0xFF; FixMMC3PRG(MMC3_cmd);
FixMMC3PRG(MMC3_cmd); FixMMC3CHR(MMC3_cmd);
FixMMC3CHR(MMC3_cmd);
} }
static DECLFR(BMCT2271HiRead) static DECLFR(BMCT2271HiRead) {
{ uint32 av = A;
uint32 av = A; if (EXPREGS[0] & 0x40) av = (av & 0xFFF0) | reset_flag;
if(EXPREGS[0]&0x40) av = (av & 0xFFF0)|reset_flag; return CartBR(av);
return CartBR(av);
} }
static void BMCT2271Reset(void) static void BMCT2271Reset(void) {
{ EXPREGS[0] = 0x00;
EXPREGS[0] = 0x00; reset_flag++;
reset_flag++; reset_flag &= 0x0F;
reset_flag&=0x0F; MMC3RegReset();
MMC3RegReset();
} }
static void BMCT2271Power(void) static void BMCT2271Power(void) {
{ EXPREGS[0] = 0x00;
EXPREGS[0] = 0x00; GenMMC3Power();
GenMMC3Power(); SetWriteHandler(0x6000, 0x7FFF, BMCT2271LoWrite);
SetWriteHandler(0x6000,0x7FFF,BMCT2271LoWrite); SetReadHandler(0x8000, 0xFFFF, BMCT2271HiRead);
SetReadHandler(0x8000,0xFFFF,BMCT2271HiRead);
} }
void BMCT2271_Init(CartInfo *info) void BMCT2271_Init(CartInfo *info) {
{ GenMMC3_Init(info, 128, 128, 8, 0);
GenMMC3_Init(info, 128, 128, 8, 0); pwrap = BMCT2271PW;
pwrap=BMCT2271PW; cwrap = BMCT2271CW;
cwrap=BMCT2271CW; info->Power = BMCT2271Power;
info->Power=BMCT2271Power; info->Reset = BMCT2271Reset;
info->Reset=BMCT2271Reset; AddExState(EXPREGS, 1, 0, "EXPR");
AddExState(EXPREGS, 1, 0, "EXPR");
} }

141
src/boards/tf-1201.cpp
View File

@ -28,97 +28,82 @@ static uint8 IRQCount;
static uint8 IRQPre; static uint8 IRQPre;
static uint8 IRQa; static uint8 IRQa;
static SFORMAT StateRegs[]= static SFORMAT StateRegs[] =
{ {
{&prg0, 1, "PRG0"}, { &prg0, 1, "PRG0" },
{&prg0, 1, "PRG1"}, { &prg0, 1, "PRG1" },
{&mirr, 1, "MIRR"}, { &mirr, 1, "MIRR" },
{&swap, 1, "SWAP"}, { &swap, 1, "SWAP" },
{chr, 8, "CHR"}, { chr, 8, "CHR" },
{&IRQCount, 1, "IRQC"}, { &IRQCount, 1, "IRQC" },
{&IRQPre, 1, "IRQP"}, { &IRQPre, 1, "IRQP" },
{&IRQa, 1, "IRQA"}, { &IRQa, 1, "IRQA" },
{0} { 0 }
}; };
static void SyncPrg(void) static void SyncPrg(void) {
{ if (swap & 3) {
if(swap&3) setprg8(0x8000, ~1);
{ setprg8(0xC000, prg0);
setprg8(0x8000,~1); } else {
setprg8(0xC000,prg0); setprg8(0x8000, prg0);
} setprg8(0xC000, ~1);
else }
{ setprg8(0xA000, prg1);
setprg8(0x8000,prg0); setprg8(0xE000, ~0);
setprg8(0xC000,~1);
}
setprg8(0xA000,prg1);
setprg8(0xE000,~0);
} }
static void SyncChr(void) static void SyncChr(void) {
{ int i;
int i; for (i = 0; i < 8; i++)
for(i=0; i<8; i++) setchr1(i << 10, chr[i]);
setchr1(i<<10,chr[i]); setmirror(mirr ^ 1);
setmirror(mirr^1);
} }
static void StateRestore(int version) static void StateRestore(int version) {
{ SyncPrg();
SyncPrg(); SyncChr();
SyncChr();
} }
static DECLFW(UNLTF1201Write) static DECLFW(UNLTF1201Write) {
{ A = (A & 0xF003) | ((A & 0xC) >> 2);
A=(A&0xF003)|((A&0xC)>>2); if ((A >= 0xB000) && (A <= 0xE003)) {
if((A>=0xB000)&&(A<=0xE003)) int ind = (((A >> 11) - 6) | (A & 1)) & 7;
{ int sar = ((A & 2) << 1);
int ind=(((A>>11)-6)|(A&1))&7; chr[ind] = (chr[ind] & (0xF0 >> sar)) | ((V & 0x0F) << sar);
int sar=((A&2)<<1); SyncChr();
chr[ind]=(chr[ind]&(0xF0>>sar))|((V&0x0F)<<sar); } else switch (A & 0xF003) {
SyncChr(); case 0x8000: prg0 = V; SyncPrg(); break;
} case 0xA000: prg1 = V; SyncPrg(); break;
else switch (A&0xF003) case 0x9000: mirr = V & 1; SyncChr(); break;
{ case 0x9001: swap = V & 3; SyncPrg(); break;
case 0x8000: prg0=V; SyncPrg(); break; case 0xF000: IRQCount = ((IRQCount & 0xF0) | (V & 0xF)); break;
case 0xA000: prg1=V; SyncPrg(); break; case 0xF002: IRQCount = ((IRQCount & 0x0F) | ((V & 0xF) << 4)); break;
case 0x9000: mirr=V&1; SyncChr(); break; case 0xF001:
case 0x9001: swap=V&3; SyncPrg(); break; case 0xF003: IRQa = V & 2; X6502_IRQEnd(FCEU_IQEXT); if (scanline < 240) IRQCount -= 8; break;
case 0xF000: IRQCount=((IRQCount&0xF0)|(V&0xF)); break; }
case 0xF002: IRQCount=((IRQCount&0x0F)|((V&0xF)<<4)); break;
case 0xF001:
case 0xF003: IRQa=V&2; X6502_IRQEnd(FCEU_IQEXT); if(scanline<240) IRQCount-=8; break;
}
} }
static void UNLTF1201IRQCounter(void) static void UNLTF1201IRQCounter(void) {
{ if (IRQa) {
if(IRQa) IRQCount++;
{ if (IRQCount == 237) {
IRQCount++; X6502_IRQBegin(FCEU_IQEXT);
if(IRQCount==237) }
{ }
X6502_IRQBegin(FCEU_IQEXT);
}
}
} }
static void UNLTF1201Power(void) static void UNLTF1201Power(void) {
{ IRQPre = IRQCount = IRQa = 0;
IRQPre=IRQCount=IRQa=0; SetReadHandler(0x8000, 0xFFFF, CartBR);
SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000, 0xFFFF, UNLTF1201Write);
SetWriteHandler(0x8000,0xFFFF,UNLTF1201Write); SyncPrg();
SyncPrg(); SyncChr();
SyncChr();
} }
void UNLTF1201_Init(CartInfo *info) void UNLTF1201_Init(CartInfo *info) {
{ info->Power = UNLTF1201Power;
info->Power=UNLTF1201Power; GameHBIRQHook = UNLTF1201IRQCounter;
GameHBIRQHook=UNLTF1201IRQCounter; GameStateRestore = StateRestore;
GameStateRestore=StateRestore; AddExState(&StateRegs, ~0, 0, 0);
AddExState(&StateRegs, ~0, 0, 0);
} }

115
src/boards/transformer.cpp
View File

@ -20,7 +20,7 @@
#include "mapinc.h" #include "mapinc.h"
static uint8 *WRAM=NULL; static uint8 *WRAM = NULL;
static uint32 WRAMSIZE; static uint32 WRAMSIZE;
unsigned int *GetKeyboard(void); // FIXME: 10/28 - now implemented in SDL as well. should we rename this to a FCEUI_* function? unsigned int *GetKeyboard(void); // FIXME: 10/28 - now implemented in SDL as well. should we rename this to a FCEUI_* function?
@ -28,76 +28,69 @@ unsigned int *GetKeyboard(void); // FIXME: 10/28 - now implemented in SDL as wel
static unsigned int *TransformerKeys, oldkeys[256]; static unsigned int *TransformerKeys, oldkeys[256];
static int TransformerCycleCount, TransformerChar = 0; static int TransformerCycleCount, TransformerChar = 0;
static void TransformerIRQHook(int a) static void TransformerIRQHook(int a) {
{ TransformerCycleCount += a;
TransformerCycleCount+=a; if (TransformerCycleCount >= 1000) {
if(TransformerCycleCount >= 1000) uint32 i;
{ TransformerCycleCount -= 1000;
uint32 i; TransformerKeys = GetKeyboard();
TransformerCycleCount -= 1000;
TransformerKeys = GetKeyboard();
for(i=0; i<256; i++) { for (i = 0; i < 256; i++) {
if(oldkeys[i] != TransformerKeys[i]) { if (oldkeys[i] != TransformerKeys[i]) {
if(oldkeys[i] == 0) if (oldkeys[i] == 0)
TransformerChar = i; TransformerChar = i;
else else
TransformerChar = i | 0x80; TransformerChar = i | 0x80;
X6502_IRQBegin(FCEU_IQEXT); X6502_IRQBegin(FCEU_IQEXT);
memcpy((void *)&oldkeys[0], (void *)TransformerKeys, 256); memcpy((void*)&oldkeys[0], (void*)TransformerKeys, sizeof(oldkeys));
break; break;
} }
} }
} }
} }
static DECLFR(TransformerRead) static DECLFR(TransformerRead) {
{ uint8 ret = 0;
uint8 ret = 0; switch (A & 3) {
switch(A&3) { case 0: ret = TransformerChar & 15; break;
case 0: ret = TransformerChar & 15; break; case 1: ret = (TransformerChar >> 4); break;
case 1: ret = (TransformerChar >> 4); break; case 2: break;
case 2: break; case 4: break;
case 4: break; }
} X6502_IRQEnd(FCEU_IQEXT);
X6502_IRQEnd(FCEU_IQEXT); return ret;
return ret;
} }
static void TransformerPower(void) static void TransformerPower(void) {
{ setprg8r(0x10, 0x6000, 0);
setprg8r(0x10,0x6000,0); setprg16(0x8000, 0);
setprg16(0x8000,0); setprg16(0xC000, ~0);
setprg16(0xC000,~0); setchr8(0);
setchr8(0);
SetReadHandler(0x5000,0x5004,TransformerRead); SetReadHandler(0x5000, 0x5004, TransformerRead);
SetReadHandler(0x6000,0x7FFF,CartBR); SetReadHandler(0x6000, 0x7FFF, CartBR);
SetWriteHandler(0x6000,0x7FFF,CartBW); SetWriteHandler(0x6000, 0x7FFF, CartBW);
SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x8000, 0xFFFF, CartBR);
MapIRQHook=TransformerIRQHook; MapIRQHook = TransformerIRQHook;
} }
static void TransformerClose(void) static void TransformerClose(void) {
{ if (WRAM)
if(WRAM) FCEU_gfree(WRAM);
FCEU_gfree(WRAM); WRAM = NULL;
WRAM=NULL;
} }
void Transformer_Init(CartInfo *info) void Transformer_Init(CartInfo *info) {
{ info->Power = TransformerPower;
info->Power=TransformerPower; info->Close = TransformerClose;
info->Close=TransformerClose;
WRAMSIZE=8192; WRAMSIZE = 8192;
WRAM=(uint8*)FCEU_gmalloc(WRAMSIZE); WRAM = (uint8*)FCEU_gmalloc(WRAMSIZE);
SetupCartPRGMapping(0x10,WRAM,WRAMSIZE,1); SetupCartPRGMapping(0x10, WRAM, WRAMSIZE, 1);
if(info->battery) if (info->battery) {
{ info->SaveGame[0] = WRAM;
info->SaveGame[0]=WRAM; info->SaveGameLen[0] = WRAMSIZE;
info->SaveGameLen[0]=WRAMSIZE; }
} AddExState(WRAM, WRAMSIZE, 0, "WRAM");
AddExState(WRAM, WRAMSIZE, 0, "WRAM");
} }

3
src/boards/vrc2and4.cpp
View File

@ -87,8 +87,7 @@ static DECLFW(VRC24Write) {
else{ else{
uint16 i = ((A >> 1) & 1) | ((A - 0xB000) >> 11); uint16 i = ((A >> 1) & 1) | ((A - 0xB000) >> 11);
uint16 nibble = ((A & 1) << 2); uint16 nibble = ((A & 1) << 2);
chrreg[i] &= (0xF0) >> nibble; chrreg[i] = (chrreg[i] & (0xF0 >> nibble)) | ((V & 0xF) << nibble);
chrreg[i] |= (V & 0xF) << nibble;
if(nibble) if(nibble)
chrhi[i] = (V & 0x10) << 4; // another one many in one feature from pirate carts chrhi[i] = (V & 0x10) << 4; // another one many in one feature from pirate carts
} }

2
src/boards/vrc3.cpp
View File

@ -74,7 +74,7 @@ static DECLFW(M73Write) {
} }
static void M73IRQHook(int a) { static void M73IRQHook(int a) {
uint32 i; int32 i;
if (!IRQa) return; if (!IRQa) return;
for (i = 0; i < a; i++) { for (i = 0; i < a; i++) {
if (IRQm) { if (IRQm) {

4
src/boards/vrc6.cpp
View File

@ -231,7 +231,7 @@ static void DoSawV(void) {
} }
static INLINE void DoSQVHQ(int x) { static INLINE void DoSQVHQ(int x) {
int32 V; uint32 V;
int32 amp = ((vpsg1[x << 2] & 15) << 8) * 6 / 8; int32 amp = ((vpsg1[x << 2] & 15) << 8) * 6 / 8;
if (vpsg1[(x << 2) | 0x2] & 0x80) { if (vpsg1[(x << 2) | 0x2] & 0x80) {
@ -265,7 +265,7 @@ static void DoSQV2HQ(void) {
static void DoSawVHQ(void) { static void DoSawVHQ(void) {
static uint8 b3 = 0; static uint8 b3 = 0;
static int32 phaseacc = 0; static int32 phaseacc = 0;
int32 V; uint32 V;
if (vpsg2[2] & 0x80) { if (vpsg2[2] & 0x80) {
for (V = cvbc[2]; V < SOUNDTS; V++) { for (V = cvbc[2]; V < SOUNDTS; V++) {

1
vc/vc10_fceux.vcxproj
View File

@ -361,7 +361,6 @@
<ClCompile Include="..\src\boards\mmc1.cpp" /> <ClCompile Include="..\src\boards\mmc1.cpp" />
<ClCompile Include="..\src\boards\mmc3.cpp" /> <ClCompile Include="..\src\boards\mmc3.cpp" />
<ClCompile Include="..\src\boards\mmc5.cpp" /> <ClCompile Include="..\src\boards\mmc5.cpp" />
<ClCompile Include="..\src\boards\n-c22m.cpp" />
<ClCompile Include="..\src\boards\n106.cpp" /> <ClCompile Include="..\src\boards\n106.cpp" />
<ClCompile Include="..\src\boards\n625092.cpp" /> <ClCompile Include="..\src\boards\n625092.cpp" />
<ClCompile Include="..\src\boards\novel.cpp" /> <ClCompile Include="..\src\boards\novel.cpp" />

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