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fceux
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just futzing around

This commit is contained in:
zeromus 2008-08-21 14:54:48 +00:00
parent 1dda88031c
commit 34f6554719
3 changed files with 70 additions and 21 deletions
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40
src/boards/mmc5.cpp
View File

@ -80,6 +80,43 @@ typedef struct __cartdata {
uint8 size;
} cartdata;
static void mmc5_PPUWrite(uint32 A, uint8 V) {
uint32 tmp = A;
extern uint8 PALRAM[0x20];
if(tmp>=0x3F00)
{
// hmmm....
if(!(tmp&0xf))
PALRAM[0x00]=PALRAM[0x04]=PALRAM[0x08]=PALRAM[0x0C]=V&0x3F;
else if(tmp&3) PALRAM[(tmp&0x1f)]=V&0x3f;
}
else if(tmp<0x2000)
{
if(PPUCHRRAM&(1<<(tmp>>10)))
VPage[tmp>>10][tmp]=V;
}
else
{
if(PPUNTARAM&(1<<((tmp&0xF00)>>10)))
vnapage[((tmp&0xF00)>>10)][tmp&0x3FF]=V;
}
}
uint8 mmc5_PPURead(uint32 A) {
uint32 tmp = A;
if(tmp<0x2000)
{
return VPage[tmp>>10][tmp];
}
else
{
return vnapage[(tmp>>10)&0x3][tmp&0x3FF];
}
}
// ETROM seems to have 16KB of WRAM, ELROM seems to have 8KB
// EWROM seems to have 32KB of WRAM
@ -818,6 +855,9 @@ static void GenMMC5_Init(CartInfo *info, int wsize, int battery)
MMC5HackCHRMode=0;
MMC5HackSPMode=MMC5HackSPScroll=MMC5HackSPPage=0;
Mapper5_ESI();
FFCEUX_PPURead = mmc5_PPURead;
FFCEUX_PPUWrite = mmc5_PPUWrite;
}
void Mapper5_Init(CartInfo *info)

46
src/ppu.cpp
View File

@ -338,7 +338,7 @@ int FCEUPPU_GetAttr(int ntnum, int xt, int yt) {
}
//new ppu-----
void FFCEUX_PPUWrite_Default(uint32 A, uint8 V) {
inline void FFCEUX_PPUWrite_Default(uint32 A, uint8 V) {
uint32 tmp = A;
if(tmp>=0x3F00)
@ -374,8 +374,18 @@ uint8 FFCEUX_PPURead_Default(uint32 A) {
}
uint8 (*FFCEUX_PPURead)(uint32 A) = FFCEUX_PPURead_Default;
void (*FFCEUX_PPUWrite)(uint32 A, uint8 V) = FFCEUX_PPUWrite_Default;
uint8 (*FFCEUX_PPURead)(uint32 A) = 0;
void (*FFCEUX_PPUWrite)(uint32 A, uint8 V) = 0;
#define CALL_PPUREAD(A) (FFCEUX_PPURead?FFCEUX_PPURead(A):(\
((A)<0x2000)? \
VPage[(A)>>10][(A)] \
: vnapage[((A)>>10)&0x3][(A)&0x3FF] \
))
#define CALL_PPUWRITE(A,V) (FFCEUX_PPUWrite?FFCEUX_PPUWrite(A,V):FFCEUX_PPUWrite_Default(A,V))
//whether to use the new ppu
int newppu=0;
//---------------
@ -447,7 +457,7 @@ static DECLFR(A2007)
//mbg
ret = VRAMBuffer;
RefreshAddr = ppur.get_2007access();
VRAMBuffer = FFCEUX_PPURead(RefreshAddr);
VRAMBuffer = CALL_PPUREAD(RefreshAddr);
ppur.increment2007(INC32!=0);
RefreshAddr = ppur.get_2007access();
return ret;
@ -624,7 +634,7 @@ static DECLFW(B2007)
if(newppu) {
RefreshAddr = ppur.get_2007access();
FFCEUX_PPUWrite(RefreshAddr,V);
CALL_PPUWRITE(RefreshAddr,V);
if(RefreshAddr == 0x2679) {
int zzz=9;
}
@ -1746,17 +1756,13 @@ int totpputime=0;
const int kLineTime=1364;
const int kFetchTime=8;
int idleSynch = 0;
void runcpu() {
//cpu runs 1/12 as fast as ppu.
if(pputime<12) return;
int cputodo = pputime/12;
X6502_Run(cputodo*3); //why *3 i dunno thats how the cpu core is setup
pputime -= cputodo*12;
}
void runppu(int x) {
pputime+=x;
totpputime+=x;
runcpu();
int cputodo = pputime>>2;
//if(cputodo<200) return;
X6502_Run(cputodo); //why *3 i dunno thats how the cpu core is setup
pputime -= cputodo<<2;
}
struct BGData {
@ -1765,11 +1771,11 @@ struct BGData {
void Read() {
RefreshAddr = ppur.get_ntread();
nt = FFCEUX_PPURead(RefreshAddr);
nt = CALL_PPUREAD(RefreshAddr);
runppu(kFetchTime);
RefreshAddr = ppur.get_atread();
at = FFCEUX_PPURead(RefreshAddr);
at = CALL_PPUREAD(RefreshAddr);
runppu(kFetchTime);
//modify at to get appropriate palette shift
@ -1780,10 +1786,10 @@ struct BGData {
ppur.par = nt;
RefreshAddr = ppur.get_ptread();
pt[0] = FFCEUX_PPURead(RefreshAddr);
pt[0] = CALL_PPUREAD(RefreshAddr);
runppu(kFetchTime);
RefreshAddr |= 8;
pt[1] = FFCEUX_PPURead(RefreshAddr);
pt[1] = CALL_PPUREAD(RefreshAddr);
runppu(kFetchTime);
if(PPUON)
@ -2033,10 +2039,10 @@ int FCEUX_PPU_Loop(int skip) {
//pattern table fetches
RefreshAddr = patternAddress;
oam[4] = FFCEUX_PPURead(RefreshAddr);
oam[4] = CALL_PPUREAD(RefreshAddr);
runppu(kFetchTime);
RefreshAddr += 8;
oam[5] = FFCEUX_PPURead(RefreshAddr);
oam[5] = CALL_PPUREAD(RefreshAddr);
runppu(kFetchTime);

3
src/ppu.h
View File

@ -18,4 +18,7 @@ void FCEUPPU_SaveState(void);
void FCEUPPU_LoadState(int version);
uint8* FCEUPPU_GetCHR(uint32 vadr, uint32 refreshaddr);
extern uint8 (*FFCEUX_PPURead)(uint32 A);
extern void (*FFCEUX_PPUWrite)(uint32 A, uint8 V);
extern int scanline;