CDROM: Further adjust IRQ delay
Fixes audio dropouts in Crime Crackers, Ogre Battle seems fine now as well.
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@ -30711,6 +30711,9 @@ SCPS-10003:
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name: "Crime Crackers (Japan)"
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controllers:
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- DigitalController
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settings:
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dmaMaxSliceTicks: 100 # Stops DMA from blazing past the deferred CDROM async interrupt.
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displayActiveEndOffset: -1 # Fixes garbage on edge of screen in cutscenes.
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codes:
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- HASH-111C340E270B10A8
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metadata:
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@ -60,8 +60,8 @@ enum : u32
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MAX_FAST_FORWARD_RATE = 12,
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FAST_FORWARD_RATE_STEP = 4,
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MINIMUM_INTERRUPT_DELAY = 6000,
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INTERRUPT_DELAY_CYCLES = 2000,
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MINIMUM_INTERRUPT_DELAY = 1000,
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INTERRUPT_DELAY_CYCLES = 500,
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};
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static constexpr u8 INTERRUPT_REGISTER_MASK = 0x1F;
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@ -1033,9 +1033,16 @@ void CDROM::WriteRegister(u32 offset, u8 value)
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case 5:
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{
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DEBUG_LOG("Interrupt flag register <- 0x{:02X}", value);
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const u8 prev_interrupt_flag_register = s_interrupt_flag_register;
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s_interrupt_flag_register &= ~(value & INTERRUPT_REGISTER_MASK);
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if (s_interrupt_flag_register == 0)
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{
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// Start the countdown from when the interrupt was cleared, not it being triggered.
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// Otherwise Ogre Battle, Crime Crackers, Lego Racers, etc have issues.
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if (prev_interrupt_flag_register != 0)
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s_last_interrupt_time = System::GetGlobalTickCounter();
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InterruptController::SetLineState(InterruptController::IRQ::CDROM, false);
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if (HasPendingAsyncInterrupt() && !HasPendingCommand())
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QueueDeliverAsyncInterrupt();
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@ -1159,7 +1166,6 @@ bool CDROM::HasPendingAsyncInterrupt()
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void CDROM::SetInterrupt(Interrupt interrupt)
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{
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s_interrupt_flag_register = static_cast<u8>(interrupt);
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s_last_interrupt_time = System::GetGlobalTickCounter();
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UpdateInterruptRequest();
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}
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@ -1205,14 +1211,12 @@ void CDROM::QueueDeliverAsyncInterrupt()
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// interrupt, then read the FIFO. If an INT1 comes in during that time, it'll read the INT1 response
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// instead of the INT3 response, and the game gets confused. So, we just delay INT1s a bit, if there
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// has been any recent INT3s - give it enough time to read the response out. The real console does
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// something similar anyway, the INT1 task won't run immediately after the INT3 is cleared. We use
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// the response FIFO being empty as a second heuristic, to avoid very late INT1s that cause early
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// buffer loads and sector retries in other games, like Lego Racers PAL.
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// something similar anyway, the INT1 task won't run immediately after the INT3 is cleared.
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DebugAssert(HasPendingAsyncInterrupt());
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// underflows here are okay
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const u32 diff = System::GetGlobalTickCounter() - s_last_interrupt_time;
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if (diff >= MINIMUM_INTERRUPT_DELAY || s_response_fifo.IsEmpty())
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if (diff >= MINIMUM_INTERRUPT_DELAY)
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{
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DeliverAsyncInterrupt(nullptr, 0, 0);
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}
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@ -555,7 +555,10 @@ void System::UpdateOverclock()
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u32 System::GetGlobalTickCounter()
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{
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return TimingEvents::GetGlobalTickCounter() + CPU::GetPendingTicks();
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// When running events, the counter actually goes backwards, because the pending ticks are added in chunks.
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// So, we need to return the counter with all pending ticks added in such cases.
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return TimingEvents::IsRunningEvents() ? TimingEvents::GetEventRunTickCounter() :
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(TimingEvents::GetGlobalTickCounter() + CPU::GetPendingTicks());
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}
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u32 System::GetFrameNumber()
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