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CPU/Recompiler: Optimize beq zero, zero, addr to unconditional branch 

Seems to exist in some BIOS code. Credit to @Dillonb for the idea.
This commit is contained in:
Connor McLaughlin 2020-10-04 00:11:03 +10:00
parent 55f0915534
commit f071497be5
1 changed files with 14 additions and 5 deletions
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19
src/core/cpu_recompiler_code_generator.cpp
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@ -1736,11 +1736,20 @@ bool CodeGenerator::Compile_Branch(const CodeBlockInstruction& cbi)
// npc = pc + (sext(imm) << 2)
Value branch_target = CalculatePC(cbi.instruction.i.imm_sext32() << 2);
// branch <- rs op rt
Value lhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rs, true, true);
Value rhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rt);
const Condition condition = (cbi.instruction.op == InstructionOp::beq) ? Condition::Equal : Condition::NotEqual;
DoBranch(condition, lhs, rhs, Reg::count, std::move(branch_target));
// beq zero, zero, addr -> unconditional branch
if (cbi.instruction.op == InstructionOp::beq && cbi.instruction.i.rs == Reg::zero &&
cbi.instruction.i.rt == Reg::zero)
{
DoBranch(Condition::Always, Value(), Value(), Reg::count, std::move(branch_target));
}
else
{
// branch <- rs op rt
Value lhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rs, true, true);
Value rhs = m_register_cache.ReadGuestRegister(cbi.instruction.i.rt);
const Condition condition = (cbi.instruction.op == InstructionOp::beq) ? Condition::Equal : Condition::NotEqual;
DoBranch(condition, lhs, rhs, Reg::count, std::move(branch_target));
}
}
break;