CPU: Use pending ticks as downcount comparison

Saves a few cycles decrementing the downcount.

src/core/cpu_code_cache.cpp

@@ -39,16 +39,14 @@ void CodeCache::Initialize(System* system, Core* core, Bus* bus, bool use_recomp
 
 void CodeCache::Execute()
 {
-  if (m_core->m_downcount < 0)
-    return;
-
   CodeBlockKey next_block_key = GetNextBlockKey();
 
-  for (;;)
+  while (m_core->m_pending_ticks < m_core->m_downcount)
   {
     if (m_core->HasPendingInterrupt())
     {
       // TODO: Fill in m_next_instruction...
+      //m_core->SafeReadMemoryWord(m_core->m_regs.pc, &m_core->m_next_instruction.bits);
       m_core->DispatchInterrupt();
       next_block_key = GetNextBlockKey();
     }
@@ -58,8 +56,7 @@ void CodeCache::Execute()
     {
       Log_WarningPrintf("Falling back to uncached interpreter at 0x%08X", m_core->GetRegs().pc);
       InterpretUncachedBlock();
-      if (m_core->m_downcount < 0)
-        break;
+      continue;
     }
 
   reexecute_block:
@@ -79,7 +76,7 @@ void CodeCache::Execute()
     else
       InterpretCachedBlock(*block);
 
-    if (m_core->m_downcount < 0)
+    if (m_core->m_pending_ticks >= m_core->m_downcount)
       break;
     else if (m_core->HasPendingInterrupt() || !USE_BLOCK_LINKING)
       continue;
@@ -426,8 +423,7 @@ void CodeCache::InterpretCachedBlock(const CodeBlock& block)
 
   for (const CodeBlockInstruction& cbi : block.instructions)
   {
-    m_core->m_pending_ticks += 1;
-    m_core->m_downcount -= 1;
+    m_core->m_pending_ticks++;
 
     // now executing the instruction we previously fetched
     m_core->m_current_instruction.bits = cbi.instruction.bits;
@@ -463,8 +459,7 @@ void CodeCache::InterpretUncachedBlock()
   bool in_branch_delay_slot = false;
   for (;;)
   {
-    m_core->m_pending_ticks += 1;
-    m_core->m_downcount -= 1;
+    m_core->m_pending_ticks++;
 
     // now executing the instruction we previously fetched
     m_core->m_current_instruction.bits = m_core->m_next_instruction.bits;

src/core/cpu_core.cpp

@@ -123,7 +123,7 @@ bool Core::ReadMemoryByte(VirtualMemoryAddress addr, u8* value)
     return false;
   }
 
-  AddTicks(cycles);
+  m_pending_ticks += cycles;
   return true;
 }
 
@@ -141,7 +141,7 @@ bool Core::ReadMemoryHalfWord(VirtualMemoryAddress addr, u16* value)
     return false;
   }
 
-  AddTicks(cycles);
+  m_pending_ticks += cycles;
   return true;
 }
 
@@ -157,7 +157,7 @@ bool Core::ReadMemoryWord(VirtualMemoryAddress addr, u32* value)
     return false;
   }
 
-  AddTicks(cycles);
+  m_pending_ticks += cycles;
   return true;
 }
 
@@ -579,13 +579,12 @@ void Core::DisassembleAndPrint(u32 addr, u32 instructions_before /* = 0 */, u32
 
 void Core::Execute()
 {
-  while (m_downcount >= 0)
+  while (m_pending_ticks <= m_downcount)
   {
     if (HasPendingInterrupt())
       DispatchInterrupt();
 
-    m_pending_ticks += 1;
-    m_downcount -= 1;
+    m_pending_ticks++;
 
     // now executing the instruction we previously fetched
     m_current_instruction.bits = m_next_instruction.bits;

src/core/cpu_core.h

@@ -91,13 +91,6 @@ private:
   bool InUserMode() const { return m_cop0_regs.sr.KUc; }
   bool InKernelMode() const { return !m_cop0_regs.sr.KUc; }
 
-  // timing
-  ALWAYS_INLINE void AddTicks(TickCount ticks)
-  {
-    m_pending_ticks += ticks;
-    m_downcount -= ticks;
-  }
-
   void DisassembleAndPrint(u32 addr);
   void DisassembleAndLog(u32 addr);
   void DisassembleAndPrint(u32 addr, u32 instructions_before, u32 instructions_after);

src/core/cpu_recompiler_code_generator.cpp

@@ -847,7 +847,6 @@ void CodeGenerator::AddPendingCycles()
     return;
 
   EmitAddCPUStructField(offsetof(Core, m_pending_ticks), Value::FromConstantU32(m_delayed_cycles_add));
-  EmitAddCPUStructField(offsetof(Core, m_downcount), Value::FromConstantU32(~u32(m_delayed_cycles_add - 1)));
   m_delayed_cycles_add = 0;
 }
 

src/core/cpu_recompiler_thunks.cpp

@@ -14,7 +14,7 @@ u64 Thunks::ReadMemoryByte(Core* cpu, u32 address)
     return UINT64_C(0xFFFFFFFFFFFFFFFF);
   }
 
-  cpu->AddTicks(cycles);
+  cpu->m_pending_ticks += cycles;
   return ZeroExtend64(temp);
 }
 
@@ -31,7 +31,7 @@ u64 Thunks::ReadMemoryHalfWord(Core* cpu, u32 address)
     return UINT64_C(0xFFFFFFFFFFFFFFFF);
   }
 
-  cpu->AddTicks(cycles);
+  cpu->m_pending_ticks += cycles;
   return ZeroExtend64(temp);
 }
 
@@ -48,7 +48,7 @@ u64 Thunks::ReadMemoryWord(Core* cpu, u32 address)
     return UINT64_C(0xFFFFFFFFFFFFFFFF);
   }
 
-  cpu->AddTicks(cycles);
+  cpu->m_pending_ticks += cycles;
   return ZeroExtend64(temp);
 }