CPU/Recompiler: Fix ICache updates on ARM32
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5687dd22bd
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@ -178,8 +178,8 @@ void armEmitFarLoad(vixl::aarch32::Assembler* armAsm, const vixl::aarch32::Regis
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armAsm->ldr(reg, vixl::aarch32::MemOperand(reg));
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}
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void armEmitFarStore(vixl::aarch32::Assembler* armAsm, const vixl::aarch32::Register& reg, const void* addr,
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const vixl::aarch32::Register& tempreg)
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[[maybe_unused]] void armEmitFarStore(vixl::aarch32::Assembler* armAsm, const vixl::aarch32::Register& reg,
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const void* addr, const vixl::aarch32::Register& tempreg)
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{
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armMoveAddressToReg(armAsm, tempreg, addr);
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armAsm->str(reg, vixl::aarch32::MemOperand(tempreg));
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@ -634,12 +634,20 @@ void CPU::ARM32Recompiler::GenerateICacheCheckAndUpdate()
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const u32 line = GetICacheLine(current_pc);
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const u32 offset = OFFSETOF(State, icache_tags) + (line * sizeof(u32));
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// Offsets must be <4K on ARM.
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MemOperand line_addr = MemOperand(RSTATE, offset);
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if (offset >= 4096)
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{
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armEmitMov(armAsm, RSCRATCH, offset);
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line_addr = MemOperand(RSTATE, RSCRATCH);
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}
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Label cache_hit;
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armAsm->ldr(existing_tag_reg, MemOperand(RSTATE, offset));
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armAsm->ldr(existing_tag_reg, line_addr);
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armAsm->cmp(existing_tag_reg, current_tag_reg);
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armAsm->b(eq, &cache_hit);
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armAsm->str(current_tag_reg, MemOperand(RSTATE, offset));
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armAsm->str(current_tag_reg, line_addr);
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armAsm->add(ticks_reg, ticks_reg, armCheckAddSubConstant(static_cast<u32>(fill_ticks)));
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armAsm->bind(&cache_hit);
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