diff --git a/src/core/cpu_core.cpp b/src/core/cpu_core.cpp
index 8c726dd60..f11175f0b 100644
--- a/src/core/cpu_core.cpp
+++ b/src/core/cpu_core.cpp
@@ -98,7 +98,7 @@ static bool WriteMemoryByte(VirtualMemoryAddress addr, u32 value);
 static bool WriteMemoryHalfWord(VirtualMemoryAddress addr, u32 value);
 static bool WriteMemoryWord(VirtualMemoryAddress addr, u32 value);
 
-alignas(HOST_CACHE_LINE_SIZE) State g_state;
+constinit State g_state;
 bool TRACE_EXECUTION = false;
 
 static fastjmp_buf s_jmp_buf;
diff --git a/src/core/cpu_core.h b/src/core/cpu_core.h
index 0bdb75238..ed98a2286 100644
--- a/src/core/cpu_core.h
+++ b/src/core/cpu_core.h
@@ -70,7 +70,7 @@ struct PGXPValue
   }
 };
 
-struct State
+struct ALIGN_TO_CACHE_LINE State
 {
   // ticks the CPU has executed
   u32 downcount = 0;
@@ -80,8 +80,8 @@ struct State
   Registers regs = {};
   Cop0Registers cop0_regs = {};
 
-  u32 pc;  // at execution time: the address of the next instruction to execute (already fetched)
-  u32 npc; // at execution time: the address of the next instruction to fetch
+  u32 pc = 0;  // at execution time: the address of the next instruction to execute (already fetched)
+  u32 npc = 0; // at execution time: the address of the next instruction to fetch
 
   // address of the instruction currently being executed
   Instruction current_instruction = {};
@@ -125,7 +125,7 @@ struct State
   static constexpr u32 GTERegisterOffset(u32 index) { return OFFSETOF(State, gte_regs.r32) + (sizeof(u32) * index); }
 };
 
-ALIGN_TO_CACHE_LINE extern State g_state;
+extern State g_state;
 
 void Initialize();
 void Shutdown();