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SPU: Ensure all samples are generated prior to DMA write

This commit is contained in:
Stenzek 2024-08-06 21:56:24 +10:00
parent c97516b01d
commit d1f0669374
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2 changed files with 8 additions and 1 deletions
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2
src/core/cdrom.cpp
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@ -1449,7 +1449,7 @@ TickCount CDROM::GetTicksForSeek(CDImage::LBA new_lba, bool ignore_speed_change)
ticks += ticks_per_sector * std::min<u32>(5u, lba_diff);
seconds = 0.0f;
}
else if (lba_diff < 6200)
else if (lba_diff < 7200)
{
// Not sled. The point at which we switch from faster to slower seeks varies across the disc. Around ~60 distance
// towards the end, but ~330 at the beginning. Likely based on sectors per track, so we use a logarithmic curve.

7
src/core/spu.cpp
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@ -341,6 +341,7 @@ static s16 ReverbRead(u32 address, s32 offset = 0);
static void ReverbWrite(u32 address, s16 data);
static void ProcessReverb(s16 left_in, s16 right_in, s32* left_out, s32* right_out);
static void InternalGeneratePendingSamples();
static void Execute(void* param, TickCount ticks, TickCount ticks_late);
static void UpdateEventInterval();
@ -1268,6 +1269,7 @@ void SPU::ExecuteTransfer(void* param, TickCount ticks, TickCount ticks_late)
{
const RAMTransferMode mode = s_state.SPUCNT.ram_transfer_mode;
DebugAssert(mode != RAMTransferMode::Stopped);
InternalGeneratePendingSamples();
if (mode == RAMTransferMode::DMARead)
{
@ -1483,6 +1485,11 @@ void SPU::GeneratePendingSamples()
if (s_state.transfer_event.IsActive())
s_state.transfer_event.InvokeEarly();
InternalGeneratePendingSamples();
}
void SPU::InternalGeneratePendingSamples()
{
const TickCount ticks_pending = s_state.tick_event.GetTicksSinceLastExecution();
TickCount frames_to_execute;
if (g_settings.cpu_overclock_active)