Refactor timing to allow sync/updates in the middle of a slice
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parent
ad316162f3
commit
c988af453c
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@ -264,7 +264,7 @@ bool SDLInterface::HandleSDLEvent(const SDL_Event* event)
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m_controller->SetButtonState(DigitalController::Button::L2, pressed);
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return true;
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case SDL_SCANCODE_3:
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m_controller->SetButtonState(DigitalController::Button::R3, pressed);
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m_controller->SetButtonState(DigitalController::Button::R2, pressed);
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return true;
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case SDL_SCANCODE_RETURN:
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@ -26,7 +26,8 @@ bool Core::Initialize(Bus* bus)
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void Core::Reset()
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{
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m_slice_ticks = std::numeric_limits<decltype(m_slice_ticks)>::max();
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m_pending_ticks = 0;
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m_downcount = MAX_SLICE_SIZE;
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m_regs = {};
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@ -47,7 +48,8 @@ void Core::Reset()
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bool Core::DoState(StateWrapper& sw)
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{
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sw.Do(&m_slice_ticks);
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sw.Do(&m_pending_ticks);
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sw.Do(&m_downcount);
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sw.DoArray(m_regs.r, countof(m_regs.r));
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sw.Do(&m_regs.pc);
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sw.Do(&m_regs.hi);
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@ -312,12 +314,12 @@ void Core::DisassembleAndPrint(u32 addr)
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PrintInstruction(bits, addr);
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}
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TickCount Core::Execute()
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void Core::Execute()
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{
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TickCount executed_ticks = 0;
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while (executed_ticks < m_slice_ticks)
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while (m_downcount >= 0)
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{
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executed_ticks++;
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m_pending_ticks += 3;
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m_downcount -= 3;
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// now executing the instruction we previously fetched
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const Instruction inst = m_next_instruction;
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@ -340,10 +342,6 @@ TickCount Core::Execute()
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m_load_delay_old_value = m_next_load_delay_old_value;
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m_next_load_delay_old_value = 0;
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}
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// reset slice ticks, it'll be updated when the components execute
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m_slice_ticks = MAX_CPU_SLICE_SIZE;
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return executed_ticks;
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}
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bool Core::FetchInstruction()
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@ -27,12 +27,16 @@ public:
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void Reset();
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bool DoState(StateWrapper& sw);
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TickCount Execute();
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void Execute();
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const Registers& GetRegs() const { return m_regs; }
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Registers& GetRegs() { return m_regs; }
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void SetSliceTicks(TickCount downcount) { m_slice_ticks = (downcount < m_slice_ticks ? downcount : m_slice_ticks); }
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TickCount GetPendingTicks() const { return m_pending_ticks; }
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void ResetPendingTicks() { m_pending_ticks = 0; }
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void SetDowncount(TickCount downcount) { m_downcount = (downcount < m_downcount) ? downcount : m_downcount; }
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void ResetDowncount() { m_downcount = MAX_SLICE_SIZE; }
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// Sets the PC and flushes the pipeline.
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void SetPC(u32 new_pc);
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@ -101,8 +105,9 @@ private:
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Bus* m_bus = nullptr;
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// ticks of master/CPU clock until the next event
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TickCount m_slice_ticks = 0;
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// ticks the CPU has executed
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TickCount m_pending_ticks = 0;
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TickCount m_downcount = MAX_SLICE_SIZE;
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Registers m_regs = {};
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Cop0Registers m_cop0_regs = {};
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@ -256,7 +256,7 @@ void GPU::UpdateCRTCConfig()
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void GPU::UpdateSliceTicks()
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{
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// the next event is at the end of the next scanline
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#if 1
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#if 0
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const TickCount ticks_until_next_event = m_crtc_state.ticks_per_scanline - m_crtc_state.current_tick_in_scanline;
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#else
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// or at vblank. this will depend on the timer config..
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@ -267,7 +267,7 @@ void GPU::UpdateSliceTicks()
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// convert to master clock, rounding up as we want to overshoot not undershoot
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const TickCount system_ticks = (ticks_until_next_event * 7 + 10) / 11;
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m_system->SetSliceTicks(system_ticks);
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m_system->SetDowncount(system_ticks);
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}
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void GPU::Execute(TickCount ticks)
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@ -57,7 +57,9 @@ void InterruptController::WriteRegister(u32 offset, u32 value)
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{
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case 0x00: // I_STATUS
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{
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Log_DebugPrintf("Clearing bits 0x%08X", value);
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if ((m_interrupt_status_register & ~value) != 0)
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Log_DebugPrintf("Clearing bits 0x%08X", (m_interrupt_status_register & ~value));
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m_interrupt_status_register = m_interrupt_status_register & (value & REGISTER_WRITE_MASK);
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UpdateCPUInterruptRequest();
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}
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@ -52,7 +52,7 @@ bool System::Initialize()
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if (!m_pad->Initialize(m_interrupt_controller.get()))
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return false;
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if (!m_timers->Initialize(m_interrupt_controller.get()))
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if (!m_timers->Initialize(this, m_interrupt_controller.get()))
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return false;
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return true;
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@ -89,8 +89,6 @@ bool System::DoState(StateWrapper& sw)
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void System::Reset()
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{
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SetSliceTicks(1);
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m_cpu->Reset();
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m_bus->Reset();
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m_dma->Reset();
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@ -119,12 +117,8 @@ void System::RunFrame()
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u32 current_frame_number = m_frame_number;
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while (current_frame_number == m_frame_number)
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{
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const TickCount pending_ticks = m_cpu->Execute();
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// run pending ticks from CPU for other components
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m_gpu->Execute(pending_ticks * 3);
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m_timers->AddTicks(2, m_timers->IsUsingExternalClock(2) ? (pending_ticks / 8) : pending_ticks);
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m_cpu->Execute();
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Synchronize();
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}
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}
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@ -215,9 +209,20 @@ bool System::LoadEXE(const char* filename)
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return true;
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}
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void System::SetSliceTicks(TickCount downcount)
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void System::Synchronize()
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{
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m_cpu->SetSliceTicks(downcount);
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m_cpu->ResetDowncount();
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const TickCount pending_ticks = m_cpu->GetPendingTicks();
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m_cpu->ResetPendingTicks();
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m_gpu->Execute(pending_ticks);
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m_timers->AddSystemTicks(pending_ticks);
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}
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void System::SetDowncount(TickCount downcount)
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{
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m_cpu->SetDowncount(downcount);
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}
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void System::SetPadDevice(u32 slot, std::shared_ptr<PadDevice> dev)
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@ -42,7 +42,8 @@ public:
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bool LoadEXE(const char* filename);
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void SetSliceTicks(TickCount downcount);
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void SetDowncount(TickCount downcount);
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void Synchronize();
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void SetPadDevice(u32 slot, std::shared_ptr<PadDevice> dev);
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@ -2,14 +2,16 @@
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#include "YBaseLib/Log.h"
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#include "common/state_wrapper.h"
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#include "interrupt_controller.h"
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#include "system.h"
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Log_SetChannel(Timers);
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Timers::Timers() = default;
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Timers::~Timers() = default;
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bool Timers::Initialize(InterruptController* interrupt_controller)
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bool Timers::Initialize(System* system, InterruptController* interrupt_controller)
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{
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m_system = system;
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m_interrupt_controller = interrupt_controller;
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return true;
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}
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@ -103,6 +105,16 @@ void Timers::AddTicks(u32 timer, u32 count)
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cs.counter = 0;
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}
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void Timers::AddSystemTicks(u32 ticks)
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{
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if (!m_states[0].external_counting_enabled && m_states[0].counting_enabled)
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AddTicks(0, ticks);
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if (!m_states[1].external_counting_enabled && m_states[1].counting_enabled)
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AddTicks(1, ticks);
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if (m_states[2].counting_enabled)
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AddTicks(2, m_states[2].external_counting_enabled ? (ticks / 8) : (ticks));
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}
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u32 Timers::ReadRegister(u32 offset)
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{
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const u32 timer_index = (offset >> 4) & u32(0x03);
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@ -113,15 +125,20 @@ u32 Timers::ReadRegister(u32 offset)
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switch (port_offset)
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{
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case 0x00:
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{
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m_system->Synchronize();
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return cs.counter;
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}
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case 0x04:
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{
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m_system->Synchronize();
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const u32 bits = cs.mode.bits;
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cs.mode.reached_overflow = false;
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cs.mode.reached_target = false;
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return bits;
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}
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break;
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case 0x08:
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return cs.target;
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@ -142,13 +159,17 @@ void Timers::WriteRegister(u32 offset, u32 value)
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switch (port_offset)
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{
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case 0x00:
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{
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Log_DebugPrintf("Timer %u write counter %u", timer_index, value);
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m_system->Synchronize();
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cs.counter = value & u32(0xFFFF);
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}
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break;
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case 0x04:
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{
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Log_DebugPrintf("Timer %u write mode register 0x%04X", timer_index, value);
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m_system->Synchronize();
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cs.mode.bits = value & u32(0x1FFF);
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cs.use_external_clock = (cs.mode.clock_source & (timer_index == 2 ? 2 : 1)) != 0;
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cs.counter = 0;
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@ -157,8 +178,11 @@ void Timers::WriteRegister(u32 offset, u32 value)
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break;
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case 0x08:
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{
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Log_DebugPrintf("Timer %u write target 0x%04X", timer_index, ZeroExtend32(Truncate16(value)));
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m_system->Synchronize();
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cs.target = value & u32(0xFFFF);
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}
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break;
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default:
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@ -5,6 +5,7 @@
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class StateWrapper;
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class System;
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class InterruptController;
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class Timers
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@ -13,7 +14,7 @@ public:
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Timers();
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~Timers();
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bool Initialize(InterruptController* interrupt_controller);
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bool Initialize(System* system, InterruptController* interrupt_controller);
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void Reset();
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bool DoState(StateWrapper& sw);
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@ -22,6 +23,7 @@ public:
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// dot clock/hblank/sysclk div 8
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bool IsUsingExternalClock(u32 timer) const { return m_states[timer].external_counting_enabled; }
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void AddTicks(u32 timer, u32 ticks);
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void AddSystemTicks(u32 ticks);
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u32 ReadRegister(u32 offset);
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void WriteRegister(u32 offset, u32 value);
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@ -70,6 +72,7 @@ private:
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void UpdateDowncount();
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u32 GetSystemTicksForTimerTicks(u32 timer) const;
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System* m_system = nullptr;
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InterruptController* m_interrupt_controller = nullptr;
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std::array<CounterState, NUM_TIMERS> m_states{};
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@ -20,5 +20,5 @@ enum class MemoryAccessSize : u32
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using TickCount = s32;
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static constexpr TickCount MASTER_CLOCK = 44100 * 0x300; // 33868800Hz or 33.8688MHz, also used as CPU clock
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static constexpr TickCount MAX_CPU_SLICE_SIZE = MASTER_CLOCK / 10;
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static constexpr TickCount MAX_SLICE_SIZE = MASTER_CLOCK / 10;
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