CPU: Enable exception logging
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@ -318,7 +318,6 @@ ALWAYS_INLINE_RELEASE void CPU::RaiseException(u32 CAUSE_bits, u32 EPC, u32 vect
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g_state.cop0_regs.cause.bits = (g_state.cop0_regs.cause.bits & ~Cop0Registers::CAUSE::EXCEPTION_WRITE_MASK) |
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g_state.cop0_regs.cause.bits = (g_state.cop0_regs.cause.bits & ~Cop0Registers::CAUSE::EXCEPTION_WRITE_MASK) |
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(CAUSE_bits & Cop0Registers::CAUSE::EXCEPTION_WRITE_MASK);
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(CAUSE_bits & Cop0Registers::CAUSE::EXCEPTION_WRITE_MASK);
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#ifdef _DEBUG
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if (g_state.cop0_regs.cause.Excode != Exception::INT && g_state.cop0_regs.cause.Excode != Exception::Syscall &&
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if (g_state.cop0_regs.cause.Excode != Exception::INT && g_state.cop0_regs.cause.Excode != Exception::Syscall &&
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g_state.cop0_regs.cause.Excode != Exception::BP)
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g_state.cop0_regs.cause.Excode != Exception::BP)
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{
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{
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@ -335,7 +334,6 @@ ALWAYS_INLINE_RELEASE void CPU::RaiseException(u32 CAUSE_bits, u32 EPC, u32 vect
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g_state.cop0_regs.cause.BD ? "true" : "false", g_state.cop0_regs.cause.CE.GetValue());
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g_state.cop0_regs.cause.BD ? "true" : "false", g_state.cop0_regs.cause.CE.GetValue());
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}
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}
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}
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}
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#endif
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if (g_state.cop0_regs.cause.BD)
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if (g_state.cop0_regs.cause.BD)
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{
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{
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