diff --git a/src/core/cpu_newrec_compiler_aarch32.cpp b/src/core/cpu_newrec_compiler_aarch32.cpp index d3f97b97e..10a009f43 100644 --- a/src/core/cpu_newrec_compiler_aarch32.cpp +++ b/src/core/cpu_newrec_compiler_aarch32.cpp @@ -1576,6 +1576,8 @@ void CPU::NewRec::AArch32Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const Register addr = Register(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, false, use_fastmem); // TODO: if address is constant, this can be simplified.. @@ -1585,7 +1587,6 @@ void CPU::NewRec::AArch32Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize UpdateLoadDelay(); // We'd need to be careful here if we weren't overwriting it.. - const Register addr = Register(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); armAsm->and_(RARG1, addr, armCheckLogicalConstant(~0x3u)); GenerateLoad(RARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RRET; }); @@ -1768,11 +1769,12 @@ void CPU::NewRec::AArch32Compiler::Compile_swx(CompileFlags cf, MemoryAccessSize const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const Register addr = Register(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, true, use_fastmem); // TODO: if address is constant, this can be simplified.. // We'd need to be careful here if we weren't overwriting it.. - const Register addr = Register(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); armAsm->and_(RARG1, addr, armCheckLogicalConstant(~0x3u)); GenerateLoad(RARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RRET; }); diff --git a/src/core/cpu_newrec_compiler_aarch64.cpp b/src/core/cpu_newrec_compiler_aarch64.cpp index 2840fea29..a30d9133f 100644 --- a/src/core/cpu_newrec_compiler_aarch64.cpp +++ b/src/core/cpu_newrec_compiler_aarch64.cpp @@ -1555,6 +1555,8 @@ void CPU::NewRec::AArch64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const WRegister addr = WRegister(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, false, use_fastmem); // TODO: if address is constant, this can be simplified.. @@ -1564,7 +1566,6 @@ void CPU::NewRec::AArch64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize UpdateLoadDelay(); // We'd need to be careful here if we weren't overwriting it.. - const WRegister addr = WRegister(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); armAsm->and_(RWARG1, addr, armCheckLogicalConstant(~0x3u)); GenerateLoad(RWARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RWRET; }); @@ -1747,11 +1748,12 @@ void CPU::NewRec::AArch64Compiler::Compile_swx(CompileFlags cf, MemoryAccessSize const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const WRegister addr = WRegister(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, true, use_fastmem); // TODO: if address is constant, this can be simplified.. // We'd need to be careful here if we weren't overwriting it.. - const WRegister addr = WRegister(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); armAsm->and_(RWARG1, addr, armCheckLogicalConstant(~0x3u)); GenerateLoad(RWARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RWRET; }); diff --git a/src/core/cpu_newrec_compiler_riscv64.cpp b/src/core/cpu_newrec_compiler_riscv64.cpp index 5c2f646c1..d5d52295b 100644 --- a/src/core/cpu_newrec_compiler_riscv64.cpp +++ b/src/core/cpu_newrec_compiler_riscv64.cpp @@ -1847,6 +1847,8 @@ void CPU::NewRec::RISCV64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const GPR addr = GPR(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, false, use_fastmem); // TODO: if address is constant, this can be simplified.. @@ -1856,7 +1858,6 @@ void CPU::NewRec::RISCV64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize UpdateLoadDelay(); // We'd need to be careful here if we weren't overwriting it.. - const GPR addr = GPR(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); rvAsm->ANDI(RARG1, addr, ~0x3u); GenerateLoad(RARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RRET; }); @@ -2012,11 +2013,12 @@ void CPU::NewRec::RISCV64Compiler::Compile_swx(CompileFlags cf, MemoryAccessSize const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const GPR addr = GPR(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, true, use_fastmem); // TODO: if address is constant, this can be simplified.. // We'd need to be careful here if we weren't overwriting it.. - const GPR addr = GPR(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); rvAsm->ANDI(RARG1, addr, ~0x3u); GenerateLoad(RARG1, MemoryAccessSize::Word, false, use_fastmem, []() { return RRET; }); diff --git a/src/core/cpu_newrec_compiler_x64.cpp b/src/core/cpu_newrec_compiler_x64.cpp index 5d5629a22..0b96f8eef 100644 --- a/src/core/cpu_newrec_compiler_x64.cpp +++ b/src/core/cpu_newrec_compiler_x64.cpp @@ -1515,6 +1515,8 @@ void CPU::NewRec::X64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize siz const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const Reg32 addr = Reg32(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, false, use_fastmem); // TODO: if address is constant, this can be simplified.. @@ -1524,7 +1526,6 @@ void CPU::NewRec::X64Compiler::Compile_lwx(CompileFlags cf, MemoryAccessSize siz UpdateLoadDelay(); // We'd need to be careful here if we weren't overwriting it.. - const Reg32 addr = Reg32(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); cg->mov(RWARG1, addr); cg->and_(RWARG1, ~0x3u); @@ -1711,11 +1712,12 @@ void CPU::NewRec::X64Compiler::Compile_swx(CompileFlags cf, MemoryAccessSize siz const std::optional& address) { DebugAssert(size == MemoryAccessSize::Word && !sign); + + const Reg32 addr = Reg32(AllocateTempHostReg(HR_CALLEE_SAVED)); FlushForLoadStore(address, true, use_fastmem); // TODO: if address is constant, this can be simplified.. // We'd need to be careful here if we weren't overwriting it.. - const Reg32 addr = Reg32(AllocateHostReg(HR_CALLEE_SAVED, HR_TYPE_TEMP)); ComputeLoadStoreAddressArg(cf, address, addr); cg->mov(RWARG1, addr); cg->and_(RWARG1, ~0x3u);