CPU/Recompiler: Check interrupts after mtc0 sr/cause
Fixes Jackie Chan Stuntmaster in Recompiler mode.
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@ -1545,7 +1545,9 @@ bool CodeGenerator::Compile_cop0(const CodeBlockInstruction& cbi)
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{
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{
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u32 offset;
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u32 offset;
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u32 write_mask = UINT32_C(0xFFFFFFFF);
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u32 write_mask = UINT32_C(0xFFFFFFFF);
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switch (static_cast<Cop0Reg>(cbi.instruction.r.rd.GetValue()))
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const Cop0Reg reg = static_cast<Cop0Reg>(cbi.instruction.r.rd.GetValue());
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switch (reg)
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{
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{
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case Cop0Reg::BPC:
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case Cop0Reg::BPC:
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offset = offsetof(Core, m_cop0_regs.BPC);
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offset = offsetof(Core, m_cop0_regs.BPC);
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@ -1627,6 +1629,37 @@ bool CodeGenerator::Compile_cop0(const CodeBlockInstruction& cbi)
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}
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}
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}
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}
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if (cbi.instruction.cop.CommonOp() == CopCommonInstruction::mtcn &&
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(reg == Cop0Reg::CAUSE || reg == Cop0Reg::SR))
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{
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// Emit an interrupt check on load of CAUSE/SR.
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Value sr_value = m_register_cache.AllocateScratch(RegSize_32);
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Value cause_value = m_register_cache.AllocateScratch(RegSize_32);
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// m_cop0_regs.sr.IEc && ((m_cop0_regs.cause.Ip & m_cop0_regs.sr.Im) != 0)
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LabelType no_interrupt;
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EmitLoadCPUStructField(sr_value.host_reg, sr_value.size, offsetof(Core, m_cop0_regs.sr.bits));
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EmitLoadCPUStructField(cause_value.host_reg, cause_value.size, offsetof(Core, m_cop0_regs.cause.bits));
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EmitBranchIfBitClear(sr_value.host_reg, sr_value.size, 0, &no_interrupt);
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EmitAnd(sr_value.host_reg, sr_value.host_reg, cause_value);
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EmitTest(sr_value.host_reg, Value::FromConstantU32(0xFF00));
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sr_value.ReleaseAndClear();
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cause_value.ReleaseAndClear();
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EmitConditionalBranch(Condition::Zero, false, &no_interrupt);
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EmitBranch(GetCurrentFarCodePointer());
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SwitchToFarCode();
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// we want to flush pc here
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m_register_cache.PushState();
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m_register_cache.FlushAllGuestRegisters(false, true);
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EmitExceptionExit();
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m_register_cache.PopState();
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SwitchToNearCode();
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EmitBindLabel(&no_interrupt);
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}
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InstructionEpilogue(cbi);
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InstructionEpilogue(cbi);
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return true;
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return true;
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}
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}
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