PAD: Basic support for digital controllers
This commit is contained in:
parent
d84bffead1
commit
8cd75a4937
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@ -79,7 +79,8 @@ static int Run(int argc, char* argv[])
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int main(int argc, char* argv[])
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{
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// set log flags
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g_pLog->SetConsoleOutputParams(true, nullptr, LOGLEVEL_DEBUG);
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// g_pLog->SetConsoleOutputParams(true, nullptr, LOGLEVEL_DEBUG);
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g_pLog->SetConsoleOutputParams(true, "GPU GPU_HW_OpenGL DMA", LOGLEVEL_DEBUG);
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#ifdef Y_BUILD_CONFIG_RELEASE
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g_pLog->SetFilterLevel(LOGLEVEL_INFO);
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@ -5,6 +5,7 @@
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#include "imgui.h"
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#include "imgui_impl_opengl3.h"
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#include "imgui_impl_sdl.h"
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#include "pse/digital_controller.h"
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#include "pse/system.h"
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#include <cinttypes>
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#include <glad.h>
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@ -159,6 +160,8 @@ std::unique_ptr<SDLInterface> SDLInterface::Create()
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if (!intf->CreateSDLWindow() || !intf->CreateGLContext() || !intf->CreateImGuiContext() || !intf->CreateGLResources())
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return nullptr;
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intf->m_controller = DigitalController::Create();
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return intf;
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}
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@ -210,6 +213,73 @@ bool SDLInterface::HandleSDLEvent(const SDL_Event* event)
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}
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break;
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case SDL_KEYDOWN:
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case SDL_KEYUP:
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{
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const bool pressed = (event->type == SDL_KEYDOWN);
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switch (event->key.keysym.scancode)
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{
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case SDL_SCANCODE_KP_8:
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case SDL_SCANCODE_I:
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m_controller->SetButtonState(DigitalController::Button::Triangle, pressed);
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return true;
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case SDL_SCANCODE_KP_2:
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case SDL_SCANCODE_K:
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m_controller->SetButtonState(DigitalController::Button::Cross, pressed);
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return true;
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case SDL_SCANCODE_KP_4:
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case SDL_SCANCODE_J:
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m_controller->SetButtonState(DigitalController::Button::Square, pressed);
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return true;
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case SDL_SCANCODE_KP_6:
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case SDL_SCANCODE_L:
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m_controller->SetButtonState(DigitalController::Button::Circle, pressed);
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return true;
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case SDL_SCANCODE_W:
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case SDL_SCANCODE_UP:
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m_controller->SetButtonState(DigitalController::Button::Up, pressed);
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return true;
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case SDL_SCANCODE_S:
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case SDL_SCANCODE_DOWN:
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m_controller->SetButtonState(DigitalController::Button::Down, pressed);
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return true;
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case SDL_SCANCODE_A:
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case SDL_SCANCODE_LEFT:
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m_controller->SetButtonState(DigitalController::Button::Left, pressed);
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return true;
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case SDL_SCANCODE_D:
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case SDL_SCANCODE_RIGHT:
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m_controller->SetButtonState(DigitalController::Button::Right, pressed);
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return true;
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case SDL_SCANCODE_Q:
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m_controller->SetButtonState(DigitalController::Button::L1, pressed);
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return true;
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case SDL_SCANCODE_E:
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m_controller->SetButtonState(DigitalController::Button::R1, pressed);
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return true;
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case SDL_SCANCODE_1:
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m_controller->SetButtonState(DigitalController::Button::L2, pressed);
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return true;
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case SDL_SCANCODE_3:
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m_controller->SetButtonState(DigitalController::Button::R3, pressed);
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return true;
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case SDL_SCANCODE_RETURN:
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m_controller->SetButtonState(DigitalController::Button::Start, pressed);
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return true;
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case SDL_SCANCODE_BACKSPACE:
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m_controller->SetButtonState(DigitalController::Button::Select, pressed);
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return true;
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default:
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break;
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}
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}
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break;
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case SDL_QUIT:
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m_running = false;
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break;
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@ -452,6 +522,8 @@ void SDLInterface::DoSaveState(u32 index)
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void SDLInterface::Run()
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{
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m_system->SetPadDevice(0, m_controller);
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while (m_running)
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{
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for (;;)
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@ -8,8 +8,10 @@
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#include <array>
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#include <deque>
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#include <mutex>
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#include <memory>
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class System;
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class DigitalController;
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class SDLInterface : public HostInterface
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{
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@ -72,4 +74,6 @@ private:
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std::deque<OSDMessage> m_osd_messages;
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std::mutex m_osd_messages_lock;
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std::shared_ptr<DigitalController> m_controller;
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};
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@ -9,6 +9,7 @@
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#include "dma.h"
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#include "gpu.h"
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#include "interrupt_controller.h"
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#include "pad.h"
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#include <cstdio>
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Log_SetChannel(Bus);
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@ -24,7 +25,7 @@ Bus::Bus() = default;
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Bus::~Bus() = default;
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bool Bus::Initialize(CPU::Core* cpu, DMA* dma, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom)
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bool Bus::Initialize(CPU::Core* cpu, DMA* dma, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom, Pad* pad)
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{
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if (!LoadBIOS())
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return false;
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@ -34,6 +35,7 @@ bool Bus::Initialize(CPU::Core* cpu, DMA* dma, InterruptController* interrupt_co
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m_interrupt_controller = interrupt_controller;
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m_gpu = gpu;
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m_cdrom = cdrom;
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m_pad = pad;
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return true;
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}
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@ -216,6 +218,18 @@ bool Bus::WriteExpansionRegion2(MemoryAccessSize size, u32 offset, u32 value)
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return DoInvalidAccess(MemoryAccessType::Write, size, EXP2_BASE | offset, EXP2_BASE | offset, value);
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}
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bool Bus::DoReadPad(MemoryAccessSize size, u32 offset, u32& value)
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{
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value = m_pad->ReadRegister(offset);
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return true;
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}
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bool Bus::DoWritePad(MemoryAccessSize size, u32 offset, u32 value)
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{
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m_pad->WriteRegister(offset, value);
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return true;
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}
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bool Bus::DoReadCDROM(MemoryAccessSize size, u32 offset, u32& value)
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{
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// TODO: Splitting of half/word reads.
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@ -15,6 +15,7 @@ class DMA;
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class InterruptController;
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class GPU;
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class CDROM;
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class Pad;
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class System;
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class Bus
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@ -23,7 +24,7 @@ public:
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Bus();
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~Bus();
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bool Initialize(CPU::Core* cpu, DMA* dma, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom);
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bool Initialize(CPU::Core* cpu, DMA* dma, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom, Pad* pad);
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void Reset();
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bool DoState(StateWrapper& sw);
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@ -40,6 +41,9 @@ public:
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void PatchBIOS(u32 address, u32 value, u32 mask = UINT32_C(0xFFFFFFFF));
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private:
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static constexpr u32 PAD_BASE = 0x1F801040;
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static constexpr u32 PAD_SIZE = 0x10;
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static constexpr u32 PAD_MASK = PAD_SIZE - 1;
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static constexpr u32 INTERRUPT_CONTROLLER_BASE = 0x1F801070;
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static constexpr u32 INTERRUPT_CONTROLLER_SIZE = 0x08;
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static constexpr u32 INTERRUPT_CONTROLLER_MASK = INTERRUPT_CONTROLLER_SIZE - 1;
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@ -75,6 +79,9 @@ private:
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bool ReadExpansionRegion2(MemoryAccessSize size, u32 offset, u32& value);
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bool WriteExpansionRegion2(MemoryAccessSize size, u32 offset, u32 value);
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bool DoReadPad(MemoryAccessSize size, u32 offset, u32& value);
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bool DoWritePad(MemoryAccessSize size, u32 offset, u32 value);
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bool DoReadCDROM(MemoryAccessSize size, u32 offset, u32& value);
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bool DoWriteCDROM(MemoryAccessSize size, u32 offset, u32 value);
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@ -95,6 +102,7 @@ private:
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InterruptController* m_interrupt_controller = nullptr;
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GPU* m_gpu = nullptr;
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CDROM* m_cdrom = nullptr;
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Pad* m_pad = nullptr;
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std::array<u8, 2097152> m_ram{}; // 2MB RAM
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std::array<u8, 524288> m_bios{}; // 512K BIOS ROM
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@ -80,6 +80,15 @@ bool Bus::DispatchAccess(PhysicalMemoryAddress cpu_address, PhysicalMemoryAddres
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{
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return DoRAMAccess<type, size>(bus_address, value);
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}
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else if (bus_address < PAD_BASE)
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{
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return DoInvalidAccess(type, size, cpu_address, bus_address, value);
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}
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else if (bus_address < (PAD_BASE + PAD_SIZE))
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{
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return (type == MemoryAccessType::Read) ? DoReadPad(size, bus_address & PAD_MASK, value) :
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DoWritePad(size, bus_address & PAD_MASK, value);
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}
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else if (bus_address < INTERRUPT_CONTROLLER_BASE)
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{
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return DoInvalidAccess(type, size, cpu_address, bus_address, value);
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@ -0,0 +1,77 @@
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#include "digital_controller.h"
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#include "YBaseLib/Log.h"
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Log_SetChannel(DigitalController);
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DigitalController::DigitalController() = default;
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DigitalController::~DigitalController() = default;
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void DigitalController::SetButtonState(Button button, bool pressed)
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{
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if (pressed)
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m_button_state &= ~(u16(1) << static_cast<u8>(button));
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else
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m_button_state |= u16(1) << static_cast<u8>(button);
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}
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bool DigitalController::Transfer(const u8 data_in, u8* data_out)
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{
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bool ack;
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switch (data_in)
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{
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case 0x01: // tests if the controller is present
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{
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Log_DebugPrintf("Access");
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// response is hi-z
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*data_out = data_in;
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ack = true;
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}
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break;
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case 0x42: // query state
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{
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Log_DebugPrintf("Query state");
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QueryState();
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[[fallthrough]];
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}
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default: // sending response
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{
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if (m_transfer_fifo.IsEmpty())
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{
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Log_WarningPrint("FIFO empty on read");
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*data_out = 0xFF;
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ack = false;
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}
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else
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{
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*data_out = m_transfer_fifo.Pop();
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ack = !m_transfer_fifo.IsEmpty();
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}
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}
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break;
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}
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Log_DebugPrintf("Transfer, data_in=0x%02X, data_out=0x%02X, ack=%s", data_in, *data_out, ack ? "true" : "false");
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return ack;
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}
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void DigitalController::QueryState()
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{
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constexpr u16 ID = 0x5A41;
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m_transfer_fifo.Clear();
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m_transfer_fifo.Push(Truncate8(ID));
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m_transfer_fifo.Push(Truncate8(ID >> 8));
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m_transfer_fifo.Push(Truncate8(m_button_state)); // Digital switches low
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m_transfer_fifo.Push(Truncate8(m_button_state >> 8)); // Digital switches high
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}
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std::shared_ptr<DigitalController> DigitalController::Create()
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{
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return std::make_shared<DigitalController>();
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}
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@ -0,0 +1,45 @@
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#pragma once
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#include "common/fifo_queue.h"
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#include "pad_device.h"
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#include <memory>
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class DigitalController final : public PadDevice
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{
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public:
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enum class Button : u8
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{
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Select = 0,
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L3 = 1,
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R3 = 2,
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Start = 3,
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Up = 4,
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Right = 5,
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Down = 6,
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Left = 7,
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L2 = 8,
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R2 = 9,
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L1 = 10,
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R1 = 11,
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Triangle = 12,
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Circle = 13,
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Cross = 14,
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Square = 15
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};
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DigitalController();
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~DigitalController() override;
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static std::shared_ptr<DigitalController> Create();
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void SetButtonState(Button button, bool pressed);
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bool Transfer(const u8 data_in, u8* data_out) override;
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private:
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void QueryState();
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// buttons are active low
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u16 m_button_state = UINT16_C(0xFFFF);
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InlineFIFOQueue<u8, 8> m_transfer_fifo;
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};
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@ -0,0 +1,172 @@
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#include "pad.h"
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#include "YBaseLib/Log.h"
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#include "common/state_wrapper.h"
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#include "interrupt_controller.h"
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#include "pad_device.h"
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Log_SetChannel(Pad);
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Pad::Pad() = default;
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Pad::~Pad() = default;
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bool Pad::Initialize(InterruptController* interrupt_controller)
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{
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m_interrupt_controller = interrupt_controller;
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return true;
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}
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void Pad::Reset()
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{
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SoftReset();
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}
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bool Pad::DoState(StateWrapper& sw)
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{
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return !sw.HasError();
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}
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u32 Pad::ReadRegister(u32 offset)
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{
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switch (offset)
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{
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case 0x00: // JOY_DATA
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{
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if (m_RX_FIFO.IsEmpty())
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{
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Log_WarningPrint("Read from RX fifo when empty");
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return 0;
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}
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const u8 value = m_RX_FIFO.Pop();
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UpdateJoyStat();
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Log_DebugPrintf("JOY_DATA (R) -> 0x%02X", ZeroExtend32(value));
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return ZeroExtend32(value);
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}
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case 0x04: // JOY_STAT
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return m_JOY_STAT.bits;
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case 0x08: // JOY_MODE
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return ZeroExtend32(m_JOY_MODE.bits);
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case 0x0A: // JOY_CTRL
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return ZeroExtend32(m_JOY_CTRL.bits);
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default:
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Log_ErrorPrintf("Unknown register read: 0x%X", offset);
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return UINT32_C(0xFFFFFFFF);
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}
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}
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void Pad::WriteRegister(u32 offset, u32 value)
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{
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switch (offset)
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{
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case 0x00: // JOY_DATA
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{
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Log_DebugPrintf("JOY_DATA (W) <- 0x%02X", value);
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if (m_TX_FIFO.IsFull())
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{
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Log_WarningPrint("TX FIFO overrun");
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m_TX_FIFO.RemoveOne();
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}
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m_TX_FIFO.Push(Truncate8(value));
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if (m_JOY_CTRL.SELECT)
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DoTransfer();
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return;
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}
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case 0x0A: // JOY_CTRL
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{
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Log_DebugPrintf("JOY_CTRL <- 0x%04X", value);
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const bool old_select = m_JOY_CTRL.SELECT;
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m_JOY_CTRL.bits = Truncate16(value);
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if (m_JOY_CTRL.RESET)
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SoftReset();
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if (m_JOY_CTRL.ACK)
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{
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// reset stat bits
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m_JOY_STAT.ACKINPUTLEVEL = false;
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m_JOY_STAT.INTR = false;
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m_JOY_CTRL.ACK = true;
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}
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if (!old_select && m_JOY_CTRL.SELECT && !m_TX_FIFO.IsEmpty())
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DoTransfer();
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return;
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}
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case 0x08: // JOY_MODE
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{
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Log_DebugPrintf("JOY_MODE <- 0x%08X", value);
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m_JOY_MODE.bits = Truncate16(value);
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return;
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}
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case 0x0E:
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{
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Log_WarningPrintf("JOY_BAUD <- 0x%08X", value);
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return;
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}
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default:
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Log_ErrorPrintf("Unknown register write: 0x%X <- 0x%08X", offset, value);
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return;
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}
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}
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void Pad::SoftReset()
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{
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m_JOY_CTRL.bits = 0;
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m_JOY_STAT.bits = 0;
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m_JOY_MODE.bits = 0;
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m_RX_FIFO.Clear();
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m_TX_FIFO.Clear();
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UpdateJoyStat();
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}
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void Pad::UpdateJoyStat()
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{
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m_JOY_STAT.RXFIFONEMPTY = !m_RX_FIFO.IsEmpty();
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m_JOY_STAT.TXDONE = m_TX_FIFO.IsEmpty();
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m_JOY_STAT.TXRDY = !m_TX_FIFO.IsFull();
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}
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void Pad::DoTransfer()
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{
|
||||
Log_DebugPrintf("Transferring slot %d", m_JOY_CTRL.SLOT.GetValue());
|
||||
|
||||
const std::shared_ptr<PadDevice>& dev = m_devices[m_JOY_CTRL.SLOT];
|
||||
if (!dev)
|
||||
{
|
||||
// no device present, don't set ACK and read hi-z
|
||||
m_TX_FIFO.Clear();
|
||||
m_RX_FIFO.Clear();
|
||||
m_RX_FIFO.Push(0xFF);
|
||||
UpdateJoyStat();
|
||||
return;
|
||||
}
|
||||
|
||||
while (!m_TX_FIFO.IsEmpty())
|
||||
{
|
||||
const u8 data_out = m_TX_FIFO.Pop();
|
||||
u8 data_in;
|
||||
m_JOY_STAT.ACKINPUTLEVEL |= dev->Transfer(data_out, &data_in);
|
||||
m_RX_FIFO.Push(data_in);
|
||||
m_JOY_CTRL.RXEN = true;
|
||||
}
|
||||
|
||||
if (m_JOY_STAT.ACKINPUTLEVEL && m_JOY_CTRL.ACKINTEN)
|
||||
{
|
||||
m_JOY_STAT.INTR = true;
|
||||
m_interrupt_controller->InterruptRequest(InterruptController::IRQ::IRQ7);
|
||||
}
|
||||
|
||||
UpdateJoyStat();
|
||||
}
|
|
@ -0,0 +1,86 @@
|
|||
#pragma once
|
||||
#include "common/bitfield.h"
|
||||
#include "common/fifo_queue.h"
|
||||
#include "types.h"
|
||||
#include <array>
|
||||
#include <memory>
|
||||
|
||||
class StateWrapper;
|
||||
|
||||
class InterruptController;
|
||||
class PadDevice;
|
||||
|
||||
class Pad
|
||||
{
|
||||
public:
|
||||
Pad();
|
||||
~Pad();
|
||||
|
||||
bool Initialize(InterruptController* interrupt_controller);
|
||||
void Reset();
|
||||
bool DoState(StateWrapper& sw);
|
||||
|
||||
PadDevice* GetDevice(u32 slot) { return m_devices[slot].get(); }
|
||||
void SetDevice(u32 slot, std::shared_ptr<PadDevice> dev) { m_devices[slot] = dev; }
|
||||
|
||||
u32 ReadRegister(u32 offset);
|
||||
void WriteRegister(u32 offset, u32 value);
|
||||
|
||||
private:
|
||||
static constexpr u32 NUM_SLOTS = 2;
|
||||
|
||||
union JOY_CTRL
|
||||
{
|
||||
u32 bits;
|
||||
|
||||
BitField<u16, bool, 0, 1> TXEN;
|
||||
BitField<u16, bool, 1, 1> SELECT;
|
||||
BitField<u16, bool, 2, 1> RXEN;
|
||||
BitField<u16, bool, 4, 1> ACK;
|
||||
BitField<u16, bool, 6, 1> RESET;
|
||||
BitField<u16, u8, 8, 2> RXIMODE;
|
||||
BitField<u16, bool, 10, 1> TXINTEN;
|
||||
BitField<u16, bool, 11, 1> RXINTEN;
|
||||
BitField<u16, bool, 12, 1> ACKINTEN;
|
||||
BitField<u16, u8, 13, 1> SLOT;
|
||||
};
|
||||
|
||||
union JOY_STAT
|
||||
{
|
||||
u32 bits;
|
||||
|
||||
BitField<u32, bool, 0, 1> TXRDY;
|
||||
BitField<u32, bool, 1, 1> RXFIFONEMPTY;
|
||||
BitField<u32, bool, 2, 1> TXDONE;
|
||||
BitField<u32, bool, 3, 1> ACKINPUTLEVEL;
|
||||
BitField<u32, bool, 7, 1> ACKINPUT;
|
||||
BitField<u32, bool, 9, 1> INTR;
|
||||
BitField<u32, u32, 11, 21> TMR;
|
||||
};
|
||||
|
||||
union JOY_MODE
|
||||
{
|
||||
u16 bits;
|
||||
|
||||
BitField<u16, u8, 0, 2> reload_factor;
|
||||
BitField<u16, u8, 2, 2> character_length;
|
||||
BitField<u16, bool, 4, 1> parity_enable;
|
||||
BitField<u16, u8, 5, 1> parity_type;
|
||||
BitField<u16, u8, 8, 1> clk_polarity;
|
||||
};
|
||||
|
||||
void SoftReset();
|
||||
void UpdateJoyStat();
|
||||
void DoTransfer();
|
||||
|
||||
InterruptController* m_interrupt_controller = nullptr;
|
||||
|
||||
JOY_CTRL m_JOY_CTRL = {};
|
||||
JOY_STAT m_JOY_STAT = {};
|
||||
JOY_MODE m_JOY_MODE = {};
|
||||
|
||||
InlineFIFOQueue<u8, 8> m_RX_FIFO;
|
||||
InlineFIFOQueue<u8, 2> m_TX_FIFO;
|
||||
|
||||
std::array<std::shared_ptr<PadDevice>, NUM_SLOTS> m_devices;
|
||||
};
|
|
@ -0,0 +1,11 @@
|
|||
#include "pad_device.h"
|
||||
|
||||
PadDevice::PadDevice() = default;
|
||||
|
||||
PadDevice::~PadDevice() = default;
|
||||
|
||||
bool PadDevice::Transfer(const u8 data_in, u8* data_out)
|
||||
{
|
||||
*data_out = 0xFF;
|
||||
return false;
|
||||
}
|
|
@ -0,0 +1,13 @@
|
|||
#pragma once
|
||||
#include "types.h"
|
||||
|
||||
class PadDevice
|
||||
{
|
||||
public:
|
||||
PadDevice();
|
||||
virtual ~PadDevice();
|
||||
|
||||
// Returns the value of ACK, as well as filling out_data.
|
||||
virtual bool Transfer(const u8 data_in, u8* data_out);
|
||||
};
|
||||
|
|
@ -39,6 +39,7 @@
|
|||
<ClCompile Include="cdrom.cpp" />
|
||||
<ClCompile Include="cpu_core.cpp" />
|
||||
<ClCompile Include="cpu_disasm.cpp" />
|
||||
<ClCompile Include="digital_controller.cpp" />
|
||||
<ClCompile Include="gte.cpp" />
|
||||
<ClCompile Include="dma.cpp" />
|
||||
<ClCompile Include="gpu.cpp" />
|
||||
|
@ -46,6 +47,8 @@
|
|||
<ClCompile Include="gpu_hw_opengl.cpp" />
|
||||
<ClCompile Include="host_interface.cpp" />
|
||||
<ClCompile Include="interrupt_controller.cpp" />
|
||||
<ClCompile Include="pad.cpp" />
|
||||
<ClCompile Include="pad_device.cpp" />
|
||||
<ClCompile Include="system.cpp" />
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
|
@ -53,6 +56,7 @@
|
|||
<ClInclude Include="cdrom.h" />
|
||||
<ClInclude Include="cpu_core.h" />
|
||||
<ClInclude Include="cpu_disasm.h" />
|
||||
<ClInclude Include="digital_controller.h" />
|
||||
<ClInclude Include="gte.h" />
|
||||
<ClInclude Include="cpu_types.h" />
|
||||
<ClInclude Include="dma.h" />
|
||||
|
@ -62,6 +66,8 @@
|
|||
<ClInclude Include="gte_types.h" />
|
||||
<ClInclude Include="host_interface.h" />
|
||||
<ClInclude Include="interrupt_controller.h" />
|
||||
<ClInclude Include="pad.h" />
|
||||
<ClInclude Include="pad_device.h" />
|
||||
<ClInclude Include="save_state_version.h" />
|
||||
<ClInclude Include="system.h" />
|
||||
<ClInclude Include="types.h" />
|
||||
|
|
|
@ -13,6 +13,9 @@
|
|||
<ClCompile Include="interrupt_controller.cpp" />
|
||||
<ClCompile Include="cdrom.cpp" />
|
||||
<ClCompile Include="gte.cpp" />
|
||||
<ClCompile Include="pad.cpp" />
|
||||
<ClCompile Include="pad_device.cpp" />
|
||||
<ClCompile Include="digital_controller.cpp" />
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="types.h" />
|
||||
|
@ -31,6 +34,9 @@
|
|||
<ClInclude Include="cdrom.h" />
|
||||
<ClInclude Include="gte.h" />
|
||||
<ClInclude Include="gte_types.h" />
|
||||
<ClInclude Include="pad.h" />
|
||||
<ClInclude Include="pad_device.h" />
|
||||
<ClInclude Include="digital_controller.h" />
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<None Include="cpu_core.inl" />
|
||||
|
|
|
@ -7,6 +7,8 @@
|
|||
#include "dma.h"
|
||||
#include "gpu.h"
|
||||
#include "interrupt_controller.h"
|
||||
#include "pad.h"
|
||||
#include "pad_device.h"
|
||||
|
||||
System::System(HostInterface* host_interface) : m_host_interface(host_interface)
|
||||
{
|
||||
|
@ -17,6 +19,7 @@ System::System(HostInterface* host_interface) : m_host_interface(host_interface)
|
|||
// m_gpu = std::make_unique<GPU>();
|
||||
m_gpu = GPU::CreateHardwareOpenGLRenderer();
|
||||
m_cdrom = std::make_unique<CDROM>();
|
||||
m_pad = std::make_unique<Pad>();
|
||||
}
|
||||
|
||||
System::~System() = default;
|
||||
|
@ -26,8 +29,11 @@ bool System::Initialize()
|
|||
if (!m_cpu->Initialize(m_bus.get()))
|
||||
return false;
|
||||
|
||||
if (!m_bus->Initialize(m_cpu.get(), m_dma.get(), m_interrupt_controller.get(), m_gpu.get(), m_cdrom.get()))
|
||||
if (!m_bus->Initialize(m_cpu.get(), m_dma.get(), m_interrupt_controller.get(), m_gpu.get(), m_cdrom.get(),
|
||||
m_pad.get()))
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!m_dma->Initialize(m_bus.get(), m_gpu.get()))
|
||||
return false;
|
||||
|
@ -41,6 +47,9 @@ bool System::Initialize()
|
|||
if (!m_cdrom->Initialize(m_dma.get(), m_interrupt_controller.get()))
|
||||
return false;
|
||||
|
||||
if (!m_pad->Initialize(m_interrupt_controller.get()))
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -64,6 +73,9 @@ bool System::DoState(StateWrapper& sw)
|
|||
if (!sw.DoMarker("CDROM") || !m_cdrom->DoState(sw))
|
||||
return false;
|
||||
|
||||
if (!sw.DoMarker("Pad") || !m_pad->DoState(sw))
|
||||
return false;
|
||||
|
||||
return !sw.HasError();
|
||||
}
|
||||
|
||||
|
@ -77,6 +89,7 @@ void System::Reset()
|
|||
m_interrupt_controller->Reset();
|
||||
m_gpu->Reset();
|
||||
m_cdrom->Reset();
|
||||
m_pad->Reset();
|
||||
m_frame_number = 1;
|
||||
}
|
||||
|
||||
|
@ -195,3 +208,8 @@ void System::SetSliceTicks(TickCount downcount)
|
|||
{
|
||||
m_cpu->SetSliceTicks(downcount);
|
||||
}
|
||||
|
||||
void System::SetPadDevice(u32 slot, std::shared_ptr<PadDevice> dev)
|
||||
{
|
||||
m_pad->SetDevice(slot, std::move(dev));
|
||||
}
|
||||
|
|
|
@ -1,5 +1,6 @@
|
|||
#pragma once
|
||||
#include "types.h"
|
||||
#include <memory>
|
||||
|
||||
class ByteStream;
|
||||
class StateWrapper;
|
||||
|
@ -16,6 +17,8 @@ class DMA;
|
|||
class InterruptController;
|
||||
class GPU;
|
||||
class CDROM;
|
||||
class Pad;
|
||||
class PadDevice;
|
||||
|
||||
class System
|
||||
{
|
||||
|
@ -40,6 +43,8 @@ public:
|
|||
|
||||
void SetSliceTicks(TickCount downcount);
|
||||
|
||||
void SetPadDevice(u32 slot, std::shared_ptr<PadDevice> dev);
|
||||
|
||||
private:
|
||||
bool DoState(StateWrapper& sw);
|
||||
|
||||
|
@ -50,5 +55,6 @@ private:
|
|||
std::unique_ptr<InterruptController> m_interrupt_controller;
|
||||
std::unique_ptr<GPU> m_gpu;
|
||||
std::unique_ptr<CDROM> m_cdrom;
|
||||
std::unique_ptr<Pad> m_pad;
|
||||
u32 m_frame_number = 1;
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue