DMA: Remove timing events
We'll probably need to revert/re-add a variant of this when we eventually implement chopping. But for now it simplifies things.
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423f04325f
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5dbdc0b60c
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@ -26,13 +26,6 @@ void DMA::Initialize(System* system, Bus* bus, InterruptController* interrupt_co
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m_spu = spu;
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m_spu = spu;
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m_mdec = mdec;
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m_mdec = mdec;
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m_transfer_buffer.resize(32);
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m_transfer_buffer.resize(32);
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for (u32 i = 0; i < NUM_CHANNELS; i++)
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{
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m_state[i].transfer_event = system->CreateTimingEvent(
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StringUtil::StdStringFromFormat("DMA%u Transfer", i), 1, 1,
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std::bind(&DMA::TransferChannel, this, static_cast<Channel>(i), std::placeholders::_2), false);
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}
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}
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}
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void DMA::Reset()
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void DMA::Reset()
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@ -46,7 +39,6 @@ void DMA::Reset()
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cs.block_control.bits = 0;
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cs.block_control.bits = 0;
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cs.channel_control.bits = 0;
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cs.channel_control.bits = 0;
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cs.request = false;
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cs.request = false;
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cs.transfer_event->Deactivate();
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}
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}
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}
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}
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@ -64,15 +56,6 @@ bool DMA::DoState(StateWrapper& sw)
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sw.Do(&m_DPCR.bits);
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sw.Do(&m_DPCR.bits);
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sw.Do(&m_DICR.bits);
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sw.Do(&m_DICR.bits);
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if (sw.IsReading())
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{
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for (u32 i = 0; i < NUM_CHANNELS; i++)
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{
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m_state[i].transfer_event->Deactivate();
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UpdateChannelTransferEvent(static_cast<Channel>(i));
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}
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}
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return !sw.HasError();
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return !sw.HasError();
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}
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}
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@ -138,7 +121,8 @@ void DMA::WriteRegister(u32 offset, u32 value)
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{
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{
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Log_TracePrintf("DMA channel %u block control <- 0x%08X", channel_index, value);
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Log_TracePrintf("DMA channel %u block control <- 0x%08X", channel_index, value);
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state.block_control.bits = value;
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state.block_control.bits = value;
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UpdateChannelTransferEvent(static_cast<Channel>(channel_index));
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if (CanTransferChannel(static_cast<Channel>(channel_index)))
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TransferChannel(static_cast<Channel>(channel_index));
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return;
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return;
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}
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}
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@ -152,7 +136,8 @@ void DMA::WriteRegister(u32 offset, u32 value)
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if (static_cast<Channel>(channel_index) == Channel::OTC)
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if (static_cast<Channel>(channel_index) == Channel::OTC)
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SetRequest(static_cast<Channel>(channel_index), state.channel_control.start_trigger);
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SetRequest(static_cast<Channel>(channel_index), state.channel_control.start_trigger);
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UpdateChannelTransferEvent(static_cast<Channel>(channel_index));
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if (CanTransferChannel(static_cast<Channel>(channel_index)))
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TransferChannel(static_cast<Channel>(channel_index));
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return;
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return;
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}
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}
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@ -169,7 +154,10 @@ void DMA::WriteRegister(u32 offset, u32 value)
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Log_TracePrintf("DPCR <- 0x%08X", value);
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Log_TracePrintf("DPCR <- 0x%08X", value);
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m_DPCR.bits = value;
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m_DPCR.bits = value;
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for (u32 i = 0; i < NUM_CHANNELS; i++)
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for (u32 i = 0; i < NUM_CHANNELS; i++)
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UpdateChannelTransferEvent(static_cast<Channel>(i));
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{
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if (CanTransferChannel(static_cast<Channel>(i)))
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TransferChannel(static_cast<Channel>(i));
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}
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return;
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return;
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}
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}
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@ -197,18 +185,8 @@ void DMA::SetRequest(Channel channel, bool request)
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return;
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return;
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cs.request = request;
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cs.request = request;
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if (request)
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if (CanTransferChannel(channel))
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UpdateChannelTransferEvent(channel);
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TransferChannel(channel);
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}
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TickCount DMA::GetTransferDelay(Channel channel) const
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{
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const ChannelState& cs = m_state[static_cast<u32>(channel)];
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switch (channel)
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{
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default:
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return 0;
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}
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}
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}
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bool DMA::CanTransferChannel(Channel channel) const
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bool DMA::CanTransferChannel(Channel channel) const
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@ -223,17 +201,6 @@ bool DMA::CanTransferChannel(Channel channel) const
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return cs.request;
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return cs.request;
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}
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}
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bool DMA::CanRunAnyChannels() const
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{
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for (u32 i = 0; i < NUM_CHANNELS; i++)
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{
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if (CanTransferChannel(static_cast<Channel>(i)))
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return true;
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}
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return false;
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}
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void DMA::UpdateIRQ()
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void DMA::UpdateIRQ()
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{
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{
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m_DICR.UpdateMasterFlag();
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m_DICR.UpdateMasterFlag();
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@ -244,33 +211,9 @@ void DMA::UpdateIRQ()
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}
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}
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}
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}
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void DMA::UpdateChannelTransferEvent(Channel channel)
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void DMA::TransferChannel(Channel channel)
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{
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{
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ChannelState& cs = m_state[static_cast<u32>(channel)];
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ChannelState& cs = m_state[static_cast<u32>(channel)];
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if (!CanTransferChannel(channel))
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{
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cs.transfer_event->Deactivate();
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return;
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}
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if (cs.transfer_event->IsActive())
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return;
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const TickCount ticks = GetTransferDelay(channel);
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if (ticks == 0)
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{
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// immediate transfer
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TransferChannel(channel, 0);
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return;
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}
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cs.transfer_event->SetPeriodAndSchedule(ticks);
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}
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void DMA::TransferChannel(Channel channel, TickCount ticks_late)
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{
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ChannelState& cs = m_state[static_cast<u32>(channel)];
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cs.transfer_event->Deactivate();
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const bool copy_to_device = cs.channel_control.copy_to_device;
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const bool copy_to_device = cs.channel_control.copy_to_device;
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@ -64,16 +64,11 @@ private:
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Reserved = 3
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Reserved = 3
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};
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};
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/// Returns the number of ticks for a given channel's transfer.
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TickCount GetTransferDelay(Channel channel) const;
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// is everything enabled for a channel to operate?
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// is everything enabled for a channel to operate?
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bool CanTransferChannel(Channel channel) const;
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bool CanTransferChannel(Channel channel) const;
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bool CanRunAnyChannels() const;
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void UpdateIRQ();
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void UpdateIRQ();
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void UpdateChannelTransferEvent(Channel channel);
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void TransferChannel(Channel channel);
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void TransferChannel(Channel channel, TickCount ticks_late);
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// from device -> memory
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// from device -> memory
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void TransferDeviceToMemory(Channel channel, u32 address, u32 increment, u32 word_count);
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void TransferDeviceToMemory(Channel channel, u32 address, u32 increment, u32 word_count);
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@ -93,7 +88,6 @@ private:
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struct ChannelState
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struct ChannelState
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{
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{
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std::unique_ptr<TimingEvent> transfer_event;
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u32 base_address = 0;
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u32 base_address = 0;
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union BlockControl
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union BlockControl
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