Add precompiled versions of D3D11 display shaders
This commit is contained in:
parent
46846a10f6
commit
4f794b1c37
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@ -0,0 +1,8 @@
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Texture2D samp0 : register(t0);
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SamplerState samp0_ss : register(s0);
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void main(in float2 v_tex0 : TEXCOORD0,
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out float4 o_col0 : SV_Target)
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{
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o_col0 = samp0.Sample(samp0_ss, v_tex0);
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}
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@ -0,0 +1,131 @@
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#if 0
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//
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// Generated by Microsoft (R) HLSL Shader Compiler 10.1
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//
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//
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// Resource Bindings:
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//
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// Name Type Format Dim HLSL Bind Count
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// ------------------------------ ---------- ------- ----------- -------------- ------
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// samp0_ss sampler NA NA s0 1
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// samp0 texture float4 2d t0 1
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//
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//
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//
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// Input signature:
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//
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// Name Index Mask Register SysValue Format Used
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// -------------------- ----- ------ -------- -------- ------- ------
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// TEXCOORD 0 xy 0 NONE float xy
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//
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//
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// Output signature:
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//
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// Name Index Mask Register SysValue Format Used
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// -------------------- ----- ------ -------- -------- ------- ------
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// SV_Target 0 xyzw 0 TARGET float xyzw
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//
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ps_4_0
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dcl_sampler s0, mode_default
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dcl_resource_texture2d (float,float,float,float) t0
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dcl_input_ps linear v0.xy
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dcl_output o0.xyzw
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sample o0.xyzw, v0.xyxx, t0.xyzw, s0
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ret
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// Approximately 2 instruction slots used
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#endif
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const BYTE static s_display_ps_bytecode[] =
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{
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68, 88, 66, 67, 140, 134,
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46, 29, 68, 36, 193, 23,
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94, 171, 102, 123, 183, 66,
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19, 177, 1, 0, 0, 0,
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32, 2, 0, 0, 5, 0,
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0, 0, 52, 0, 0, 0,
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208, 0, 0, 0, 4, 1,
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0, 0, 56, 1, 0, 0,
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164, 1, 0, 0, 82, 68,
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69, 70, 148, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 2, 0, 0, 0,
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28, 0, 0, 0, 0, 4,
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255, 255, 0, 129, 0, 0,
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107, 0, 0, 0, 92, 0,
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0, 0, 3, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 1, 0,
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0, 0, 1, 0, 0, 0,
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101, 0, 0, 0, 2, 0,
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0, 0, 5, 0, 0, 0,
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4, 0, 0, 0, 255, 255,
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255, 255, 0, 0, 0, 0,
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1, 0, 0, 0, 13, 0,
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0, 0, 115, 97, 109, 112,
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48, 95, 115, 115, 0, 115,
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97, 109, 112, 48, 0, 77,
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105, 99, 114, 111, 115, 111,
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102, 116, 32, 40, 82, 41,
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32, 72, 76, 83, 76, 32,
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83, 104, 97, 100, 101, 114,
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32, 67, 111, 109, 112, 105,
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108, 101, 114, 32, 49, 48,
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46, 49, 0, 171, 73, 83,
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71, 78, 44, 0, 0, 0,
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1, 0, 0, 0, 8, 0,
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0, 0, 32, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 3, 0, 0, 0,
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0, 0, 0, 0, 3, 3,
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0, 0, 84, 69, 88, 67,
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79, 79, 82, 68, 0, 171,
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171, 171, 79, 83, 71, 78,
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44, 0, 0, 0, 1, 0,
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0, 0, 8, 0, 0, 0,
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32, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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3, 0, 0, 0, 0, 0,
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0, 0, 15, 0, 0, 0,
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83, 86, 95, 84, 97, 114,
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103, 101, 116, 0, 171, 171,
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83, 72, 68, 82, 100, 0,
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0, 0, 64, 0, 0, 0,
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25, 0, 0, 0, 90, 0,
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0, 3, 0, 96, 16, 0,
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0, 0, 0, 0, 88, 24,
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0, 4, 0, 112, 16, 0,
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0, 0, 0, 0, 85, 85,
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0, 0, 98, 16, 0, 3,
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50, 16, 16, 0, 0, 0,
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0, 0, 101, 0, 0, 3,
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242, 32, 16, 0, 0, 0,
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0, 0, 69, 0, 0, 9,
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242, 32, 16, 0, 0, 0,
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0, 0, 70, 16, 16, 0,
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0, 0, 0, 0, 70, 126,
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16, 0, 0, 0, 0, 0,
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0, 96, 16, 0, 0, 0,
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0, 0, 62, 0, 0, 1,
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83, 84, 65, 84, 116, 0,
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0, 0, 2, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 2, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 1, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0
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};
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@ -0,0 +1,13 @@
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cbuffer UBOBlock : register(b0)
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{
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float4 u_src_rect;
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};
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void main(in uint vertex_id : SV_VertexID,
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out float2 v_tex0 : TEXCOORD0,
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out float4 o_pos : SV_Position)
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{
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float2 pos = float2(float((vertex_id << 1) & 2u), float(vertex_id & 2u));
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v_tex0 = u_src_rect.xy + pos * u_src_rect.zw;
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o_pos = float4(pos * float2(2.0f, -2.0f) + float2(-1.0f, 1.0f), 0.0f, 1.0f);
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}
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@ -0,0 +1,197 @@
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#if 0
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//
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// Generated by Microsoft (R) HLSL Shader Compiler 10.1
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//
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//
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// Buffer Definitions:
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//
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// cbuffer UBOBlock
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// {
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//
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// float4 u_src_rect; // Offset: 0 Size: 16
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//
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// }
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//
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//
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// Resource Bindings:
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//
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// Name Type Format Dim HLSL Bind Count
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// ------------------------------ ---------- ------- ----------- -------------- ------
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// UBOBlock cbuffer NA NA cb0 1
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//
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//
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//
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// Input signature:
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//
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// Name Index Mask Register SysValue Format Used
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// -------------------- ----- ------ -------- -------- ------- ------
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// SV_VertexID 0 x 0 VERTID uint x
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//
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//
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// Output signature:
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//
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// Name Index Mask Register SysValue Format Used
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// -------------------- ----- ------ -------- -------- ------- ------
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// TEXCOORD 0 xy 0 NONE float xy
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// SV_Position 0 xyzw 1 POS float xyzw
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//
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vs_4_0
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dcl_constantbuffer CB0[1], immediateIndexed
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dcl_input_sgv v0.x, vertex_id
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dcl_output o0.xy
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dcl_output_siv o1.xyzw, position
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dcl_temps 1
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ishl r0.x, v0.x, l(1)
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and r0.x, r0.x, l(2)
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and r0.z, v0.x, l(2)
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utof r0.xy, r0.xzxx
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mad o0.xy, r0.xyxx, cb0[0].zwzz, cb0[0].xyxx
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mad o1.xy, r0.xyxx, l(2.000000, -2.000000, 0.000000, 0.000000), l(-1.000000, 1.000000, 0.000000, 0.000000)
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mov o1.zw, l(0,0,0,1.000000)
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ret
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// Approximately 8 instruction slots used
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#endif
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const BYTE static s_display_vs_bytecode[] =
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{
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68, 88, 66, 67, 37, 97,
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157, 234, 112, 10, 38, 98,
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114, 228, 143, 118, 71, 158,
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122, 195, 1, 0, 0, 0,
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72, 3, 0, 0, 5, 0,
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0, 0, 52, 0, 0, 0,
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248, 0, 0, 0, 44, 1,
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0, 0, 132, 1, 0, 0,
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204, 2, 0, 0, 82, 68,
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69, 70, 188, 0, 0, 0,
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1, 0, 0, 0, 72, 0,
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0, 0, 1, 0, 0, 0,
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28, 0, 0, 0, 0, 4,
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254, 255, 0, 129, 0, 0,
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148, 0, 0, 0, 60, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 1, 0,
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0, 0, 1, 0, 0, 0,
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85, 66, 79, 66, 108, 111,
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99, 107, 0, 171, 171, 171,
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60, 0, 0, 0, 1, 0,
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0, 0, 96, 0, 0, 0,
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16, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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120, 0, 0, 0, 0, 0,
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0, 0, 16, 0, 0, 0,
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2, 0, 0, 0, 132, 0,
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0, 0, 0, 0, 0, 0,
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117, 95, 115, 114, 99, 95,
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114, 101, 99, 116, 0, 171,
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1, 0, 3, 0, 1, 0,
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4, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 77, 105,
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99, 114, 111, 115, 111, 102,
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116, 32, 40, 82, 41, 32,
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72, 76, 83, 76, 32, 83,
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104, 97, 100, 101, 114, 32,
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67, 111, 109, 112, 105, 108,
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101, 114, 32, 49, 48, 46,
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49, 0, 73, 83, 71, 78,
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44, 0, 0, 0, 1, 0,
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0, 0, 8, 0, 0, 0,
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32, 0, 0, 0, 0, 0,
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0, 0, 6, 0, 0, 0,
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1, 0, 0, 0, 0, 0,
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0, 0, 1, 1, 0, 0,
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83, 86, 95, 86, 101, 114,
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116, 101, 120, 73, 68, 0,
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79, 83, 71, 78, 80, 0,
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0, 0, 2, 0, 0, 0,
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8, 0, 0, 0, 56, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 3, 0,
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0, 0, 0, 0, 0, 0,
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3, 12, 0, 0, 65, 0,
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0, 0, 0, 0, 0, 0,
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1, 0, 0, 0, 3, 0,
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0, 0, 1, 0, 0, 0,
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15, 0, 0, 0, 84, 69,
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88, 67, 79, 79, 82, 68,
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0, 83, 86, 95, 80, 111,
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115, 105, 116, 105, 111, 110,
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0, 171, 171, 171, 83, 72,
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68, 82, 64, 1, 0, 0,
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64, 0, 1, 0, 80, 0,
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0, 0, 89, 0, 0, 4,
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70, 142, 32, 0, 0, 0,
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0, 0, 1, 0, 0, 0,
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96, 0, 0, 4, 18, 16,
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16, 0, 0, 0, 0, 0,
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6, 0, 0, 0, 101, 0,
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0, 3, 50, 32, 16, 0,
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0, 0, 0, 0, 103, 0,
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0, 4, 242, 32, 16, 0,
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1, 0, 0, 0, 1, 0,
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0, 0, 104, 0, 0, 2,
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1, 0, 0, 0, 41, 0,
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0, 7, 18, 0, 16, 0,
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0, 0, 0, 0, 10, 16,
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16, 0, 0, 0, 0, 0,
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1, 64, 0, 0, 1, 0,
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0, 0, 1, 0, 0, 7,
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18, 0, 16, 0, 0, 0,
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0, 0, 10, 0, 16, 0,
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0, 0, 0, 0, 1, 64,
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0, 0, 2, 0, 0, 0,
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1, 0, 0, 7, 66, 0,
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16, 0, 0, 0, 0, 0,
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10, 16, 16, 0, 0, 0,
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0, 0, 1, 64, 0, 0,
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2, 0, 0, 0, 86, 0,
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0, 5, 50, 0, 16, 0,
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0, 0, 0, 0, 134, 0,
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16, 0, 0, 0, 0, 0,
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50, 0, 0, 11, 50, 32,
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16, 0, 0, 0, 0, 0,
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70, 0, 16, 0, 0, 0,
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0, 0, 230, 138, 32, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 70, 128, 32, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 50, 0, 0, 15,
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50, 32, 16, 0, 1, 0,
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0, 0, 70, 0, 16, 0,
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0, 0, 0, 0, 2, 64,
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0, 0, 0, 0, 0, 64,
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0, 0, 0, 192, 0, 0,
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0, 0, 0, 0, 0, 0,
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2, 64, 0, 0, 0, 0,
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128, 191, 0, 0, 128, 63,
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0, 0, 0, 0, 0, 0,
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0, 0, 54, 0, 0, 8,
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194, 32, 16, 0, 1, 0,
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0, 0, 2, 64, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 128, 63, 62, 0,
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0, 1, 83, 84, 65, 84,
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116, 0, 0, 0, 8, 0,
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0, 0, 1, 0, 0, 0,
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0, 0, 0, 0, 3, 0,
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0, 0, 2, 0, 0, 0,
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1, 0, 0, 0, 2, 0,
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0, 0, 1, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 1, 0, 0, 0,
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0, 0, 0, 0, 1, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0
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};
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@ -0,0 +1,2 @@
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fxc /T vs_4_0 /E main /O3 /Fh display_vs.hlsl.h /Vn "static s_display_vs_bytecode" display_vs.hlsl
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fxc /T ps_4_0 /E main /O3 /Fh display_ps.hlsl.h /Vn "static s_display_ps_bytecode" display_ps.hlsl
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