DMA: Delay transfer/interrupt
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4cc83e2228
commit
4bb8fb211d
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@ -5,14 +5,16 @@
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#include "common/state_wrapper.h"
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#include "gpu.h"
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#include "interrupt_controller.h"
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#include "system.h"
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Log_SetChannel(DMA);
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DMA::DMA() = default;
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DMA::~DMA() = default;
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bool DMA::Initialize(Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom)
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bool DMA::Initialize(System* system, Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom)
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{
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m_system = system;
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m_bus = bus;
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m_interrupt_controller = interrupt_controller;
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m_gpu = gpu;
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@ -22,6 +24,8 @@ bool DMA::Initialize(Bus* bus, InterruptController* interrupt_controller, GPU* g
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void DMA::Reset()
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{
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m_transfer_ticks = 0;
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m_transfer_pending = false;
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m_state = {};
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m_DPCR.bits = 0x07654321;
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m_DICR.bits = 0;
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@ -99,7 +103,7 @@ void DMA::WriteRegister(u32 offset, u32 value)
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(value & ChannelState::ChannelControl::WRITE_MASK);
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Log_DebugPrintf("DMA channel %u channel control <- 0x%08X", channel_index, state.channel_control.bits);
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if (CanRunChannel(static_cast<Channel>(channel_index)))
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RunDMA(static_cast<Channel>(channel_index));
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UpdateTransferPending();
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return;
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}
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@ -143,8 +147,39 @@ void DMA::SetRequest(Channel channel, bool request)
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return;
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cs.request = request;
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UpdateTransferPending();
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}
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void DMA::Execute(TickCount ticks)
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{
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if (!m_transfer_pending)
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return;
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m_transfer_ticks -= ticks;
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if (m_transfer_ticks <= 0)
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{
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m_transfer_pending = false;
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for (u32 i = 0; i < NUM_CHANNELS; i++)
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{
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const Channel channel = static_cast<Channel>(i);
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if (CanRunChannel(channel))
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{
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RunDMA(channel);
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m_transfer_pending |= CanRunChannel(channel);
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}
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}
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if (m_transfer_pending)
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{
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m_transfer_ticks += TRANSFER_TICKS;
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m_system->SetDowncount(m_transfer_ticks);
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}
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}
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else
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{
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m_system->SetDowncount(m_transfer_ticks);
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}
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}
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bool DMA::CanRunChannel(Channel channel) const
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@ -159,6 +194,17 @@ bool DMA::CanRunChannel(Channel channel) const
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return (cs.channel_control.enable_busy && cs.request);
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}
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bool DMA::CanRunAnyChannels() const
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{
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for (u32 i = 0; i < NUM_CHANNELS; i++)
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{
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if (CanRunChannel(static_cast<Channel>(i)))
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return true;
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}
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return false;
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}
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void DMA::RunDMA(Channel channel)
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{
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ChannelState& cs = m_state[static_cast<u32>(channel)];
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@ -353,3 +399,22 @@ void DMA::DMAWrite(Channel channel, u32 value, PhysicalMemoryAddress src_address
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break;
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}
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}
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void DMA::UpdateTransferPending()
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{
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if (CanRunAnyChannels())
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{
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if (m_transfer_pending)
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return;
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m_system->Synchronize();
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m_transfer_pending = true;
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m_transfer_ticks = TRANSFER_TICKS;
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m_system->SetDowncount(m_transfer_ticks);
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}
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else
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{
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m_transfer_pending = false;
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m_transfer_ticks = 0;
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}
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}
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@ -5,6 +5,7 @@
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class StateWrapper;
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class System;
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class Bus;
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class InterruptController;
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class GPU;
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@ -32,7 +33,7 @@ public:
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DMA();
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~DMA();
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bool Initialize(Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom);
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bool Initialize(System* system, Bus* bus, InterruptController* interrupt_controller, GPU* gpu, CDROM* cdrom);
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void Reset();
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bool DoState(StateWrapper& sw);
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@ -41,8 +42,11 @@ public:
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void SetRequest(Channel channel, bool request);
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void Execute(TickCount ticks);
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private:
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static constexpr PhysicalMemoryAddress ADDRESS_MASK = UINT32_C(0x00FFFFFF);
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static constexpr u32 TRANSFER_TICKS = 10;
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enum class SyncMode : u32
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{
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@ -54,6 +58,7 @@ private:
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// is everything enabled for a channel to operate?
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bool CanRunChannel(Channel channel) const;
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bool CanRunAnyChannels() const;
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void RunDMA(Channel channel);
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@ -63,11 +68,17 @@ private:
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// from memory -> device
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void DMAWrite(Channel channel, u32 value, PhysicalMemoryAddress src_address, u32 remaining_words);
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void UpdateTransferPending();
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System* m_system = nullptr;
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Bus* m_bus = nullptr;
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InterruptController* m_interrupt_controller = nullptr;
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GPU* m_gpu = nullptr;
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CDROM* m_cdrom = nullptr;
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TickCount m_transfer_ticks = 0;
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bool m_transfer_pending = false;
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struct ChannelState
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{
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u32 base_address;
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@ -107,7 +118,6 @@ private:
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} channel_control;
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bool request = false;
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bool irq = false;
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};
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std::array<ChannelState, NUM_CHANNELS> m_state = {};
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@ -39,7 +39,7 @@ bool System::Initialize()
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return false;
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}
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if (!m_dma->Initialize(m_bus.get(), m_interrupt_controller.get(), m_gpu.get(), m_cdrom.get()))
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if (!m_dma->Initialize(this, m_bus.get(), m_interrupt_controller.get(), m_gpu.get(), m_cdrom.get()))
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return false;
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if (!m_interrupt_controller->Initialize(m_cpu.get()))
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@ -246,6 +246,7 @@ void System::Synchronize()
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const TickCount pending_ticks = m_cpu->GetPendingTicks();
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m_cpu->ResetPendingTicks();
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m_dma->Execute(pending_ticks);
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m_gpu->Execute(pending_ticks);
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m_timers->AddSystemTicks(pending_ticks);
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m_cdrom->Execute(pending_ticks);
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