DMA: Simplify address masking
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6f4cf7d5e3
commit
29674df803
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@ -105,7 +105,7 @@ void DMA::WriteRegister(u32 offset, u32 value)
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{
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case 0x00:
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{
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state.base_address = value & ADDRESS_MASK;
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state.base_address = value & BASE_ADDRESS_MASK;
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Log_TracePrintf("DMA channel %u base address <- 0x%08X", channel_index, state.base_address);
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return;
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}
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@ -247,7 +247,7 @@ void DMA::TransferChannel(Channel channel)
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// start/trigger bit is cleared on beginning of transfer
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cs.channel_control.start_trigger = false;
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PhysicalMemoryAddress current_address = (cs.base_address & ~UINT32_C(3)) & ADDRESS_MASK;
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PhysicalMemoryAddress current_address = cs.base_address;
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const PhysicalMemoryAddress increment = cs.channel_control.address_step_reverse ? static_cast<u32>(-4) : UINT32_C(4);
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switch (cs.channel_control.sync_mode)
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{
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@ -277,23 +277,24 @@ void DMA::TransferChannel(Channel channel)
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for (;;)
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{
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u32 header;
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m_bus->DispatchAccess<MemoryAccessType::Read, MemoryAccessSize::Word>(current_address, header);
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m_bus->DispatchAccess<MemoryAccessType::Read, MemoryAccessSize::Word>(current_address & ADDRESS_MASK, header);
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const u32 word_count = header >> 24;
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const u32 next_address = header & UINT32_C(0xFFFFFF);
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const u32 next_address = header & UINT32_C(0x00FFFFFF);
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Log_TracePrintf(" .. linked list entry at 0x%08X size=%u(%u words) next=0x%08X", current_address,
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word_count * UINT32_C(4), word_count, next_address);
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current_address += sizeof(header);
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if (word_count > 0)
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TransferMemoryToDevice(channel, current_address, 4, word_count);
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TransferMemoryToDevice(channel, current_address & ADDRESS_MASK, 4, word_count);
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if (next_address & UINT32_C(0x800000))
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current_address = next_address;
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if (current_address & UINT32_C(0x800000))
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break;
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current_address = next_address & ADDRESS_MASK;
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}
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}
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cs.base_address = current_address;
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}
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break;
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@ -312,8 +313,8 @@ void DMA::TransferChannel(Channel channel)
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do
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{
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blocks_remaining--;
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TransferMemoryToDevice(channel, current_address, increment, block_size);
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current_address = (current_address + (increment * block_size)) & ADDRESS_MASK;
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TransferMemoryToDevice(channel, current_address & ADDRESS_MASK, increment, block_size);
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current_address = (current_address + (increment * block_size));
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} while (cs.request && blocks_remaining > 0);
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}
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else
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@ -321,12 +322,12 @@ void DMA::TransferChannel(Channel channel)
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do
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{
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blocks_remaining--;
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TransferDeviceToMemory(channel, current_address, increment, block_size);
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current_address = (current_address + (increment * block_size)) & ADDRESS_MASK;
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TransferDeviceToMemory(channel, current_address & ADDRESS_MASK, increment, block_size);
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current_address = (current_address + (increment * block_size));
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} while (cs.request && blocks_remaining > 0);
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}
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cs.base_address = current_address;
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cs.base_address = current_address & BASE_ADDRESS_MASK;
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cs.block_control.request.block_count = blocks_remaining;
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// finish transfer later if the request was cleared
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@ -49,7 +49,8 @@ public:
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void SetGPU(GPU* gpu) { m_gpu = gpu; }
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private:
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static constexpr PhysicalMemoryAddress ADDRESS_MASK = UINT32_C(0x00FFFFFF);
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static constexpr PhysicalMemoryAddress BASE_ADDRESS_MASK = UINT32_C(0x00FFFFFF);
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static constexpr PhysicalMemoryAddress ADDRESS_MASK = UINT32_C(0x001FFFFC);
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static constexpr u32 TRANSFER_TICKS = 10;
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enum class SyncMode : u32
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