From 0bfa1bf873f015caf69d12ea3d967f8ad80462bb Mon Sep 17 00:00:00 2001
From: Connor McLaughlin <stenzek@gmail.com>
Date: Thu, 18 Feb 2021 01:15:18 +1000
Subject: [PATCH] PGXP: Fix MFC0/MTC0

Doubt it'll change anything.
---
 src/core/cpu_core.cpp |  4 ++--
 src/core/pgxp.cpp     | 20 ++------------------
 src/core/pgxp.h       |  4 +---
 3 files changed, 5 insertions(+), 23 deletions(-)

diff --git a/src/core/cpu_core.cpp b/src/core/cpu_core.cpp
index 4417d9d5b..2505ea0fb 100644
--- a/src/core/cpu_core.cpp
+++ b/src/core/cpu_core.cpp
@@ -1303,7 +1303,7 @@ restart_instruction:
             const std::optional<u32> value = ReadCop0Reg(static_cast<Cop0Reg>(inst.r.rd.GetValue()));
 
             if constexpr (pgxp_mode == PGXPMode::CPU)
-              PGXP::CPU_MFC0(inst.bits, value.value_or(0), ReadReg(inst.i.rs));
+              PGXP::CPU_MFC0(inst.bits, value.value_or(0));
 
             if (value)
               WriteRegDelayed(inst.r.rt, value.value());
@@ -1319,7 +1319,7 @@ restart_instruction:
             if constexpr (pgxp_mode == PGXPMode::CPU)
             {
               PGXP::CPU_MTC0(inst.bits, ReadCop0Reg(static_cast<Cop0Reg>(inst.r.rd.GetValue())).value_or(0),
-                             ReadReg(inst.i.rs));
+                             ReadReg(inst.i.rt));
             }
           }
           break;
diff --git a/src/core/pgxp.cpp b/src/core/pgxp.cpp
index ea6a0347b..66e2d8188 100644
--- a/src/core/pgxp.cpp
+++ b/src/core/pgxp.cpp
@@ -1876,12 +1876,12 @@ void CPU_MTLO(u32 instr, u32 rdVal)
   CPU_Lo = CPU_reg[rd(instr)];
 }
 
-void CPU_MFC0(u32 instr, u32 rtVal, u32 rdVal)
+void CPU_MFC0(u32 instr, u32 rdVal)
 {
   // CPU[Rt] = CP0[Rd]
   Validate(&CP0_reg[rd(instr)], rdVal);
   CPU_reg[rt(instr)] = CP0_reg[rd(instr)];
-  CPU_reg[rt(instr)].value = rtVal;
+  CPU_reg[rt(instr)].value = rdVal;
 }
 
 void CPU_MTC0(u32 instr, u32 rdVal, u32 rtVal)
@@ -1892,20 +1892,4 @@ void CPU_MTC0(u32 instr, u32 rdVal, u32 rtVal)
   CP0_reg[rd(instr)].value = rdVal;
 }
 
-void CPU_CFC0(u32 instr, u32 rtVal, u32 rdVal)
-{
-  // CPU[Rt] = CP0[Rd]
-  Validate(&CP0_reg[rd(instr)], rdVal);
-  CPU_reg[rt(instr)] = CP0_reg[rd(instr)];
-  CPU_reg[rt(instr)].value = rtVal;
-}
-
-void CPU_CTC0(u32 instr, u32 rdVal, u32 rtVal)
-{
-  // CP0[Rd] = CPU[Rt]
-  Validate(&CPU_reg[rt(instr)], rtVal);
-  CP0_reg[rd(instr)] = CPU_reg[rt(instr)];
-  CP0_reg[rd(instr)].value = rdVal;
-}
-
 } // namespace PGXP
diff --git a/src/core/pgxp.h b/src/core/pgxp.h
index 0a497fe56..ec3851427 100644
--- a/src/core/pgxp.h
+++ b/src/core/pgxp.h
@@ -98,9 +98,7 @@ void CPU_MFLO(u32 instr, u32 loVal);
 void CPU_MTLO(u32 instr, u32 rdVal);
 
 // CP0 Data transfer tracking
-void CPU_MFC0(u32 instr, u32 rtVal, u32 rdVal);
+void CPU_MFC0(u32 instr, u32 rdVal);
 void CPU_MTC0(u32 instr, u32 rdVal, u32 rtVal);
-void CPU_CFC0(u32 instr, u32 rtVal, u32 rdVal);
-void CPU_CTC0(u32 instr, u32 rdVal, u32 rtVal);
 
 } // namespace PGXP
\ No newline at end of file