CPU/Recompiler: Optimize constant reads (and some writes)
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@ -22,6 +22,11 @@ Log_SetChannel(Bus);
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namespace Bus {
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enum : TickCount
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{
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RAM_READ_TICKS = 4
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};
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union MEMDELAY
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{
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u32 bits;
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@ -288,7 +293,7 @@ ALWAYS_INLINE static TickCount DoRAMAccess(u32 offset, u32& value)
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}
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}
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return (type == MemoryAccessType::Read) ? 4 : 0;
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return (type == MemoryAccessType::Read) ? RAM_READ_TICKS : 0;
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}
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template<MemoryAccessType type, MemoryAccessSize size>
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@ -753,7 +758,7 @@ ALWAYS_INLINE_RELEASE void DoInstructionRead(PhysicalMemoryAddress address, void
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{
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std::memcpy(data, &g_ram[address & RAM_MASK], sizeof(u32) * word_count);
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if constexpr (add_ticks)
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g_state.pending_ticks += (icache_read ? 1 : 4) * word_count;
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g_state.pending_ticks += (icache_read ? 1 : RAM_READ_TICKS) * word_count;
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}
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else if (address >= BIOS_BASE && address < (BIOS_BASE + BIOS_SIZE))
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{
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@ -776,7 +781,7 @@ TickCount GetInstructionReadTicks(VirtualMemoryAddress address)
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if (address < RAM_MIRROR_END)
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{
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return 4;
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return RAM_READ_TICKS;
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}
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else if (address >= BIOS_BASE && address < (BIOS_BASE + BIOS_SIZE))
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{
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@ -1307,6 +1312,64 @@ bool SafeWriteMemoryWord(VirtualMemoryAddress addr, u32 value)
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return DoMemoryAccess<MemoryAccessType::Write, MemoryAccessSize::Word>(addr, value) >= 0;
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}
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void* GetDirectReadMemoryPointer(VirtualMemoryAddress address, MemoryAccessSize size, TickCount* read_ticks)
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{
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using namespace Bus;
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const u32 seg = (address >> 29);
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if (seg != 0 && seg != 4 && seg != 5)
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return nullptr;
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const PhysicalMemoryAddress paddr = address & PHYSICAL_MEMORY_ADDRESS_MASK;
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if (paddr < RAM_MIRROR_END)
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{
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if (read_ticks)
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*read_ticks = RAM_READ_TICKS;
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return &g_ram[paddr & RAM_MASK];
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}
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if ((paddr & DCACHE_LOCATION_MASK) == DCACHE_LOCATION)
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{
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if (read_ticks)
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*read_ticks = 0;
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return &g_state.dcache[paddr & DCACHE_OFFSET_MASK];
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}
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if (paddr >= BIOS_BASE && paddr < (BIOS_BASE + BIOS_SIZE))
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{
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if (read_ticks)
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*read_ticks = m_bios_access_time[static_cast<u32>(size)];
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return &g_bios[paddr & BIOS_MASK];
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}
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return nullptr;
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}
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void* GetDirectWriteMemoryPointer(VirtualMemoryAddress address, MemoryAccessSize size)
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{
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using namespace Bus;
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const u32 seg = (address >> 29);
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if (seg != 0 && seg != 4 && seg != 5)
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return nullptr;
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const PhysicalMemoryAddress paddr = address & PHYSICAL_MEMORY_ADDRESS_MASK;
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#if 0
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// Not enabled until we can protect code regions.
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if (paddr < RAM_MIRROR_END)
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return &g_ram[paddr & RAM_MASK];
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#endif
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if ((paddr & DCACHE_LOCATION_MASK) == DCACHE_LOCATION)
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return &g_state.dcache[paddr & DCACHE_OFFSET_MASK];
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return nullptr;
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}
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namespace Recompiler::Thunks {
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u64 ReadMemoryByte(u32 address)
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@ -1,5 +1,6 @@
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#pragma once
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#include "cpu_core.h"
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#include "bus.h"
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namespace CPU {
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@ -72,5 +73,7 @@ bool ReadMemoryWord(VirtualMemoryAddress addr, u32* value);
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bool WriteMemoryByte(VirtualMemoryAddress addr, u8 value);
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bool WriteMemoryHalfWord(VirtualMemoryAddress addr, u16 value);
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bool WriteMemoryWord(VirtualMemoryAddress addr, u32 value);
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void* GetDirectReadMemoryPointer(VirtualMemoryAddress address, MemoryAccessSize size, TickCount* read_ticks);
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void* GetDirectWriteMemoryPointer(VirtualMemoryAddress address, MemoryAccessSize size);
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} // namespace CPU
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@ -1283,6 +1283,23 @@ void CodeGenerator::EmitAddCPUStructField(u32 offset, const Value& value)
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Value CodeGenerator::EmitLoadGuestMemory(const CodeBlockInstruction& cbi, const Value& address, RegSize size)
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{
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if (address.IsConstant())
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{
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TickCount read_ticks;
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void* ptr = GetDirectReadMemoryPointer(
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static_cast<u32>(address.constant_value),
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(size == RegSize_8) ? MemoryAccessSize::Byte :
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((size == RegSize_16) ? MemoryAccessSize::HalfWord : MemoryAccessSize::Word),
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&read_ticks);
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if (ptr)
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{
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Value result = m_register_cache.AllocateScratch(size);
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EmitLoadGlobal(result.GetHostRegister(), size, ptr);
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m_delayed_cycles_add += read_ticks;
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return result;
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}
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}
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AddPendingCycles(true);
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if (g_settings.cpu_recompiler_memory_exceptions)
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@ -1405,6 +1422,19 @@ Value CodeGenerator::EmitLoadGuestMemory(const CodeBlockInstruction& cbi, const
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void CodeGenerator::EmitStoreGuestMemory(const CodeBlockInstruction& cbi, const Value& address, const Value& value)
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{
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if (address.IsConstant())
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{
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void* ptr = GetDirectWriteMemoryPointer(
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static_cast<u32>(address.constant_value),
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(value.size == RegSize_8) ? MemoryAccessSize::Byte :
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((value.size == RegSize_16) ? MemoryAccessSize::HalfWord : MemoryAccessSize::Word));
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if (ptr)
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{
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EmitStoreGlobal(ptr, value);
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return;
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}
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}
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AddPendingCycles(true);
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if (g_settings.cpu_recompiler_memory_exceptions)
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@ -1480,12 +1510,50 @@ void CodeGenerator::EmitStoreGuestMemory(const CodeBlockInstruction& cbi, const
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void CodeGenerator::EmitLoadGlobal(HostReg host_reg, RegSize size, const void* ptr)
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{
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Panic("Not implemented");
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m_emit->Mov(GetHostReg64(RSCRATCH), reinterpret_cast<uintptr_t>(ptr));
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switch (size)
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{
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case RegSize_8:
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m_emit->Ldrb(GetHostReg8(host_reg), a64::MemOperand(GetHostReg64(RSCRATCH)));
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break;
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case RegSize_16:
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m_emit->Ldrh(GetHostReg16(host_reg), a64::MemOperand(GetHostReg64(RSCRATCH)));
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break;
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case RegSize_32:
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m_emit->Ldr(GetHostReg32(host_reg), a64::MemOperand(GetHostReg64(RSCRATCH)));
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break;
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default:
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UnreachableCode();
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break;
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}
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}
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void CodeGenerator::EmitStoreGlobal(void* ptr, const Value& value)
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{
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Panic("Not implemented");
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Value value_in_hr = GetValueInHostRegister(value);
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m_emit->Mov(GetHostReg64(RSCRATCH), reinterpret_cast<uintptr_t>(ptr));
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switch (value.size)
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{
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case RegSize_8:
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m_emit->Strb(GetHostReg8(value_in_hr), a64::MemOperand(GetHostReg64(RSCRATCH)));
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break;
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case RegSize_16:
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m_emit->Strh(GetHostReg16(value_in_hr), a64::MemOperand(GetHostReg64(RSCRATCH)));
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break;
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case RegSize_32:
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m_emit->Str(GetHostReg32(value_in_hr), a64::MemOperand(GetHostReg64(RSCRATCH)));
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break;
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default:
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UnreachableCode();
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break;
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}
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}
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void CodeGenerator::EmitFlushInterpreterLoadDelay()
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@ -1738,6 +1738,23 @@ void CodeGenerator::EmitAddCPUStructField(u32 offset, const Value& value)
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Value CodeGenerator::EmitLoadGuestMemory(const CodeBlockInstruction& cbi, const Value& address, RegSize size)
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{
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if (address.IsConstant())
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{
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TickCount read_ticks;
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void* ptr = GetDirectReadMemoryPointer(
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static_cast<u32>(address.constant_value),
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(size == RegSize_8) ? MemoryAccessSize::Byte :
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((size == RegSize_16) ? MemoryAccessSize::HalfWord : MemoryAccessSize::Word),
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&read_ticks);
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if (ptr)
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{
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Value result = m_register_cache.AllocateScratch(size);
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EmitLoadGlobal(result.GetHostRegister(), size, ptr);
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m_delayed_cycles_add += read_ticks;
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return result;
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}
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}
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AddPendingCycles(true);
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if (g_settings.cpu_recompiler_memory_exceptions)
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@ -1858,6 +1875,19 @@ Value CodeGenerator::EmitLoadGuestMemory(const CodeBlockInstruction& cbi, const
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void CodeGenerator::EmitStoreGuestMemory(const CodeBlockInstruction& cbi, const Value& address, const Value& value)
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{
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if (address.IsConstant())
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{
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void* ptr = GetDirectWriteMemoryPointer(
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static_cast<u32>(address.constant_value),
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(value.size == RegSize_8) ? MemoryAccessSize::Byte :
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((value.size == RegSize_16) ? MemoryAccessSize::HalfWord : MemoryAccessSize::Word));
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if (ptr)
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{
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EmitStoreGlobal(ptr, value);
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return;
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}
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}
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AddPendingCycles(true);
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if (g_settings.cpu_recompiler_memory_exceptions)
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