CPU/Recompiler: Inhibit allocation in mtc0/rfe branches
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@ -2239,11 +2239,13 @@ bool CodeGenerator::Compile_cop0(const CodeBlockInstruction& cbi)
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EmitLoadCPUStructField(sr_value.host_reg, sr_value.size, offsetof(State, cop0_regs.sr.bits));
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EmitLoadCPUStructField(cause_value.host_reg, cause_value.size, offsetof(State, cop0_regs.cause.bits));
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EmitBranchIfBitClear(sr_value.host_reg, sr_value.size, 0, &no_interrupt);
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m_register_cache.InhibitAllocation();
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EmitAnd(sr_value.host_reg, sr_value.host_reg, cause_value);
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EmitTest(sr_value.host_reg, Value::FromConstantU32(0xFF00));
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EmitConditionalBranch(Condition::Zero, false, &no_interrupt);
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EmitStoreCPUStructField(offsetof(State, downcount), Value::FromConstantU32(0));
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EmitBindLabel(&no_interrupt);
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m_register_cache.UninhibitAllocation();
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}
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InstructionEpilogue(cbi);
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@ -2284,8 +2286,10 @@ bool CodeGenerator::Compile_cop0(const CodeBlockInstruction& cbi)
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EmitAnd(sr.host_reg, sr.host_reg, cause_value);
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EmitTest(sr.host_reg, Value::FromConstantU32(0xFF00));
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EmitConditionalBranch(Condition::Zero, false, &no_interrupt);
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m_register_cache.InhibitAllocation();
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EmitStoreCPUStructField(offsetof(State, downcount), Value::FromConstantU32(0));
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EmitBindLabel(&no_interrupt);
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m_register_cache.UninhibitAllocation();
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InstructionEpilogue(cbi);
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return true;
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