CPU/CoreCache: Use virtual (unmasked) address as PC
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a267451614
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002d1cd4fd
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@ -46,7 +46,7 @@ void CodeCache::Execute()
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if (m_core->HasPendingInterrupt())
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if (m_core->HasPendingInterrupt())
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{
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{
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// TODO: Fill in m_next_instruction...
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// TODO: Fill in m_next_instruction...
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//m_core->SafeReadMemoryWord(m_core->m_regs.pc, &m_core->m_next_instruction.bits);
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// m_core->SafeReadMemoryWord(m_core->m_regs.pc, &m_core->m_next_instruction.bits);
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m_core->DispatchInterrupt();
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m_core->DispatchInterrupt();
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next_block_key = GetNextBlockKey();
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next_block_key = GetNextBlockKey();
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}
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}
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@ -163,10 +163,8 @@ void CodeCache::LogCurrentState()
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CodeBlockKey CodeCache::GetNextBlockKey() const
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CodeBlockKey CodeCache::GetNextBlockKey() const
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{
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{
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const u32 address = m_bus->UnmirrorAddress(m_core->m_regs.pc & UINT32_C(0x1FFFFFFF));
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CodeBlockKey key = {};
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CodeBlockKey key = {};
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key.SetPC(address);
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key.SetPC(m_core->GetRegs().pc);
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key.user_mode = m_core->InUserMode();
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key.user_mode = m_core->InUserMode();
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return key;
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return key;
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}
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}
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@ -248,8 +246,10 @@ bool CodeCache::CompileBlock(CodeBlock* block)
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for (;;)
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for (;;)
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{
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{
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CodeBlockInstruction cbi = {};
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CodeBlockInstruction cbi = {};
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if (!m_bus->IsCacheableAddress(pc) ||
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m_bus->DispatchAccess<MemoryAccessType::Read, MemoryAccessSize::Word>(pc, cbi.instruction.bits) < 0 ||
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const PhysicalMemoryAddress phys_addr = pc & PHYSICAL_MEMORY_ADDRESS_MASK;
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if (!m_bus->IsCacheableAddress(phys_addr) ||
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m_bus->DispatchAccess<MemoryAccessType::Read, MemoryAccessSize::Word>(phys_addr, cbi.instruction.bits) < 0 ||
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!IsInvalidInstruction(cbi.instruction))
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!IsInvalidInstruction(cbi.instruction))
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{
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{
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break;
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break;
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