65 lines
1.6 KiB
C++
65 lines
1.6 KiB
C++
// Copyright 2013 Dolphin Emulator Project
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// Licensed under GPLv2+
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// Refer to the license.txt file included.
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#include <cfenv>
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#include "Common/CPUDetect.h"
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#include "Common/CommonTypes.h"
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#include "Common/FPURoundMode.h"
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#include "Common/Intrinsics.h"
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namespace FPURoundMode
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{
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// Get the default SSE states here.
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static u32 saved_sse_state = _mm_getcsr();
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static const u32 default_sse_state = _mm_getcsr();
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void SetRoundMode(int mode)
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{
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// Convert PowerPC to native rounding mode.
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static const int rounding_mode_lut[] = {FE_TONEAREST, FE_TOWARDZERO, FE_UPWARD, FE_DOWNWARD};
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fesetround(rounding_mode_lut[mode]);
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}
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void SetPrecisionMode(PrecisionMode /* mode */)
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{
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// x64 doesn't need this - fpu is done with SSE
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}
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
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{
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// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
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const u32 EXCEPTION_MASK = 0x1F80;
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// Flush-To-Zero (non-IEEE mode: denormal outputs are set to +/- 0)
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const u32 FTZ = 0x8000;
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// lookup table for FPSCR.RN-to-MXCSR.RC translation
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static const u32 simd_rounding_table[] = {
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(0 << 13) | EXCEPTION_MASK, // nearest
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(3 << 13) | EXCEPTION_MASK, // zero
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(2 << 13) | EXCEPTION_MASK, // +inf
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(1 << 13) | EXCEPTION_MASK, // -inf
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};
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u32 csr = simd_rounding_table[rounding_mode];
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if (non_ieee_mode)
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{
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csr |= FTZ;
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}
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_mm_setcsr(csr);
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}
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void SaveSIMDState()
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{
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saved_sse_state = _mm_getcsr();
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}
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void LoadSIMDState()
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{
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_mm_setcsr(saved_sse_state);
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}
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void LoadDefaultSIMDState()
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{
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_mm_setcsr(default_sse_state);
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}
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} // namespace FPURoundMode
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