101 lines
3.4 KiB
C
101 lines
3.4 KiB
C
/*====================================================================
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filename: gdsp_registers.h
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project: GCemu
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created: 2004-6-18
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mail: duddie@walla.com
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Copyright (c) 2005 Duddie & Tratax
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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====================================================================*/
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#ifndef _GDSP_REGISTERS_H
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#define _GDSP_REGISTERS_H
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#include "Globals.h"
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// Register table taken from libasnd
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#define DSP_REG_AR0 0x00 // address registers
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#define DSP_REG_AR1 0x01
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#define DSP_REG_AR2 0x02
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#define DSP_REG_AR3 0x03 // used as jump function selector
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#define DSP_REG_IX0 0x04 // LEFT_VOLUME accel
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#define DSP_REG_IX1 0x05 // RIGHT_VOLUME accel
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#define DSP_REG_IX2 0x06 // ADDRH_SMP accel
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#define DSP_REG_IX3 0x07 // ADDRL_SMP accel
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#define DSP_REG_R08 0x08 // fixed to 48000 value
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#define DSP_REG_R09 0x09 // problems using this
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#define DSP_REG_R0A 0x0a // ADDREH_SMP accel
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#define DSP_REG_R0B 0x0b // ADDREL_SMP accel
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#define DSP_REG_ST0 0x0c
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#define DSP_REG_ST1 0x0d
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#define DSP_REG_ST2 0x0e
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#define DSP_REG_ST3 0x0f
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#define DSP_REG_CONFIG 0x12
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#define DSP_REG_SR 0x13
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#define DSP_REG_PRODL 0x14
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#define DSP_REG_PRODM 0x15
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#define DSP_REG_PRODH 0x16
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#define DSP_REG_PRODM2 0x17
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#define DSP_REG_AXL0 0x18
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#define DSP_REG_AXL1 0x19
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#define DSP_REG_AXH0 0x1a // SMP_R accel
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#define DSP_REG_AXH1 0x1b // SMP_L accel
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#define DSP_REG_ACC0 0x1c // accumulator (global)
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#define DSP_REG_ACC1 0x1d
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#define DSP_REG_ACL0 0x1c // Low accumulator
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#define DSP_REG_ACL1 0x1d
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#define DSP_REG_ACM0 0x1e // Mid accumulator
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#define DSP_REG_ACM1 0x1f
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#define DSP_REG_ACH0 0x10 // Sign extended 8 bit register 0
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#define DSP_REG_ACH1 0x11 // Sign extended 8 bit register 1
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// Hardware registers address
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#define DSP_REG_DSCR 0xffc9 // DSP DMA Control Reg
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#define DSP_REG_DSBL 0xffcb // DSP DMA Block Length
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#define DSP_REG_DSPA 0xffcd // DSP DMA DMEM Address
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#define DSP_REG_DSMAH 0xffce // DSP DMA Mem Address H
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#define DSP_REG_DSMAL 0xffcf // DSP DMA Mem Address L
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#define DSP_REG_DIRQ 0xfffb // DSP Irq Rest
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#define DSP_REG_DMBH 0xfffc // DSP Mailbox H
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#define DSP_REG_DMBL 0xfffd // DSP Mailbox L
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#define DSP_REG_CMBH 0xfffe // CPU Mailbox H
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#define DSP_REG_CMBL 0xffff // CPU Mailbox L
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#define DMA_TO_DSP 0
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#define DMA_TO_CPU 1
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// Stacks
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#define DSP_STACK_C 0
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#define DSP_STACK_D 1
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void dsp_reg_store_stack(u8 stack_reg, u16 val);
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u16 dsp_reg_load_stack(u8 stack_reg);
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#endif
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