685 lines
24 KiB
C++
685 lines
24 KiB
C++
// Copyright 2013 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include <cmath>
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#include "VideoConfig.h"
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#include "Statistics.h"
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#include "RenderBase.h"
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#include "VideoCommon.h"
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#include "PixelShaderManager.h"
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#include "PixelEngine.h"
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#include "BPFunctions.h"
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#include "BPStructs.h"
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#include "TextureDecoder.h"
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#include "VertexLoader.h"
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#include "VertexShaderManager.h"
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#include "Thread.h"
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#include "HW/Memmap.h"
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#include "PerfQueryBase.h"
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using namespace BPFunctions;
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extern volatile bool g_bSkipCurrentFrame;
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static const float s_gammaLUT[] =
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{
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1.0f,
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1.7f,
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2.2f,
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1.0f
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};
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void BPInit()
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{
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memset(&bpmem, 0, sizeof(bpmem));
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bpmem.bpMask = 0xFFFFFF;
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}
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void RenderToXFB(const BPCmd &bp, const EFBRectangle &rc, float yScale, float xfbLines, u32 xfbAddr, const u32 dstWidth, const u32 dstHeight, float gamma)
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{
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Renderer::RenderToXFB(xfbAddr, dstWidth, dstHeight, rc, gamma);
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}
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void BPWritten(const BPCmd& bp)
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{
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/*
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----------------------------------------------------------------------------------------------------------------
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Purpose: Writes to the BP registers
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Called: At the end of every: OpcodeDecoding.cpp ExecuteDisplayList > Decode() > LoadBPReg
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How It Works: First the pipeline is flushed then update the bpmem with the new value.
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Some of the BP cases have to call certain functions while others just update the bpmem.
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some bp cases check the changes variable, because they might not have to be updated all the time
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NOTE: it seems not all bp cases like checking changes, so calling if (bp.changes == 0 ? false : true)
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had to be ditched and the games seem to work fine with out it.
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NOTE2: Yet Another Gamecube Documentation calls them Bypass Raster State Registers but possibly completely wrong
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NOTE3: This controls the register groups: RAS1/2, SU, TF, TEV, C/Z, PEC
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TODO: Turn into function table. The (future) DisplayList (DL) jit can then call the functions directly,
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getting rid of dynamic dispatch. Unfortunately, few games use DLs properly - most\
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just stuff geometry in them and don't put state changes there
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----------------------------------------------------------------------------------------------------------------
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*/
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// check for invalid state, else unneeded configuration are built
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g_video_backend->CheckInvalidState();
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if (((s32*)&bpmem)[bp.address] == bp.newvalue)
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{
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if (!(bp.address == BPMEM_TRIGGER_EFB_COPY
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|| bp.address == BPMEM_CLEARBBOX1
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|| bp.address == BPMEM_CLEARBBOX2
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|| bp.address == BPMEM_SETDRAWDONE
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|| bp.address == BPMEM_PE_TOKEN_ID
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|| bp.address == BPMEM_PE_TOKEN_INT_ID
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|| bp.address == BPMEM_LOADTLUT0
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|| bp.address == BPMEM_LOADTLUT1
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|| bp.address == BPMEM_TEXINVALIDATE
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|| bp.address == BPMEM_PRELOAD_MODE
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|| bp.address == BPMEM_CLEAR_PIXEL_PERF))
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{
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return;
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}
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}
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FlushPipeline();
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((u32*)&bpmem)[bp.address] = bp.newvalue;
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switch (bp.address)
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{
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case BPMEM_GENMODE: // Set the Generation Mode
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{
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PRIM_LOG("genmode: texgen=%d, col=%d, multisampling=%d, tev=%d, cullmode=%d, ind=%d, zfeeze=%d",
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bpmem.genMode.numtexgens, bpmem.genMode.numcolchans,
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bpmem.genMode.multisampling, bpmem.genMode.numtevstages+1, bpmem.genMode.cullmode,
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bpmem.genMode.numindstages, bpmem.genMode.zfreeze);
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// Only call SetGenerationMode when cull mode changes.
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if (bp.changes & 0xC000)
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SetGenerationMode();
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break;
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}
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case BPMEM_IND_MTXA: // Index Matrix Changed
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case BPMEM_IND_MTXB:
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case BPMEM_IND_MTXC:
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case BPMEM_IND_MTXA+3:
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case BPMEM_IND_MTXB+3:
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case BPMEM_IND_MTXC+3:
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case BPMEM_IND_MTXA+6:
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case BPMEM_IND_MTXB+6:
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case BPMEM_IND_MTXC+6:
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if(bp.changes)
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PixelShaderManager::SetIndMatrixChanged((bp.address - BPMEM_IND_MTXA) / 3);
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break;
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case BPMEM_RAS1_SS0: // Index Texture Coordinate Scale 0
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if(bp.changes)
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PixelShaderManager::SetIndTexScaleChanged(false);
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break;
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case BPMEM_RAS1_SS1: // Index Texture Coordinate Scale 1
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if(bp.changes)
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PixelShaderManager::SetIndTexScaleChanged(true);
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break;
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// ----------------
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// Scissor Control
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// ----------------
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case BPMEM_SCISSORTL: // Scissor Rectable Top, Left
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case BPMEM_SCISSORBR: // Scissor Rectable Bottom, Right
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case BPMEM_SCISSOROFFSET: // Scissor Offset
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SetScissor();
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VertexShaderManager::SetViewportChanged();
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break;
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case BPMEM_LINEPTWIDTH: // Line Width
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SetLineWidth();
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break;
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case BPMEM_ZMODE: // Depth Control
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PRIM_LOG("zmode: test=%d, func=%d, upd=%d", bpmem.zmode.testenable, bpmem.zmode.func,
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bpmem.zmode.updateenable);
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SetDepthMode();
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break;
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case BPMEM_BLENDMODE: // Blending Control
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{
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if (bp.changes & 0xFFFF)
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{
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PRIM_LOG("blendmode: en=%d, open=%d, colupd=%d, alphaupd=%d, dst=%d, src=%d, sub=%d, mode=%d",
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bpmem.blendmode.blendenable, bpmem.blendmode.logicopenable, bpmem.blendmode.colorupdate, bpmem.blendmode.alphaupdate,
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bpmem.blendmode.dstfactor, bpmem.blendmode.srcfactor, bpmem.blendmode.subtract, bpmem.blendmode.logicmode);
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// Set LogicOp Blending Mode
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if (bp.changes & 0xF002) // logicopenable | logicmode
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SetLogicOpMode();
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// Set Dithering Mode
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if (bp.changes & 4) // dither
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SetDitherMode();
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// Set Blending Mode
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if (bp.changes & 0xFF1) // blendenable | alphaupdate | dstfactor | srcfactor | subtract
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SetBlendMode();
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// Set Color Mask
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if (bp.changes & 0x18) // colorupdate | alphaupdate
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SetColorMask();
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}
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break;
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}
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case BPMEM_CONSTANTALPHA: // Set Destination Alpha
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{
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PRIM_LOG("constalpha: alp=%d, en=%d", bpmem.dstalpha.alpha, bpmem.dstalpha.enable);
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if(bp.changes & 0xFF)
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PixelShaderManager::SetDestAlpha();
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if(bp.changes & 0x100)
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SetBlendMode();
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break;
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}
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// This is called when the game is done drawing the new frame (eg: like in DX: Begin(); Draw(); End();)
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// Triggers an interrupt on the PPC side so that the game knows when the GPU has finished drawing.
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// Tokens are similar.
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case BPMEM_SETDRAWDONE:
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switch (bp.newvalue & 0xFF)
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{
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case 0x02:
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PixelEngine::SetFinish(); // may generate interrupt
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DEBUG_LOG(VIDEO, "GXSetDrawDone SetPEFinish (value: 0x%02X)", (bp.newvalue & 0xFFFF));
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break;
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default:
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WARN_LOG(VIDEO, "GXSetDrawDone ??? (value 0x%02X)", (bp.newvalue & 0xFFFF));
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break;
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}
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break;
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case BPMEM_PE_TOKEN_ID: // Pixel Engine Token ID
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PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), false);
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DEBUG_LOG(VIDEO, "SetPEToken 0x%04x", (bp.newvalue & 0xFFFF));
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break;
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case BPMEM_PE_TOKEN_INT_ID: // Pixel Engine Interrupt Token ID
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PixelEngine::SetToken(static_cast<u16>(bp.newvalue & 0xFFFF), true);
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DEBUG_LOG(VIDEO, "SetPEToken + INT 0x%04x", (bp.newvalue & 0xFFFF));
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break;
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// ------------------------
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// EFB copy command. This copies a rectangle from the EFB to either RAM in a texture format or to XFB as YUYV.
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// It can also optionally clear the EFB while copying from it. To emulate this, we of course copy first and clear afterwards.
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case BPMEM_TRIGGER_EFB_COPY: // Copy EFB Region or Render to the XFB or Clear the screen.
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{
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// The bottom right is within the rectangle
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// The values in bpmem.copyTexSrcXY and bpmem.copyTexSrcWH are updated in case 0x49 and 0x4a in this function
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EFBRectangle rc;
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rc.left = (int)bpmem.copyTexSrcXY.x;
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rc.top = (int)bpmem.copyTexSrcXY.y;
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// Here Width+1 like Height, otherwise some textures are corrupted already since the native resolution.
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// TODO: What's the behavior of out of bound access?
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rc.right = (int)(bpmem.copyTexSrcXY.x + bpmem.copyTexSrcWH.x + 1);
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rc.bottom = (int)(bpmem.copyTexSrcXY.y + bpmem.copyTexSrcWH.y + 1);
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UPE_Copy PE_copy = bpmem.triggerEFBCopy;
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// Check if we are to copy from the EFB or draw to the XFB
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if (PE_copy.copy_to_xfb == 0)
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{
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if (GetConfig(CONFIG_SHOWEFBREGIONS))
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stats.efb_regions.push_back(rc);
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CopyEFB(bpmem.copyTexDest << 5, PE_copy.tp_realFormat(),
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bpmem.zcontrol.pixel_format, rc, PE_copy.intensity_fmt,
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PE_copy.half_scale);
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}
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else
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{
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// We should be able to get away with deactivating the current bbox tracking
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// here. Not sure if there's a better spot to put this.
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// the number of lines copied is determined by the y scale * source efb height
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PixelEngine::bbox_active = false;
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float yScale;
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if (PE_copy.scale_invert)
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yScale = 256.0f / (float)bpmem.dispcopyyscale;
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else
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yScale = (float)bpmem.dispcopyyscale / 256.0f;
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float xfbLines = ((bpmem.copyTexSrcWH.y + 1.0f) * yScale);
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if ((u32)xfbLines > MAX_XFB_HEIGHT)
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{
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INFO_LOG(VIDEO, "Tried to scale EFB to too many XFB lines (%f)", xfbLines);
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xfbLines = MAX_XFB_HEIGHT;
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}
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RenderToXFB(bp, rc, yScale, xfbLines,
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bpmem.copyTexDest << 5,
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bpmem.copyMipMapStrideChannels << 4,
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(u32)xfbLines,
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s_gammaLUT[PE_copy.gamma]);
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}
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// Clear the rectangular region after copying it.
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if (PE_copy.clear)
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{
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ClearScreen(rc);
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}
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break;
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}
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case BPMEM_LOADTLUT0: // This one updates bpmem.tlutXferSrc, no need to do anything here.
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break;
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case BPMEM_LOADTLUT1: // Load a Texture Look Up Table
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{
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u32 tlutTMemAddr = (bp.newvalue & 0x3FF) << 9;
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u32 tlutXferCount = (bp.newvalue & 0x1FFC00) >> 5;
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u8 *ptr = 0;
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// TODO - figure out a cleaner way.
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if (GetConfig(CONFIG_ISWII))
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ptr = GetPointer(bpmem.tmem_config.tlut_src << 5);
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else
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ptr = GetPointer((bpmem.tmem_config.tlut_src & 0xFFFFF) << 5);
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if (ptr)
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memcpy_gc(texMem + tlutTMemAddr, ptr, tlutXferCount);
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else
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PanicAlert("Invalid palette pointer %08x %08x %08x", bpmem.tmem_config.tlut_src, bpmem.tmem_config.tlut_src << 5, (bpmem.tmem_config.tlut_src & 0xFFFFF)<< 5);
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break;
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}
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case BPMEM_FOGRANGE: // Fog Settings Control
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case BPMEM_FOGRANGE+1:
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case BPMEM_FOGRANGE+2:
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case BPMEM_FOGRANGE+3:
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case BPMEM_FOGRANGE+4:
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case BPMEM_FOGRANGE+5:
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if (!GetConfig(CONFIG_DISABLEFOG) && bp.changes)
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PixelShaderManager::SetFogRangeAdjustChanged();
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break;
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case BPMEM_FOGPARAM0:
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case BPMEM_FOGBMAGNITUDE:
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case BPMEM_FOGBEXPONENT:
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case BPMEM_FOGPARAM3:
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if (!GetConfig(CONFIG_DISABLEFOG) && bp.changes)
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PixelShaderManager::SetFogParamChanged();
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break;
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case BPMEM_FOGCOLOR: // Fog Color
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if (!GetConfig(CONFIG_DISABLEFOG) && bp.changes)
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PixelShaderManager::SetFogColorChanged();
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break;
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case BPMEM_ALPHACOMPARE: // Compare Alpha Values
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PRIM_LOG("alphacmp: ref0=%d, ref1=%d, comp0=%d, comp1=%d, logic=%d", bpmem.alpha_test.ref0,
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bpmem.alpha_test.ref1, bpmem.alpha_test.comp0, bpmem.alpha_test.comp1, bpmem.alpha_test.logic);
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if(bp.changes & 0xFFFF)
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PixelShaderManager::SetAlpha();
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if(bp.changes)
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g_renderer->SetColorMask();
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break;
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case BPMEM_BIAS: // BIAS
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PRIM_LOG("ztex bias=0x%x", bpmem.ztex1.bias);
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if(bp.changes)
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PixelShaderManager::SetZTextureBias();
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break;
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case BPMEM_ZTEX2: // Z Texture type
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{
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if (bp.changes & 3)
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PixelShaderManager::SetZTextureTypeChanged();
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#if defined(_DEBUG) || defined(DEBUGFAST)
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const char* pzop[] = {"DISABLE", "ADD", "REPLACE", "?"};
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const char* pztype[] = {"Z8", "Z16", "Z24", "?"};
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PRIM_LOG("ztex op=%s, type=%s", pzop[bpmem.ztex2.op], pztype[bpmem.ztex2.type]);
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#endif
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break;
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}
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// ----------------------------------
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// Display Copy Filtering Control - GX_SetCopyFilter(u8 aa,u8 sample_pattern[12][2],u8 vf,u8 vfilter[7])
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// Fields: Destination, Frame2Field, Gamma, Source
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// ----------------------------------
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case BPMEM_DISPLAYCOPYFILER: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_DISPLAYCOPYFILER+1: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_DISPLAYCOPYFILER+2: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_DISPLAYCOPYFILER+3: // if (aa) { use sample_pattern } else { use 666666 }
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case BPMEM_COPYFILTER0: // if (vf) { use vfilter } else { use 595000 }
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case BPMEM_COPYFILTER1: // if (vf) { use vfilter } else { use 000015 }
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break;
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// -----------------------------------
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// Interlacing Control
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// -----------------------------------
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case BPMEM_FIELDMASK: // GX_SetFieldMask(u8 even_mask,u8 odd_mask)
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case BPMEM_FIELDMODE: // GX_SetFieldMode(u8 field_mode,u8 half_aspect_ratio)
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SetInterlacingMode(bp);
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break;
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// ----------------------------------------
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// Unimportant regs (Clock, Perf, ...)
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// ----------------------------------------
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case BPMEM_BUSCLOCK0: // TB Bus Clock ?
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case BPMEM_BUSCLOCK1: // TB Bus Clock ?
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case BPMEM_PERF0_TRI: // Perf: Triangles
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case BPMEM_PERF0_QUAD: // Perf: Quads
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case BPMEM_PERF1: // Perf: Some Clock, Texels, TX, TC
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break;
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// ----------------
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// EFB Copy config
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// ----------------
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case BPMEM_EFB_TL: // EFB Source Rect. Top, Left
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case BPMEM_EFB_BR: // EFB Source Rect. Bottom, Right (w, h - 1)
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case BPMEM_EFB_ADDR: // EFB Target Address
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break;
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// --------------
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// Clear Config
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// --------------
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case BPMEM_CLEAR_AR: // Alpha and Red Components
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case BPMEM_CLEAR_GB: // Green and Blue Components
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case BPMEM_CLEAR_Z: // Z Components (24-bit Zbuffer)
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break;
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// -------------------------
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// Bounding Box Control
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// -------------------------
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case BPMEM_CLEARBBOX1:
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case BPMEM_CLEARBBOX2:
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{
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if(g_ActiveConfig.bUseBBox)
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{
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// Don't compute bounding box if this frame is being skipped!
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// Wrong but valid values are better than bogus values...
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if(g_bSkipCurrentFrame)
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break;
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if (bp.address == BPMEM_CLEARBBOX1)
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{
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int right = bp.newvalue >> 10;
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int left = bp.newvalue & 0x3ff;
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// We should only set these if bbox is calculated properly.
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PixelEngine::bbox[0] = left;
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PixelEngine::bbox[1] = right;
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PixelEngine::bbox_active = true;
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}
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else
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{
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int bottom = bp.newvalue >> 10;
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int top = bp.newvalue & 0x3ff;
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// We should only set these if bbox is calculated properly.
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PixelEngine::bbox[2] = top;
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PixelEngine::bbox[3] = bottom;
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PixelEngine::bbox_active = true;
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}
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}
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}
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break;
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case BPMEM_TEXINVALIDATE:
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// TODO: Needs some restructuring in TextureCacheBase.
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break;
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case BPMEM_ZCOMPARE: // Set the Z-Compare and EFB pixel format
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OnPixelFormatChange();
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if(bp.changes & 7)
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{
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SetBlendMode(); // dual source could be activated by changing to PIXELFMT_RGBA6_Z24
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g_renderer->SetColorMask(); // alpha writing needs to be disabled if the new pixel format doesn't have an alpha channel
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}
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break;
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case BPMEM_MIPMAP_STRIDE: // MipMap Stride Channel
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case BPMEM_COPYYSCALE: // Display Copy Y Scale
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case BPMEM_IREF: /* 24 RID
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21 BC3 - Ind. Tex Stage 3 NTexCoord
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18 BI3 - Ind. Tex Stage 3 NTexMap
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15 BC2 - Ind. Tex Stage 2 NTexCoord
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12 BI2 - Ind. Tex Stage 2 NTexMap
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9 BC1 - Ind. Tex Stage 1 NTexCoord
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6 BI1 - Ind. Tex Stage 1 NTexMap
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3 BC0 - Ind. Tex Stage 0 NTexCoord
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0 BI0 - Ind. Tex Stage 0 NTexMap*/
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case BPMEM_TEV_KSEL: // Texture Environment Swap Mode Table 0
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case BPMEM_TEV_KSEL+1:// Texture Environment Swap Mode Table 1
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case BPMEM_TEV_KSEL+2:// Texture Environment Swap Mode Table 2
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case BPMEM_TEV_KSEL+3:// Texture Environment Swap Mode Table 3
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case BPMEM_TEV_KSEL+4:// Texture Environment Swap Mode Table 4
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case BPMEM_TEV_KSEL+5:// Texture Environment Swap Mode Table 5
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case BPMEM_TEV_KSEL+6:// Texture Environment Swap Mode Table 6
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case BPMEM_TEV_KSEL+7:// Texture Environment Swap Mode Table 7
|
|
case BPMEM_BP_MASK: // This Register can be used to limit to which bits of BP registers is actually written to. the mask is
|
|
// only valid for the next BP command, and will reset itself.
|
|
case BPMEM_IND_IMASK: // Index Mask ?
|
|
case BPMEM_REVBITS: // Always set to 0x0F when GX_InitRevBits() is called.
|
|
break;
|
|
|
|
case BPMEM_CLEAR_PIXEL_PERF:
|
|
// GXClearPixMetric writes 0xAAA here, Sunshine alternates this register between values 0x000 and 0xAAA
|
|
g_perf_query->ResetQuery();
|
|
break;
|
|
|
|
case BPMEM_PRELOAD_ADDR:
|
|
case BPMEM_PRELOAD_TMEMEVEN:
|
|
case BPMEM_PRELOAD_TMEMODD: // Used when PRELOAD_MODE is set
|
|
break;
|
|
|
|
case BPMEM_PRELOAD_MODE: // Set to 0 when GX_TexModeSync() is called.
|
|
// if this is different from 0, manual TMEM management is used (GX_PreloadEntireTexture).
|
|
if (bp.newvalue != 0)
|
|
{
|
|
// TODO: Not quite sure if this is completely correct (likely not)
|
|
// NOTE: libogc's implementation of GX_PreloadEntireTexture seems flawed, so it's not necessarily a good reference for RE'ing this feature.
|
|
|
|
BPS_TmemConfig& tmem_cfg = bpmem.tmem_config;
|
|
u8* src_ptr = Memory::GetPointer(tmem_cfg.preload_addr << 5); // TODO: Should we add mask here on GC?
|
|
u32 size = tmem_cfg.preload_tile_info.count * TMEM_LINE_SIZE;
|
|
u32 tmem_addr_even = tmem_cfg.preload_tmem_even * TMEM_LINE_SIZE;
|
|
|
|
if (tmem_cfg.preload_tile_info.type != 3)
|
|
{
|
|
if (tmem_addr_even + size > TMEM_SIZE)
|
|
size = TMEM_SIZE - tmem_addr_even;
|
|
|
|
memcpy(texMem + tmem_addr_even, src_ptr, size);
|
|
}
|
|
else // RGBA8 tiles (and CI14, but that might just be stupid libogc!)
|
|
{
|
|
// AR and GB tiles are stored in separate TMEM banks => can't use a single memcpy for everything
|
|
u32 tmem_addr_odd = tmem_cfg.preload_tmem_odd * TMEM_LINE_SIZE;
|
|
|
|
for (u32 i = 0; i < tmem_cfg.preload_tile_info.count; ++i)
|
|
{
|
|
if (tmem_addr_even + TMEM_LINE_SIZE > TMEM_SIZE ||
|
|
tmem_addr_odd + TMEM_LINE_SIZE > TMEM_SIZE)
|
|
break;
|
|
|
|
memcpy(texMem + tmem_addr_even, src_ptr, TMEM_LINE_SIZE);
|
|
memcpy(texMem + tmem_addr_odd, src_ptr + TMEM_LINE_SIZE, TMEM_LINE_SIZE);
|
|
tmem_addr_even += TMEM_LINE_SIZE;
|
|
tmem_addr_odd += TMEM_LINE_SIZE;
|
|
src_ptr += TMEM_LINE_SIZE * 2;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
|
|
// ------------------------------------------------
|
|
// On Default, we try to look for other things
|
|
// before we give up and say its an unknown opcode
|
|
// ------------------------------------------------
|
|
default:
|
|
switch (bp.address & 0xFC) // Texture sampler filter
|
|
{
|
|
// -------------------------
|
|
// Texture Environment Order
|
|
// -------------------------
|
|
case BPMEM_TREF:
|
|
case BPMEM_TREF+4:
|
|
break;
|
|
// ----------------------
|
|
// Set wrap size
|
|
// ----------------------
|
|
case BPMEM_SU_SSIZE:
|
|
case BPMEM_SU_TSIZE:
|
|
case BPMEM_SU_SSIZE+2:
|
|
case BPMEM_SU_TSIZE+2:
|
|
case BPMEM_SU_SSIZE+4:
|
|
case BPMEM_SU_TSIZE+4:
|
|
case BPMEM_SU_SSIZE+6:
|
|
case BPMEM_SU_TSIZE+6:
|
|
case BPMEM_SU_SSIZE+8:
|
|
case BPMEM_SU_TSIZE+8:
|
|
case BPMEM_SU_SSIZE+10:
|
|
case BPMEM_SU_TSIZE+10:
|
|
case BPMEM_SU_SSIZE+12:
|
|
case BPMEM_SU_TSIZE+12:
|
|
case BPMEM_SU_SSIZE+14:
|
|
case BPMEM_SU_TSIZE+14:
|
|
if(bp.changes)
|
|
PixelShaderManager::SetTexCoordChanged((bp.address - BPMEM_SU_SSIZE) >> 1);
|
|
break;
|
|
// ------------------------
|
|
// BPMEM_TX_SETMODE0 - (Texture lookup and filtering mode) LOD/BIAS Clamp, MaxAnsio, LODBIAS, DiagLoad, Min Filter, Mag Filter, Wrap T, S
|
|
// BPMEM_TX_SETMODE1 - (LOD Stuff) - Max LOD, Min LOD
|
|
// ------------------------
|
|
case BPMEM_TX_SETMODE0: // (0x90 for linear)
|
|
case BPMEM_TX_SETMODE0_4:
|
|
break;
|
|
|
|
case BPMEM_TX_SETMODE1:
|
|
case BPMEM_TX_SETMODE1_4:
|
|
break;
|
|
// --------------------------------------------
|
|
// BPMEM_TX_SETIMAGE0 - Texture width, height, format
|
|
// BPMEM_TX_SETIMAGE1 - even LOD address in TMEM - Image Type, Cache Height, Cache Width, TMEM Offset
|
|
// BPMEM_TX_SETIMAGE2 - odd LOD address in TMEM - Cache Height, Cache Width, TMEM Offset
|
|
// BPMEM_TX_SETIMAGE3 - Address of Texture in main memory
|
|
// --------------------------------------------
|
|
case BPMEM_TX_SETIMAGE0:
|
|
case BPMEM_TX_SETIMAGE0_4:
|
|
case BPMEM_TX_SETIMAGE1:
|
|
case BPMEM_TX_SETIMAGE1_4:
|
|
case BPMEM_TX_SETIMAGE2:
|
|
case BPMEM_TX_SETIMAGE2_4:
|
|
case BPMEM_TX_SETIMAGE3:
|
|
case BPMEM_TX_SETIMAGE3_4:
|
|
break;
|
|
// -------------------------------
|
|
// Set a TLUT
|
|
// BPMEM_TX_SETTLUT - Format, TMEM Offset (offset of TLUT from start of TMEM high bank > > 5)
|
|
// -------------------------------
|
|
case BPMEM_TX_SETTLUT:
|
|
case BPMEM_TX_SETLUT_4:
|
|
break;
|
|
|
|
// ---------------------------------------------------
|
|
// Set the TEV Color
|
|
// ---------------------------------------------------
|
|
case BPMEM_TEV_REGISTER_L: // Reg 1
|
|
case BPMEM_TEV_REGISTER_H:
|
|
case BPMEM_TEV_REGISTER_L+2: // Reg 2
|
|
case BPMEM_TEV_REGISTER_H+2:
|
|
case BPMEM_TEV_REGISTER_L+4: // Reg 3
|
|
case BPMEM_TEV_REGISTER_H+4:
|
|
case BPMEM_TEV_REGISTER_L+6: // Reg 4
|
|
case BPMEM_TEV_REGISTER_H+6:
|
|
// some games only send the _L part, so always update
|
|
// there actually are 2 register behind each of these
|
|
// addresses, selected by the type bit.
|
|
{
|
|
// don't compare with changes!
|
|
int num = (bp.address >> 1) & 0x3;
|
|
if ((bp.address & 1) == 0)
|
|
PixelShaderManager::SetColorChanged(bpmem.tevregs[num].low.type, num);
|
|
else
|
|
PixelShaderManager::SetColorChanged(bpmem.tevregs[num].high.type, num);
|
|
}
|
|
break;
|
|
|
|
// ------------------------------------------------
|
|
// On Default, we try to look for other things
|
|
// before we give up and say its an unknown opcode
|
|
// again ...
|
|
// ------------------------------------------------
|
|
default:
|
|
switch (bp.address & 0xF0)
|
|
{
|
|
// --------------
|
|
// Indirect Tev
|
|
// --------------
|
|
case BPMEM_IND_CMD:
|
|
case BPMEM_IND_CMD+1:
|
|
case BPMEM_IND_CMD+2:
|
|
case BPMEM_IND_CMD+3:
|
|
case BPMEM_IND_CMD+4:
|
|
case BPMEM_IND_CMD+5:
|
|
case BPMEM_IND_CMD+6:
|
|
case BPMEM_IND_CMD+7:
|
|
case BPMEM_IND_CMD+8:
|
|
case BPMEM_IND_CMD+9:
|
|
case BPMEM_IND_CMD+10:
|
|
case BPMEM_IND_CMD+11:
|
|
case BPMEM_IND_CMD+12:
|
|
case BPMEM_IND_CMD+13:
|
|
case BPMEM_IND_CMD+14:
|
|
case BPMEM_IND_CMD+15:
|
|
break;
|
|
// --------------------------------------------------
|
|
// Set Color/Alpha of a Tev
|
|
// BPMEM_TEV_COLOR_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D
|
|
// BPMEM_TEV_ALPHA_ENV - Dest, Shift, Clamp, Sub, Bias, Sel A, Sel B, Sel C, Sel D, T Swap, R Swap
|
|
// --------------------------------------------------
|
|
case BPMEM_TEV_COLOR_ENV: // Texture Environment 1
|
|
case BPMEM_TEV_ALPHA_ENV:
|
|
case BPMEM_TEV_COLOR_ENV+2: // Texture Environment 2
|
|
case BPMEM_TEV_ALPHA_ENV+2:
|
|
case BPMEM_TEV_COLOR_ENV+4: // Texture Environment 3
|
|
case BPMEM_TEV_ALPHA_ENV+4:
|
|
case BPMEM_TEV_COLOR_ENV+6: // Texture Environment 4
|
|
case BPMEM_TEV_ALPHA_ENV+6:
|
|
case BPMEM_TEV_COLOR_ENV+8: // Texture Environment 5
|
|
case BPMEM_TEV_ALPHA_ENV+8:
|
|
case BPMEM_TEV_COLOR_ENV+10: // Texture Environment 6
|
|
case BPMEM_TEV_ALPHA_ENV+10:
|
|
case BPMEM_TEV_COLOR_ENV+12: // Texture Environment 7
|
|
case BPMEM_TEV_ALPHA_ENV+12:
|
|
case BPMEM_TEV_COLOR_ENV+14: // Texture Environment 8
|
|
case BPMEM_TEV_ALPHA_ENV+14:
|
|
case BPMEM_TEV_COLOR_ENV+16: // Texture Environment 9
|
|
case BPMEM_TEV_ALPHA_ENV+16:
|
|
case BPMEM_TEV_COLOR_ENV+18: // Texture Environment 10
|
|
case BPMEM_TEV_ALPHA_ENV+18:
|
|
case BPMEM_TEV_COLOR_ENV+20: // Texture Environment 11
|
|
case BPMEM_TEV_ALPHA_ENV+20:
|
|
case BPMEM_TEV_COLOR_ENV+22: // Texture Environment 12
|
|
case BPMEM_TEV_ALPHA_ENV+22:
|
|
case BPMEM_TEV_COLOR_ENV+24: // Texture Environment 13
|
|
case BPMEM_TEV_ALPHA_ENV+24:
|
|
case BPMEM_TEV_COLOR_ENV+26: // Texture Environment 14
|
|
case BPMEM_TEV_ALPHA_ENV+26:
|
|
case BPMEM_TEV_COLOR_ENV+28: // Texture Environment 15
|
|
case BPMEM_TEV_ALPHA_ENV+28:
|
|
case BPMEM_TEV_COLOR_ENV+30: // Texture Environment 16
|
|
case BPMEM_TEV_ALPHA_ENV+30:
|
|
break;
|
|
default:
|
|
WARN_LOG(VIDEO, "Unknown BP opcode: address = 0x%08x value = 0x%08x", bp.address, bp.newvalue);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
// Called when loading a saved state.
|
|
void BPReload()
|
|
{
|
|
// restore anything that goes straight to the renderer.
|
|
// let's not risk actually replaying any writes.
|
|
// note that PixelShaderManager is already covered since it has its own DoState.
|
|
SetGenerationMode();
|
|
SetScissor();
|
|
SetLineWidth();
|
|
SetDepthMode();
|
|
SetLogicOpMode();
|
|
SetDitherMode();
|
|
SetBlendMode();
|
|
SetColorMask();
|
|
OnPixelFormatChange();
|
|
{
|
|
BPCmd bp = {BPMEM_FIELDMASK, 0xFFFFFF, static_cast<int>(((u32*)&bpmem)[BPMEM_FIELDMASK])};
|
|
SetInterlacingMode(bp);
|
|
}
|
|
{
|
|
BPCmd bp = {BPMEM_FIELDMODE, 0xFFFFFF, static_cast<int>(((u32*)&bpmem)[BPMEM_FIELDMODE])};
|
|
SetInterlacingMode(bp);
|
|
}
|
|
}
|