341 lines
7.6 KiB
C
341 lines
7.6 KiB
C
/*====================================================================
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filename: gdsp_opcodes_helper.h
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project: GameCube DSP Tool (gcdsp)
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created: 2005.03.04
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mail: duddie@walla.com
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Copyright (c) 2005 Duddie
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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====================================================================*/
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#ifndef _DSP_INT_UTIL_H
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#define _DSP_INT_UTIL_H
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#include "Common.h"
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#include "DSPInterpreter.h"
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#include "DSPCore.h"
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#include "DSPMemoryMap.h"
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#include "DSPStacks.h"
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// ---------------------------------------------------------------------------------------
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// --- SR
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// ---------------------------------------------------------------------------------------
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inline void dsp_SR_set_flag(int flag)
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{
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g_dsp.r[DSP_REG_SR] |= flag;
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}
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inline bool dsp_SR_is_flag_set(int flag)
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{
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return (g_dsp.r[DSP_REG_SR] & flag) != 0;
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}
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// ---------------------------------------------------------------------------------------
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// --- AR increments, decrements
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// ---------------------------------------------------------------------------------------
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//
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// HORRIBLE UGLINESS, someone please fix.
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// See http://code.google.com/p/dolphin-emu/source/detail?r=3125
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//
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// increment, decrement 100% ok (as far as i can tell), increase, decrease still probs
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// NextPowerOf2()-1
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inline u16 ToMask(u16 a)
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{
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a = a | (a >> 8);
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a = a | (a >> 4);
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a = a | (a >> 2);
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return a | (a >> 1);
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}
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inline u16 dsp_increment_addr_reg(u16 reg, u16 ar)
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{
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u16 wr = g_dsp.r[DSP_REG_WR0 + reg];
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u16 tmb = ToMask(wr);
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if ((ar & tmb) == tmb)
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ar-=wr;
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else
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ar++;
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return ar;
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}
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inline u16 dsp_increment_addr_reg(u16 reg)
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{
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return dsp_increment_addr_reg(reg, g_dsp.r[reg]);
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}
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inline u16 dsp_decrement_addr_reg(u16 reg, u16 ar)
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{
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u16 wr = g_dsp.r[DSP_REG_WR0 + reg];
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u16 tmb = ToMask(wr);
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u16 min = (tmb+1-ar)&tmb;
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if ((wr < min) || !min)
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ar+=wr;
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else
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ar--;
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return ar;
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}
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inline u16 dsp_decrement_addr_reg(u16 reg)
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{
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return dsp_decrement_addr_reg(reg, g_dsp.r[reg]);
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}
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inline u16 dsp_increase_addr_reg(u16 reg, s16 ix)
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{
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u16 ar = g_dsp.r[reg];
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if (ix > 0) {
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for (s32 i = 0; i < ix; i++) {
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ar = dsp_increment_addr_reg(reg, ar);
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}
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} else if (ix < 0) {
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for (s32 i = 0; i < (-ix); i++) {
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ar = dsp_decrement_addr_reg(reg, ar);
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}
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}
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return ar;
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}
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inline u16 dsp_decrease_addr_reg(u16 reg, s16 ix)
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{
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u16 ar = g_dsp.r[reg];
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if (ix > 0) {
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for (s32 i = 0; i < ix; i++) {
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ar = dsp_decrement_addr_reg(reg, ar);
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}
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} else if (ix < 0) {
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for (s32 i = 0; i < (-ix); i++) {
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ar = dsp_increment_addr_reg(reg, ar);
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}
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}
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return ar;
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}
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// ---------------------------------------------------------------------------------------
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// --- reg
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// ---------------------------------------------------------------------------------------
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inline u16 dsp_op_read_reg(int reg)
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{
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switch (reg & 0x1f) {
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case DSP_REG_ST0:
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case DSP_REG_ST1:
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case DSP_REG_ST2:
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case DSP_REG_ST3:
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return dsp_reg_load_stack(reg - 0x0c);
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default:
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return g_dsp.r[reg];
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}
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}
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inline void dsp_op_write_reg(int reg, u16 val)
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{
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switch (reg & 0x1f) {
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// 8-bit sign extended registers. Should look at prod.h too...
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case DSP_REG_ACH0:
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case DSP_REG_ACH1:
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// sign extend from the bottom 8 bits.
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g_dsp.r[reg] = (u16)(s16)(s8)(u8)val;
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break;
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// Stack registers.
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case DSP_REG_ST0:
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case DSP_REG_ST1:
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case DSP_REG_ST2:
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case DSP_REG_ST3:
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dsp_reg_store_stack(reg - 0x0c, val);
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break;
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default:
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g_dsp.r[reg] = val;
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break;
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}
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}
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inline void dsp_conditional_extend_accum(int reg)
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{
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switch (reg)
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{
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case DSP_REG_ACM0:
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case DSP_REG_ACM1:
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if (g_dsp.r[DSP_REG_SR] & SR_40_MODE_BIT)
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{
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// Sign extend into whole accum.
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u16 val = g_dsp.r[reg];
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g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACH0] = (val & 0x8000) ? 0xFFFF : 0x0000;
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g_dsp.r[reg - DSP_REG_ACM0 + DSP_REG_ACL0] = 0;
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}
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}
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}
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// ---------------------------------------------------------------------------------------
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// --- prod
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// ---------------------------------------------------------------------------------------
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inline s64 dsp_get_long_prod()
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{
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#if PROFILE
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ProfilerAddDelta(g_dsp.err_pc, 1);
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#endif
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s64 val = (s8)(u8)g_dsp.r[DSP_REG_PRODH];
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val <<= 32;
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s64 low_prod = g_dsp.r[DSP_REG_PRODM];
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low_prod += g_dsp.r[DSP_REG_PRODM2];
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low_prod <<= 16;
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low_prod |= g_dsp.r[DSP_REG_PRODL];
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val += low_prod;
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return val;
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}
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inline s64 dsp_get_long_prod_round_prodl()
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{
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s64 prod = dsp_get_long_prod();
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if (g_dsp.r[DSP_REG_SR] & SR_ROUNDING_MODE)
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prod = (prod + 0x8000) & ~0xffff;
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else
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{
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if (prod & 0x10000)
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prod = (prod + 0x8000) & ~0xffff;
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else
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prod = (prod + 0x7fff) & ~0xffff;
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}
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return prod;
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}
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// For accurate emulation, this is wrong - but the real prod registers behave
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// in completely bizarre ways. Probably not meaningful to emulate them accurately.
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inline void dsp_set_long_prod(s64 val)
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{
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#if PROFILE
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ProfilerAddDelta(g_dsp.err_pc, 1);
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#endif
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g_dsp.r[DSP_REG_PRODL] = (u16)val;
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val >>= 16;
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g_dsp.r[DSP_REG_PRODM] = (u16)val;
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val >>= 16;
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g_dsp.r[DSP_REG_PRODH] = (u8)val;
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g_dsp.r[DSP_REG_PRODM2] = 0;
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}
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// ---------------------------------------------------------------------------------------
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// --- ACC - main accumulators (40-bit)
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// ---------------------------------------------------------------------------------------
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inline s64 dsp_get_long_acc(int reg)
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{
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#if PROFILE
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ProfilerAddDelta(g_dsp.err_pc, 1);
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#endif
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_assert_(reg < 2);
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s64 high = (s64)(s8)g_dsp.r[DSP_REG_ACH0 + reg] << 32;
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u32 mid_low = ((u32)g_dsp.r[DSP_REG_ACM0 + reg] << 16) | g_dsp.r[DSP_REG_ACL0 + reg];
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return high | mid_low;
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}
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inline void dsp_set_long_acc(int _reg, s64 val)
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{
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#if PROFILE
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ProfilerAddDelta(g_dsp.err_pc, 1);
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#endif
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_assert_(_reg < 2);
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g_dsp.r[DSP_REG_ACL0 + _reg] = (u16)val;
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val >>= 16;
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g_dsp.r[DSP_REG_ACM0 + _reg] = (u16)val;
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val >>= 16;
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g_dsp.r[DSP_REG_ACH0 + _reg] = (u16)(s16)(s8)(u8)val;
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}
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inline s64 dsp_convert_long_acc(s64 val) // s64 -> s40
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{
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return ((s64)(s8)(val >> 32))<<32 | (u32)val;
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}
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inline s64 dsp_round_long_acc(s64 val)
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{
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if (g_dsp.r[DSP_REG_SR] & SR_ROUNDING_MODE)
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val = (val + 0x8000) & ~0xffff;
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else
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{
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if (val & 0x10000)
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val = (val + 0x8000) & ~0xffff;
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else
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val = (val + 0x7fff) & ~0xffff;
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}
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return val;
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}
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inline s16 dsp_get_acc_l(int _reg)
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{
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_assert_(_reg < 2);
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return g_dsp.r[DSP_REG_ACL0 + _reg];
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}
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inline s16 dsp_get_acc_m(int _reg)
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{
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_assert_(_reg < 2);
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return g_dsp.r[DSP_REG_ACM0 + _reg];
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}
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inline s16 dsp_get_acc_h(int _reg)
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{
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_assert_(_reg < 2);
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return g_dsp.r[DSP_REG_ACH0 + _reg];
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}
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// ---------------------------------------------------------------------------------------
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// --- AX - extra accumulators (32-bit)
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// ---------------------------------------------------------------------------------------
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inline s32 dsp_get_long_acx(int _reg)
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{
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#if PROFILE
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ProfilerAddDelta(g_dsp.err_pc, 1);
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#endif
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_assert_(_reg < 2);
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return ((u32)g_dsp.r[DSP_REG_AXH0 + _reg] << 16) | g_dsp.r[DSP_REG_AXL0 + _reg];
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}
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inline s16 dsp_get_ax_l(int _reg)
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{
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_assert_(_reg < 2);
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return (s16)g_dsp.r[DSP_REG_AXL0 + _reg];
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}
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inline s16 dsp_get_ax_h(int _reg)
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{
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_assert_(_reg < 2);
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return (s16)g_dsp.r[DSP_REG_AXH0 + _reg];
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}
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#endif
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