791c7d5a84
Replace the instruction with the scalar variant FCVT instruction. FCVT{N,L} 8 cycles latency on the Cortex A57 FCVT has five cycle latency and slightly higher throughput On the A72 all three of these instructions will have three cycle latency, While FCVT{N,L} will have half the throughput. |
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Android | ||
Core | ||
DSPSpy | ||
DSPTool | ||
PCH | ||
UnitTests | ||
VSProps | ||
.clang-format | ||
CMakeLists.txt | ||
dolphin-emu.sln |