Merge c1ff466e16 into 6851ed73f4

Merge pull request #13064 from PatrickFerry/gameini_fixing_mistakes
GameINI: Fixing Various Mistakes
2024-09-19 11:29:52 +02:00 · 2024-09-16 23:24:56 +01:00 · 2024-09-15 21:49:06 +01:00 · 2024-09-15 21:48:59 +01:00 · 2024-09-15 21:48:44 +01:00 · 2024-09-15 21:48:25 +01:00
6 changed files with 34 additions and 20 deletions
--- a/Data/Sys/GameSettings/E78.ini
+++ b/Data/Sys/GameSettings/E78.ini
@ -13,4 +13,13 @@
 # Add action replay cheats here.

 [Video_Hacks]
-EFBToTextureEnable = False
+EFBEmulateFormatChanges = True
+# Solves minor graphical issues when starting level and game over screen
+#EFBToTextureEnable = False
+
+[Video_Settings]
+MSAA = 0
+
+[Video_Enhancements]
+ForceFiltering = False
+ForceTrueColor = False
--- a/Data/Sys/GameSettings/G3Q.ini
+++ b/Data/Sys/GameSettings/G3Q.ini
@ -13,7 +13,7 @@
 # Add action replay cheats here.

 [Video_Hacks]
-ImmediateXFBEnable = False
+VertexRounding = True

 [Video_Settings]
 SafeTextureCacheColorSamples = 512
--- a/Data/Sys/GameSettings/GNI.ini
+++ b/Data/Sys/GameSettings/GNI.ini
@ -13,4 +13,4 @@
 # Add action replay cheats here.

 [Video_Hacks]
-ImmediateXFBEnable = False
+VertexRounding = True
--- a/Data/Sys/GameSettings/RHF.ini
+++ b/Data/Sys/GameSettings/RHF.ini
@ -1,6 +1,9 @@
 # RHFE5D, RHFP5D - Happy Feet

+[Core]
+# Values set here will override the main Dolphin settings.
+# The JIT cache causes problems with emulated icache invalidation in this game resulting in areas failing to load
+DisableICache = True
+
 [Video_Settings]
 SuggestedAspectRatio = 2
-# The JIT cache causes problems with emulated icache invalidation in this game resulting in a crash on starting the game
-DisableICache = True
--- a/Source/Core/Core/PowerPC/MMU.cpp
+++ b/Source/Core/Core/PowerPC/MMU.cpp
@ -938,16 +938,14 @@ bool MMU::IsOptimizableRAMAddress(const u32 address, const u32 access_size) cons
 }

 template <XCheckTLBFlag flag>
-bool MMU::IsRAMAddress(u32 address, bool translate)
+bool MMU::IsEffectiveRAMAddress(u32 address)
 {
-  if (translate)
-  {
-    auto translate_address = TranslateAddress<flag>(address);
-    if (!translate_address.Success())
-      return false;
-    address = translate_address.address;
-  }
+  auto translate_address = TranslateAddress<flag>(address);
+  return translate_address.Success() && IsPhysicalRAMAddress(translate_address.address);
+}

+bool MMU::IsPhysicalRAMAddress(const u32 address) const
+{
  u32 segment = address >> 28;
  if (m_memory.GetRAM() && segment == 0x0 && (address & 0x0FFFFFFF) < m_memory.GetRamSizeReal())
  {
@ -977,13 +975,14 @@ bool MMU::HostIsRAMAddress(const Core::CPUThreadGuard& guard, u32 address,
  switch (space)
  {
  case RequestedAddressSpace::Effective:
-    return mmu.IsRAMAddress<XCheckTLBFlag::NoException>(address, mmu.m_ppc_state.msr.DR);
+    return mmu.m_ppc_state.msr.DR ? mmu.IsEffectiveRAMAddress<XCheckTLBFlag::NoException>(address) :
+                                    mmu.IsPhysicalRAMAddress(address);
  case RequestedAddressSpace::Physical:
-    return mmu.IsRAMAddress<XCheckTLBFlag::NoException>(address, false);
+    return mmu.IsPhysicalRAMAddress(address);
  case RequestedAddressSpace::Virtual:
    if (!mmu.m_ppc_state.msr.DR)
      return false;
-    return mmu.IsRAMAddress<XCheckTLBFlag::NoException>(address, true);
+    return mmu.IsEffectiveRAMAddress<XCheckTLBFlag::NoException>(address);
  }

  ASSERT(false);
@ -1001,13 +1000,15 @@ bool MMU::HostIsInstructionRAMAddress(const Core::CPUThreadGuard& guard, u32 add
  switch (space)
  {
  case RequestedAddressSpace::Effective:
-    return mmu.IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, mmu.m_ppc_state.msr.IR);
+    return mmu.m_ppc_state.msr.IR ?
+               mmu.IsEffectiveRAMAddress<XCheckTLBFlag::OpcodeNoException>(address) :
+               mmu.IsPhysicalRAMAddress(address);
  case RequestedAddressSpace::Physical:
-    return mmu.IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, false);
+    return mmu.IsPhysicalRAMAddress(address);
  case RequestedAddressSpace::Virtual:
    if (!mmu.m_ppc_state.msr.IR)
      return false;
-    return mmu.IsRAMAddress<XCheckTLBFlag::OpcodeNoException>(address, true);
+    return mmu.IsEffectiveRAMAddress<XCheckTLBFlag::OpcodeNoException>(address);
  }

  ASSERT(false);
--- a/Source/Core/Core/PowerPC/MMU.h
+++ b/Source/Core/Core/PowerPC/MMU.h
@ -310,7 +310,8 @@ private:
  template <XCheckTLBFlag flag, bool never_translate = false>
  void WriteToHardware(u32 em_address, const u32 data, const u32 size);
  template <XCheckTLBFlag flag>
-  bool IsRAMAddress(u32 address, bool translate);
+  bool IsEffectiveRAMAddress(u32 address);
+  bool IsPhysicalRAMAddress(u32 address) const;

  template <typename T>
  static std::optional<ReadResult<T>> HostTryReadUX(const Core::CPUThreadGuard& guard,
Author	SHA1	Message	Date
Tygyh	17fd15284c	Merge `c1ff466e16` into `6851ed73f4`	2024-09-19 11:29:52 +02:00
Tilka	6851ed73f4	Merge pull request #13064 from PatrickFerry/gameini_fixing_mistakes GameINI: Fixing Various Mistakes	2024-09-16 23:24:56 +01:00
Patrick Ferry	5dac174972	GameINI: Disable Broken Enhancements for Solvalou The wrong filename was used so the settings weren't being applied. The graphical issues reported were from enhancements that create graphical issues. EFBToTextureEnable solves some graphical issues but those issues appear for only a few frames, the bulk of the game does not benefit while the setting while it is very sore on performance.	2024-09-15 21:49:06 +01:00
Patrick Ferry	8c24b4745a	GameINI: Enable Vertex Rounding for "Teenage Mutant Ninja Turtles 3: Mutant Nightmare" ImmediateXFBEnable was disabled originally when enabling VertexRounding was intended https://bugs.dolphin-emu.org/issues/10186	2024-09-15 21:48:59 +01:00
Patrick Ferry	a51d87bc3d	GameINI: Enable Vertex Rounding for "Teenage Mutant Ninja Turtles 2: Battle Nexus" ImmediateXFBEnable was disabled originally when enabling VertexRounding was intended https://bugs.dolphin-emu.org/issues/10186	2024-09-15 21:48:44 +01:00
Patrick Ferry	a5209738fe	GameINI: Disable ICache for Happy Feet The DisableICache setting is supposed to be for [Core]	2024-09-15 21:48:25 +01:00
Dr. Dystopia	c1ff466e16	Split 'IsRAMAddress' method into 'IsEffectiveRAMAddress' and 'IsPhysicalRAMAddress' methods	2024-08-20 15:31:13 +02:00