diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Branch.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Branch.cpp index 657178befd..4b4e9ab0e6 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Branch.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Branch.cpp @@ -24,7 +24,7 @@ using namespace Gen; void Jit64::sc(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); gpr.Flush(); fpr.Flush(); @@ -37,7 +37,7 @@ void Jit64::sc(UGeckoInstruction inst) void Jit64::rfi(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); gpr.Flush(); fpr.Flush(); @@ -57,7 +57,7 @@ void Jit64::rfi(UGeckoInstruction inst) void Jit64::bx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); // We must always process the following sentence // even if the blocks are merged by PPCAnalyst::Flatten(). @@ -100,7 +100,7 @@ void Jit64::bx(UGeckoInstruction inst) void Jit64::bcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); // USES_CR @@ -153,7 +153,7 @@ void Jit64::bcx(UGeckoInstruction inst) void Jit64::bcctrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); // bcctrx doesn't decrement and/or test CTR _dbg_assert_msg_(POWERPC, inst.BO_2 & BO_DONT_DECREMENT_FLAG, "bcctrx with decrement and test CTR option is invalid!"); @@ -207,7 +207,7 @@ void Jit64::bcctrx(UGeckoInstruction inst) void Jit64::bclrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); FixupBranch pCTRDontBranch; if ((inst.BO & BO_DONT_DECREMENT_FLAG) == 0) // Decrement and test CTR diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp index 3db08e3107..0552a2c751 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp @@ -73,20 +73,11 @@ void Jit64::fp_tri_op(int d, int a, int b, bool reversible, bool single, void (X void Jit64::fp_arith(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); // Only the interpreter has "proper" support for (some) FP flags - if (inst.SUBOP5 == 25 && Core::g_CoreStartupParameter.bEnableFPRF) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(inst.SUBOP5 == 25 && Core::g_CoreStartupParameter.bEnableFPRF); bool single = inst.OPCD == 59; switch (inst.SUBOP5) @@ -103,20 +94,11 @@ void Jit64::fp_arith(UGeckoInstruction inst) void Jit64::fmaddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); // Only the interpreter has "proper" support for (some) FP flags - if (inst.SUBOP5 == 29 && Core::g_CoreStartupParameter.bEnableFPRF) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(inst.SUBOP5 == 29 && Core::g_CoreStartupParameter.bEnableFPRF); bool single_precision = inst.OPCD == 59; @@ -166,13 +148,8 @@ void Jit64::fmaddXX(UGeckoInstruction inst) void Jit64::fsign(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); int d = inst.FD; int b = inst.FB; @@ -200,13 +177,8 @@ void Jit64::fsign(UGeckoInstruction inst) void Jit64::fmrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); int d = inst.FD; int b = inst.FB; @@ -231,13 +203,8 @@ void Jit64::fmrx(UGeckoInstruction inst) void Jit64::fcmpx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (jo.fpAccurateFcmp) - { - FallBackToInterpreter(inst); // turn off from debugger - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(jo.fpAccurateFcmp); //bool ordered = inst.SUBOP10 == 32; int a = inst.FA; @@ -300,5 +267,3 @@ void Jit64::fcmpx(UGeckoInstruction inst) fpr.UnlockAll(); } - - diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp index 06e7aec9b8..389a6368f3 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp @@ -233,7 +233,7 @@ void Jit64::regimmop(int d, int a, bool binary, u32 value, Operation doop, void void Jit64::reg_imm(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 d = inst.RD, a = inst.RA, s = inst.RS; switch (inst.OPCD) { @@ -298,8 +298,7 @@ void Jit64::reg_imm(UGeckoInstruction inst) case 12: regimmop(d, a, false, (u32)(s32)inst.SIMM_16, Add, &XEmitter::ADD, false, true); break; //addic case 13: regimmop(d, a, true, (u32)(s32)inst.SIMM_16, Add, &XEmitter::ADD, true, true); break; //addic_rc default: - FallBackToInterpreter(inst); - break; + FALLBACK_IF(true); } } @@ -307,7 +306,7 @@ void Jit64::cmpXX(UGeckoInstruction inst) { // USES_CR INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int b = inst.RB; int crf = inst.CRFD; @@ -553,7 +552,7 @@ void Jit64::cmpXX(UGeckoInstruction inst) void Jit64::boolX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, s = inst.RS, b = inst.RB; _dbg_assert_msg_(DYNA_REC, inst.OPCD == 31, "Invalid boolX"); @@ -816,7 +815,7 @@ void Jit64::boolX(UGeckoInstruction inst) void Jit64::extsbx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, s = inst.RS; if (gpr.R(s).IsImm()) @@ -844,7 +843,7 @@ void Jit64::extsbx(UGeckoInstruction inst) void Jit64::extshx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, s = inst.RS; if (gpr.R(s).IsImm()) @@ -872,7 +871,7 @@ void Jit64::extshx(UGeckoInstruction inst) void Jit64::subfic(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, d = inst.RD; gpr.Lock(a, d); gpr.BindToRegister(d, a == d, true); @@ -923,7 +922,7 @@ void Jit64::subfic(UGeckoInstruction inst) void Jit64::subfcx(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; gpr.Lock(a, b, d); gpr.BindToRegister(d, (d == a || d == b), true); @@ -955,7 +954,7 @@ void Jit64::subfcx(UGeckoInstruction inst) void Jit64::subfex(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; gpr.Lock(a, b, d); gpr.BindToRegister(d, (d == a || d == b), true); @@ -993,7 +992,7 @@ void Jit64::subfmex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, d = inst.RD; gpr.Lock(a, d); gpr.BindToRegister(d, d == a); @@ -1017,7 +1016,7 @@ void Jit64::subfzex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, d = inst.RD; gpr.Lock(a, d); @@ -1042,7 +1041,7 @@ void Jit64::subfzex(UGeckoInstruction inst) void Jit64::subfx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1092,7 +1091,7 @@ void Jit64::subfx(UGeckoInstruction inst) void Jit64::mulli(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, d = inst.RD; u32 imm = inst.SIMM_16; @@ -1139,7 +1138,7 @@ void Jit64::mulli(UGeckoInstruction inst) void Jit64::mullwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1215,7 +1214,7 @@ void Jit64::mullwx(UGeckoInstruction inst) void Jit64::mulhwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1246,7 +1245,7 @@ void Jit64::mulhwux(UGeckoInstruction inst) void Jit64::divwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1403,7 +1402,7 @@ void Jit64::divwux(UGeckoInstruction inst) void Jit64::divwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1477,7 +1476,7 @@ void Jit64::divwx(UGeckoInstruction inst) void Jit64::addx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if (gpr.R(a).IsImm() && gpr.R(b).IsImm()) @@ -1538,7 +1537,7 @@ void Jit64::addex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if ((d == a) || (d == b)) @@ -1575,7 +1574,7 @@ void Jit64::addex(UGeckoInstruction inst) void Jit64::addcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, d = inst.RD; if ((d == a) || (d == b)) @@ -1612,7 +1611,7 @@ void Jit64::addmex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, d = inst.RD; if (d == a) @@ -1650,7 +1649,7 @@ void Jit64::addzex(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, d = inst.RD; if (d == a) @@ -1687,7 +1686,7 @@ void Jit64::addzex(UGeckoInstruction inst) void Jit64::rlwinmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int s = inst.RS; if (gpr.R(s).IsImm()) @@ -1754,7 +1753,7 @@ void Jit64::rlwinmx(UGeckoInstruction inst) void Jit64::rlwimix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int s = inst.RS; @@ -1840,7 +1839,7 @@ void Jit64::rlwimix(UGeckoInstruction inst) void Jit64::rlwnmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, b = inst.RB, s = inst.RS; u32 mask = Helper_Mask(inst.MB, inst.ME); @@ -1876,7 +1875,7 @@ void Jit64::rlwnmx(UGeckoInstruction inst) void Jit64::negx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int d = inst.RD; @@ -1914,7 +1913,7 @@ void Jit64::negx(UGeckoInstruction inst) void Jit64::srwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int b = inst.RB; int s = inst.RS; @@ -1966,7 +1965,7 @@ void Jit64::srwx(UGeckoInstruction inst) void Jit64::slwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int b = inst.RB; int s = inst.RS; @@ -2032,7 +2031,7 @@ void Jit64::srawx(UGeckoInstruction inst) { // USES_XER INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int b = inst.RB; int s = inst.RS; @@ -2089,7 +2088,7 @@ void Jit64::srawx(UGeckoInstruction inst) void Jit64::srawix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int s = inst.RS; int amount = inst.SH; @@ -2118,8 +2117,7 @@ void Jit64::srawix(UGeckoInstruction inst) else { // FIXME - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); gpr.Lock(a, s); JitClearCA(); @@ -2142,7 +2140,7 @@ void Jit64::srawix(UGeckoInstruction inst) void Jit64::cntlzwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int s = inst.RS; @@ -2178,7 +2176,7 @@ void Jit64::cntlzwx(UGeckoInstruction inst) void Jit64::twx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); s32 a = inst.RA; diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp index 4d5b1bd450..b580cd2205 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp @@ -14,26 +14,14 @@ void Jit64::lXXx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); int a = inst.RA, b = inst.RB, d = inst.RD; // Skip disabled JIT instructions - if (Core::g_CoreStartupParameter.bJITLoadStorelbzxOff && (inst.OPCD == 31) && (inst.SUBOP10 == 87)) - { - FallBackToInterpreter(inst); - return; - } - if (Core::g_CoreStartupParameter.bJITLoadStorelXzOff && ((inst.OPCD == 34) || (inst.OPCD == 40) || (inst.OPCD == 32))) - { - FallBackToInterpreter(inst); - return; - } - if (Core::g_CoreStartupParameter.bJITLoadStorelwzOff && (inst.OPCD == 32)) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(Core::g_CoreStartupParameter.bJITLoadStorelbzxOff && (inst.OPCD == 31) && (inst.SUBOP10 == 87)); + FALLBACK_IF(Core::g_CoreStartupParameter.bJITLoadStorelXzOff && ((inst.OPCD == 34) || (inst.OPCD == 40) || (inst.OPCD == 32))); + FALLBACK_IF(Core::g_CoreStartupParameter.bJITLoadStorelwzOff && (inst.OPCD == 32)); // Determine memory access size and sign extend int accessSize = 0; @@ -226,28 +214,23 @@ void Jit64::lXXx(UGeckoInstruction inst) void Jit64::dcbst(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); // If the dcbst instruction is preceded by dcbt, it is flushing a prefetched // memory location. Do not invalidate the JIT cache in this case as the memory // will be the same. // dcbt = 0x7c00022c - if ((Memory::ReadUnchecked_U32(js.compilerPC - 4) & 0x7c00022c) != 0x7c00022c) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF((Memory::ReadUnchecked_U32(js.compilerPC - 4) & 0x7c00022c) != 0x7c00022c); } // Zero cache line. void Jit64::dcbz(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); // FIXME - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); MOV(32, R(EAX), gpr.R(inst.RB)); if (inst.RA) @@ -261,7 +244,7 @@ void Jit64::dcbz(UGeckoInstruction inst) void Jit64::stX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); int s = inst.RS; int a = inst.RA; @@ -391,14 +374,11 @@ void Jit64::stX(UGeckoInstruction inst) void Jit64::stXx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); int a = inst.RA, b = inst.RB, s = inst.RS; - if (!a || a == s || a == b) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(!a || a == s || a == b); + gpr.Lock(a, b, s); gpr.FlushLockX(ECX, EDX); @@ -433,7 +413,7 @@ void Jit64::stXx(UGeckoInstruction inst) void Jit64::lmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); gpr.FlushLockX(ECX); MOV(32, R(EAX), Imm32((u32)(s32)inst.SIMM_16)); @@ -451,7 +431,7 @@ void Jit64::lmw(UGeckoInstruction inst) void Jit64::stmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); gpr.FlushLockX(ECX); MOV(32, R(EAX), Imm32((u32)(s32)inst.SIMM_16)); diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp index 88eeacc30b..57f3b6a2e5 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp @@ -30,15 +30,11 @@ u64 GC_ALIGNED16(temp64); void Jit64::lfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) + JITDISABLE(bJITLoadStoreFloatingOff); int d = inst.RD; int a = inst.RA; - if (!a) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(!a); s32 offset = (s32)(s16)inst.SIMM_16; @@ -59,21 +55,11 @@ void Jit64::lfs(UGeckoInstruction inst) void Jit64::lfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck || !inst.RA); int d = inst.RD; int a = inst.RA; - if (!a) - { - FallBackToInterpreter(inst); - return; - } s32 offset = (s32)(s16)inst.SIMM_16; gpr.FlushLockX(ABI_PARAM1); @@ -132,21 +118,11 @@ void Jit64::lfd(UGeckoInstruction inst) void Jit64::stfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck || !inst.RA); int s = inst.RS; int a = inst.RA; - if (!a) - { - FallBackToInterpreter(inst); - return; - } u32 mem_mask = Memory::ADDR_MASK_HW_ACCESS; if (Core::g_CoreStartupParameter.bMMU || @@ -221,18 +197,14 @@ void Jit64::stfd(UGeckoInstruction inst) void Jit64::stfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) + JITDISABLE(bJITLoadStoreFloatingOff); bool update = inst.OPCD & 1; int s = inst.RS; int a = inst.RA; s32 offset = (s32)(s16)inst.SIMM_16; - if (!a || update) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(!a || update); fpr.BindToRegister(s, true, false); ConvertDoubleToSingle(XMM0, fpr.RX(s)); @@ -284,7 +256,7 @@ void Jit64::stfs(UGeckoInstruction inst) void Jit64::stfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) + JITDISABLE(bJITLoadStoreFloatingOff); // We can take a shortcut here - it's not likely that a hardware access would use this instruction. gpr.FlushLockX(ABI_PARAM1); @@ -307,7 +279,7 @@ void Jit64::stfsx(UGeckoInstruction inst) void Jit64::lfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) + JITDISABLE(bJITLoadStoreFloatingOff); MOV(32, R(EAX), gpr.R(inst.RB)); if (inst.RA) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp index 9194220285..13623ec7e2 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp @@ -17,20 +17,8 @@ void Jit64::psq_st(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } - - if (!inst.RA) - { - // TODO: Support these cases if it becomes necessary. - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStorePairedOff); + FALLBACK_IF(js.memcheck || !inst.RA); bool update = inst.OPCD == 61; @@ -73,19 +61,8 @@ void Jit64::psq_st(UGeckoInstruction inst) void Jit64::psq_l(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } - - if (!inst.RA) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStorePairedOff); + FALLBACK_IF(js.memcheck || !inst.RA); bool update = inst.OPCD == 57; int offset = inst.SIMM_12; diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Paired.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Paired.cpp index 88ecdbf7a9..5d6df2496f 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_Paired.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_Paired.cpp @@ -20,13 +20,8 @@ static const u64 GC_ALIGNED16(psAbsMask[2]) = {0x7FFFFFFFFFFFFFFFULL, 0x7FFFFFF void Jit64::ps_mr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); int d = inst.FD; int b = inst.FB; @@ -43,13 +38,8 @@ void Jit64::ps_sel(UGeckoInstruction inst) // but we need -0 = +0 INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); int d = inst.FD; int a = inst.FA; @@ -73,13 +63,8 @@ void Jit64::ps_sel(UGeckoInstruction inst) void Jit64::ps_sign(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); int d = inst.FD; int b = inst.FB; @@ -164,13 +149,8 @@ void Jit64::tri_op(int d, int a, int b, bool reversible, void (XEmitter::*op)(X6 void Jit64::ps_arith(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); switch (inst.SUBOP5) { @@ -186,14 +166,10 @@ void Jit64::ps_arith(UGeckoInstruction inst) void Jit64::ps_sum(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); // TODO: (inst.SUBOP5 == 10) breaks Sonic Colours (black screen) - if (inst.Rc || (inst.SUBOP5 == 10)) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(inst.Rc || (inst.SUBOP5 == 10)); int d = inst.FD; int a = inst.FA; @@ -232,13 +208,8 @@ void Jit64::ps_sum(UGeckoInstruction inst) void Jit64::ps_muls(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); int d = inst.FD; int a = inst.FA; @@ -275,13 +246,8 @@ void Jit64::ps_muls(UGeckoInstruction inst) void Jit64::ps_mergeXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); int d = inst.FD; int a = inst.FA; @@ -316,13 +282,8 @@ void Jit64::ps_mergeXX(UGeckoInstruction inst) void Jit64::ps_maddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); int a = inst.FA; int b = inst.FB; diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp index 0f5a23a1da..977e298dd2 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp @@ -13,7 +13,7 @@ void Jit64::mtspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); int d = inst.RD; @@ -49,8 +49,7 @@ void Jit64::mtspr(UGeckoInstruction inst) break; default: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); } // OK, this is easy. @@ -66,7 +65,7 @@ void Jit64::mtspr(UGeckoInstruction inst) void Jit64::mfspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); int d = inst.RD; switch (iIndex) @@ -79,8 +78,7 @@ void Jit64::mfspr(UGeckoInstruction inst) case SPR_PMC2: case SPR_PMC3: case SPR_PMC4: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); default: gpr.Lock(d); gpr.BindToRegister(d, false); @@ -94,7 +92,7 @@ void Jit64::mtmsr(UGeckoInstruction inst) { INSTRUCTION_START // Don't interpret this, if we do we get thrown out - //JITDISABLE(bJITSystemRegistersOff) + //JITDISABLE(bJITSystemRegistersOff); if (!gpr.R(inst.RS).IsImm()) { gpr.Lock(inst.RS); @@ -133,7 +131,7 @@ void Jit64::mtmsr(UGeckoInstruction inst) void Jit64::mfmsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); //Privileged? gpr.Lock(inst.RD); gpr.BindToRegister(inst.RD, false, true); @@ -144,14 +142,14 @@ void Jit64::mfmsr(UGeckoInstruction inst) void Jit64::mftb(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); mfspr(inst); } void Jit64::mfcr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); // USES_CR int d = inst.RD; gpr.Lock(d); @@ -171,7 +169,7 @@ void Jit64::mfcr(UGeckoInstruction inst) void Jit64::mtcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); // USES_CR u32 crm = inst.CRM; @@ -210,7 +208,7 @@ void Jit64::mtcrf(UGeckoInstruction inst) void Jit64::mcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); // USES_CR if (inst.CRFS != inst.CRFD) @@ -223,7 +221,7 @@ void Jit64::mcrf(UGeckoInstruction inst) void Jit64::mcrxr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); // USES_CR @@ -239,7 +237,7 @@ void Jit64::mcrxr(UGeckoInstruction inst) void Jit64::crXXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); _dbg_assert_msg_(DYNA_REC, inst.OPCD == 19, "Invalid crXXX"); // USES_CR diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_Branch.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_Branch.cpp index 44506490a5..de76f030f6 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_Branch.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_Branch.cpp @@ -29,7 +29,7 @@ using namespace ArmGen; void JitArm::sc(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); gpr.Flush(); fpr.Flush(); @@ -48,7 +48,7 @@ void JitArm::sc(UGeckoInstruction inst) void JitArm::rfi(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); gpr.Flush(); fpr.Flush(); @@ -95,7 +95,7 @@ void JitArm::rfi(UGeckoInstruction inst) void JitArm::bx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); // We must always process the following sentence // even if the blocks are merged by PPCAnalyst::Flatten(). if (inst.LK) @@ -146,7 +146,7 @@ void JitArm::bx(UGeckoInstruction inst) void JitArm::bcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); // USES_CR ARMReg rA = gpr.GetReg(); @@ -211,7 +211,7 @@ void JitArm::bcx(UGeckoInstruction inst) void JitArm::bcctrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); // bcctrx doesn't decrement and/or test CTR _dbg_assert_msg_(POWERPC, inst.BO_2 & BO_DONT_DECREMENT_FLAG, "bcctrx with decrement and test CTR option is invalid!"); @@ -283,7 +283,7 @@ void JitArm::bcctrx(UGeckoInstruction inst) void JitArm::bclrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITBranchOff) + JITDISABLE(bJITBranchOff); ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_FloatingPoint.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_FloatingPoint.cpp index acacfc2c1f..6bd36cff2c 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_FloatingPoint.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_FloatingPoint.cpp @@ -26,7 +26,7 @@ void JitArm::Helper_UpdateCR1(ARMReg fpscr, ARMReg temp) void JitArm::fctiwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 b = inst.FB; u32 d = inst.FD; @@ -133,7 +133,7 @@ void JitArm::fctiwx(UGeckoInstruction inst) void JitArm::fctiwzx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 b = inst.FB; u32 d = inst.FD; @@ -213,7 +213,7 @@ void JitArm::fctiwzx(UGeckoInstruction inst) void JitArm::fcmpo(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 a = inst.FA, b = inst.FB; int cr = inst.CRFD; @@ -282,7 +282,7 @@ void JitArm::fcmpo(UGeckoInstruction inst) void JitArm::fcmpu(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 a = inst.FA, b = inst.FB; int cr = inst.CRFD; @@ -343,13 +343,8 @@ void JitArm::fcmpu(UGeckoInstruction inst) void JitArm::fabsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vB = fpr.R0(inst.FB); ARMReg vD = fpr.R0(inst.FD, false); @@ -360,13 +355,8 @@ void JitArm::fabsx(UGeckoInstruction inst) void JitArm::fnabsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vB = fpr.R0(inst.FB); ARMReg vD = fpr.R0(inst.FD, false); @@ -378,13 +368,8 @@ void JitArm::fnabsx(UGeckoInstruction inst) void JitArm::fnegx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vB = fpr.R0(inst.FB); ARMReg vD = fpr.R0(inst.FD, false); @@ -395,13 +380,8 @@ void JitArm::fnegx(UGeckoInstruction inst) void JitArm::faddsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vA = fpr.R0(inst.FA); ARMReg vB = fpr.R0(inst.FB); @@ -415,13 +395,8 @@ void JitArm::faddsx(UGeckoInstruction inst) void JitArm::faddx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vA = fpr.R0(inst.FA); ARMReg vB = fpr.R0(inst.FB); @@ -433,13 +408,8 @@ void JitArm::faddx(UGeckoInstruction inst) void JitArm::fsubsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vA = fpr.R0(inst.FA); ARMReg vB = fpr.R0(inst.FB); @@ -453,13 +423,8 @@ void JitArm::fsubsx(UGeckoInstruction inst) void JitArm::fsubx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vA = fpr.R0(inst.FA); ARMReg vB = fpr.R0(inst.FB); @@ -471,13 +436,8 @@ void JitArm::fsubx(UGeckoInstruction inst) void JitArm::fmulsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vA = fpr.R0(inst.FA); ARMReg vC = fpr.R0(inst.FC); @@ -490,13 +450,8 @@ void JitArm::fmulsx(UGeckoInstruction inst) void JitArm::fmulx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vA = fpr.R0(inst.FA); ARMReg vC = fpr.R0(inst.FC); @@ -507,13 +462,8 @@ void JitArm::fmulx(UGeckoInstruction inst) void JitArm::fmrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); ARMReg vB = fpr.R0(inst.FB); ARMReg vD = fpr.R0(inst.FD, false); @@ -524,13 +474,8 @@ void JitArm::fmrx(UGeckoInstruction inst) void JitArm::fmaddsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; @@ -555,13 +500,8 @@ void JitArm::fmaddsx(UGeckoInstruction inst) void JitArm::fmaddx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; @@ -584,16 +524,11 @@ void JitArm::fmaddx(UGeckoInstruction inst) void JitArm::fnmaddx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vB0 = fpr.R0(b); ARMReg vC0 = fpr.R0(c); @@ -612,16 +547,11 @@ void JitArm::fnmaddx(UGeckoInstruction inst) void JitArm::fnmaddsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vB0 = fpr.R0(b); ARMReg vC0 = fpr.R0(c); @@ -644,19 +574,14 @@ void JitArm::fnmaddsx(UGeckoInstruction inst) void JitArm::fresx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); + + // FIXME + FALLBACK_IF(true); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - - FallBackToInterpreter(inst); - return; - ARMReg vB0 = fpr.R0(b); ARMReg vD0 = fpr.R0(d, false); ARMReg vD1 = fpr.R1(d, false); @@ -672,16 +597,11 @@ void JitArm::fresx(UGeckoInstruction inst) void JitArm::fselx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vB0 = fpr.R0(b); ARMReg vC0 = fpr.R0(c); @@ -701,16 +621,11 @@ void JitArm::fselx(UGeckoInstruction inst) void JitArm::frsqrtex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vB0 = fpr.R0(b); ARMReg vD0 = fpr.R0(d, false); ARMReg fpscrReg = gpr.GetReg(); diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp index aaf3016a3e..2708cd8ee1 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_Integer.cpp @@ -108,7 +108,7 @@ void JitArm::FinalizeCarry(ARMReg reg) void JitArm::subfic(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA, d = inst.RD; @@ -189,7 +189,7 @@ u32 Xor(u32 a, u32 b) {return a ^ b;} void JitArm::arith(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 a = inst.RA, b = inst.RB, d = inst.RD, s = inst.RS; ARMReg RA, RB, RD, RS; @@ -329,8 +329,7 @@ void JitArm::arith(UGeckoInstruction inst) break; default: WARN_LOG(DYNA_REC, "Unknown OPCD %d with arith function", inst.OPCD); - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); break; } if (isImm[0] && isImm[1]) // Immediate propagation @@ -614,12 +613,11 @@ void JitArm::arith(UGeckoInstruction inst) void JitArm::addex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 a = inst.RA, b = inst.RB, d = inst.RD; // FIXME - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); ARMReg RA = gpr.R(a); ARMReg RB = gpr.R(b); @@ -635,7 +633,7 @@ void JitArm::addex(UGeckoInstruction inst) void JitArm::cntlzwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 a = inst.RA, s = inst.RS; ARMReg RA = gpr.R(a); @@ -651,7 +649,7 @@ void JitArm::cntlzwx(UGeckoInstruction inst) void JitArm::mulhwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 a = inst.RA, b = inst.RB, d = inst.RD; @@ -666,7 +664,7 @@ void JitArm::mulhwux(UGeckoInstruction inst) void JitArm::extshx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 a = inst.RA, s = inst.RS; if (gpr.IsImm(s)) @@ -686,7 +684,7 @@ void JitArm::extshx(UGeckoInstruction inst) void JitArm::extsbx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 a = inst.RA, s = inst.RS; if (gpr.IsImm(s)) @@ -706,7 +704,7 @@ void JitArm::extsbx(UGeckoInstruction inst) void JitArm::cmp (UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int crf = inst.CRFD; u32 a = inst.RA, b = inst.RB; @@ -726,7 +724,7 @@ void JitArm::cmp (UGeckoInstruction inst) void JitArm::cmpi(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 a = inst.RA; int crf = inst.CRFD; if (gpr.IsImm(a)) @@ -749,7 +747,7 @@ void JitArm::cmpi(UGeckoInstruction inst) void JitArm::cmpl(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); ARMReg RA = gpr.R(inst.RA); ARMReg RB = gpr.R(inst.RB); @@ -771,7 +769,7 @@ void JitArm::cmpl(UGeckoInstruction inst) void JitArm::cmpli(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); ARMReg RA = gpr.R(inst.RA); ARMReg rA = gpr.GetReg(); @@ -800,7 +798,7 @@ void JitArm::cmpli(UGeckoInstruction inst) void JitArm::negx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); ARMReg RA = gpr.R(inst.RA); ARMReg RD = gpr.R(inst.RD); @@ -819,7 +817,7 @@ void JitArm::negx(UGeckoInstruction inst) void JitArm::rlwimix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 mask = Helper_Mask(inst.MB,inst.ME); ARMReg RA = gpr.R(inst.RA); @@ -848,7 +846,7 @@ void JitArm::rlwimix(UGeckoInstruction inst) void JitArm::rlwinmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 mask = Helper_Mask(inst.MB,inst.ME); ARMReg RA = gpr.R(inst.RA); @@ -871,7 +869,7 @@ void JitArm::rlwinmx(UGeckoInstruction inst) void JitArm::rlwnmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); u32 mask = Helper_Mask(inst.MB,inst.ME); ARMReg RA = gpr.R(inst.RA); @@ -899,7 +897,7 @@ void JitArm::rlwnmx(UGeckoInstruction inst) void JitArm::srawix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int a = inst.RA; int s = inst.RS; int amount = inst.SH; @@ -945,7 +943,7 @@ void JitArm::srawix(UGeckoInstruction inst) void JitArm::twx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); s32 a = inst.RA; diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStore.cpp index e48126f383..1e95d372dc 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStore.cpp @@ -127,7 +127,7 @@ void JitArm::SafeStoreFromReg(bool fastmem, s32 dest, u32 value, s32 regOffset, void JitArm::stX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); u32 a = inst.RA, b = inst.RB, s = inst.RS; s32 offset = inst.SIMM_16; @@ -331,7 +331,7 @@ void JitArm::SafeLoadToReg(bool fastmem, u32 dest, s32 addr, s32 offsetReg, int void JitArm::lXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); u32 a = inst.RA, b = inst.RB, d = inst.RD; s32 offset = inst.SIMM_16; @@ -475,13 +475,8 @@ void JitArm::lXX(UGeckoInstruction inst) void JitArm::lmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (!Core::g_CoreStartupParameter.bFastmem) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(!Core::g_CoreStartupParameter.bFastmem); u32 a = inst.RA; ARMReg rA = gpr.GetReg(); @@ -506,13 +501,8 @@ void JitArm::lmw(UGeckoInstruction inst) void JitArm::stmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (!Core::g_CoreStartupParameter.bFastmem) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(!Core::g_CoreStartupParameter.bFastmem); u32 a = inst.RA; ARMReg rA = gpr.GetReg(); @@ -538,17 +528,13 @@ void JitArm::stmw(UGeckoInstruction inst) void JitArm::dcbst(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); // If the dcbst instruction is preceded by dcbt, it is flushing a prefetched // memory location. Do not invalidate the JIT cache in this case as the memory // will be the same. // dcbt = 0x7c00022c - if ((Memory::ReadUnchecked_U32(js.compilerPC - 4) & 0x7c00022c) != 0x7c00022c) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF((Memory::ReadUnchecked_U32(js.compilerPC - 4) & 0x7c00022c) != 0x7c00022c); } void JitArm::icbi(UGeckoInstruction inst) diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp index 3a78c45b29..8d14362688 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp @@ -20,7 +20,7 @@ void JitArm::lfXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) + JITDISABLE(bJITLoadStoreFloatingOff); ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); @@ -182,7 +182,7 @@ void JitArm::lfXX(UGeckoInstruction inst) void JitArm::stfXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) + JITDISABLE(bJITLoadStoreFloatingOff); ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); @@ -347,7 +347,7 @@ void JitArm::stfXX(UGeckoInstruction inst) void JitArm::stfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) + JITDISABLE(bJITLoadStoreFloatingOff); ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStorePaired.cpp index 56b718aafe..754b97b19a 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_LoadStorePaired.cpp @@ -17,19 +17,15 @@ void JitArm::psq_l(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) - - bool update = inst.OPCD == 57; - s32 offset = inst.SIMM_12; + JITDISABLE(bJITLoadStorePairedOff); // R12 contains scale // R11 contains type // R10 is the ADDR - if (js.memcheck || !Core::g_CoreStartupParameter.bFastmem) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(js.memcheck || !Core::g_CoreStartupParameter.bFastmem); + + bool update = inst.OPCD == 57; + s32 offset = inst.SIMM_12; LDR(R11, R9, PPCSTATE_OFF(spr[SPR_GQR0 + inst.I])); UBFX(R12, R11, 16, 3); // Type @@ -61,17 +57,14 @@ void JitArm::psq_l(UGeckoInstruction inst) void JitArm::psq_lx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) + JITDISABLE(bJITLoadStorePairedOff); - bool update = inst.SUBOP10 == 38; // R12 contains scale // R11 contains type // R10 is the ADDR - if (js.memcheck || !Core::g_CoreStartupParameter.bFastmem) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(js.memcheck || !Core::g_CoreStartupParameter.bFastmem); + + bool update = inst.SUBOP10 == 38; LDR(R11, R9, PPCSTATE_OFF(spr[SPR_GQR0 + inst.Ix])); UBFX(R12, R11, 16, 3); // Type @@ -113,19 +106,15 @@ void JitArm::psq_lx(UGeckoInstruction inst) void JitArm::psq_st(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) - - bool update = inst.OPCD == 61; - s32 offset = inst.SIMM_12; + JITDISABLE(bJITLoadStorePairedOff); // R12 contains scale // R11 contains type // R10 is the ADDR - if (js.memcheck || !Core::g_CoreStartupParameter.bFastmem) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(js.memcheck || !Core::g_CoreStartupParameter.bFastmem); + + bool update = inst.OPCD == 61; + s32 offset = inst.SIMM_12; LDR(R11, R9, PPCSTATE_OFF(spr[SPR_GQR0 + inst.I])); UBFX(R12, R11, 0, 3); // Type @@ -162,18 +151,14 @@ void JitArm::psq_st(UGeckoInstruction inst) void JitArm::psq_stx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) - - bool update = inst.SUBOP10 == 39; + JITDISABLE(bJITLoadStorePairedOff); // R12 contains scale // R11 contains type // R10 is the ADDR - if (js.memcheck || !Core::g_CoreStartupParameter.bFastmem) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(js.memcheck || !Core::g_CoreStartupParameter.bFastmem); + + bool update = inst.SUBOP10 == 39; LDR(R11, R9, PPCSTATE_OFF(spr[SPR_GQR0 + inst.I])); UBFX(R12, R11, 0, 3); // Type diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_Paired.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_Paired.cpp index 00557343e0..4584058206 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_Paired.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_Paired.cpp @@ -18,16 +18,11 @@ void JitArm::ps_rsqrte(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vB0 = fpr.R0(b); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -84,16 +79,11 @@ void JitArm::ps_rsqrte(UGeckoInstruction inst) void JitArm::ps_sel(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -126,16 +116,11 @@ void JitArm::ps_sel(UGeckoInstruction inst) void JitArm::ps_add(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -150,16 +135,11 @@ void JitArm::ps_add(UGeckoInstruction inst) void JitArm::ps_div(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -174,16 +154,11 @@ void JitArm::ps_div(UGeckoInstruction inst) void JitArm::ps_res(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vB0 = fpr.R0(b); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -199,16 +174,11 @@ void JitArm::ps_res(UGeckoInstruction inst) void JitArm::ps_nmadd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -235,16 +205,11 @@ void JitArm::ps_nmadd(UGeckoInstruction inst) void JitArm::ps_madd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -269,16 +234,11 @@ void JitArm::ps_madd(UGeckoInstruction inst) void JitArm::ps_nmsub(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -305,16 +265,11 @@ void JitArm::ps_nmsub(UGeckoInstruction inst) void JitArm::ps_msub(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -339,16 +294,11 @@ void JitArm::ps_msub(UGeckoInstruction inst) void JitArm::ps_madds0(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -373,16 +323,11 @@ void JitArm::ps_madds0(UGeckoInstruction inst) void JitArm::ps_madds1(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -405,16 +350,11 @@ void JitArm::ps_madds1(UGeckoInstruction inst) void JitArm::ps_sum0(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vB1 = fpr.R1(b); ARMReg vC1 = fpr.R1(c); @@ -429,16 +369,11 @@ void JitArm::ps_sum0(UGeckoInstruction inst) void JitArm::ps_sum1(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vB1 = fpr.R1(b); ARMReg vC0 = fpr.R0(c); @@ -453,16 +388,11 @@ void JitArm::ps_sum1(UGeckoInstruction inst) void JitArm::ps_sub(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); @@ -477,16 +407,11 @@ void JitArm::ps_sub(UGeckoInstruction inst) void JitArm::ps_mul(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vC0 = fpr.R0(c); @@ -501,16 +426,11 @@ void JitArm::ps_mul(UGeckoInstruction inst) void JitArm::ps_muls0(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vC0 = fpr.R0(c); @@ -532,16 +452,11 @@ void JitArm::ps_muls0(UGeckoInstruction inst) void JitArm::ps_muls1(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, c = inst.FC, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vA1 = fpr.R1(a); ARMReg vC1 = fpr.R1(c); @@ -563,16 +478,11 @@ void JitArm::ps_muls1(UGeckoInstruction inst) void JitArm::ps_merge00(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vB0 = fpr.R0(b); ARMReg vD0 = fpr.R0(d, false); @@ -585,16 +495,11 @@ void JitArm::ps_merge00(UGeckoInstruction inst) void JitArm::ps_merge01(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA0 = fpr.R0(a); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -606,16 +511,11 @@ void JitArm::ps_merge01(UGeckoInstruction inst) void JitArm::ps_merge10(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA1 = fpr.R1(a); ARMReg vB0 = fpr.R0(b); ARMReg vD0 = fpr.R0(d, false); @@ -632,16 +532,11 @@ void JitArm::ps_merge10(UGeckoInstruction inst) void JitArm::ps_merge11(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 a = inst.FA, b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vA1 = fpr.R1(a); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -653,16 +548,11 @@ void JitArm::ps_merge11(UGeckoInstruction inst) void JitArm::ps_mr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vB0 = fpr.R0(b); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -674,16 +564,11 @@ void JitArm::ps_mr(UGeckoInstruction inst) void JitArm::ps_neg(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vB0 = fpr.R0(b); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -695,16 +580,11 @@ void JitArm::ps_neg(UGeckoInstruction inst) void JitArm::ps_abs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vB0 = fpr.R0(b); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -716,16 +596,11 @@ void JitArm::ps_abs(UGeckoInstruction inst) void JitArm::ps_nabs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); u32 b = inst.FB, d = inst.FD; - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } - ARMReg vB0 = fpr.R0(b); ARMReg vB1 = fpr.R1(b); ARMReg vD0 = fpr.R0(d, false); @@ -739,7 +614,7 @@ void JitArm::ps_nabs(UGeckoInstruction inst) void JitArm::ps_cmpu0(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 a = inst.FA, b = inst.FB; int cr = inst.CRFD; @@ -800,7 +675,7 @@ void JitArm::ps_cmpu0(UGeckoInstruction inst) void JitArm::ps_cmpu1(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 a = inst.FA, b = inst.FB; int cr = inst.CRFD; @@ -861,7 +736,7 @@ void JitArm::ps_cmpu1(UGeckoInstruction inst) void JitArm::ps_cmpo0(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 a = inst.FA, b = inst.FB; int cr = inst.CRFD; @@ -930,7 +805,7 @@ void JitArm::ps_cmpo0(UGeckoInstruction inst) void JitArm::ps_cmpo1(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); u32 a = inst.FA, b = inst.FB; int cr = inst.CRFD; diff --git a/Source/Core/Core/PowerPC/JitArm32/JitArm_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitArm32/JitArm_SystemRegisters.cpp index bcf3485cc6..ff129f9674 100644 --- a/Source/Core/Core/PowerPC/JitArm32/JitArm_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/JitArm32/JitArm_SystemRegisters.cpp @@ -17,7 +17,7 @@ void JitArm::mtspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); @@ -51,8 +51,7 @@ void JitArm::mtspr(UGeckoInstruction inst) break; default: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); } // OK, this is easy. @@ -62,13 +61,13 @@ void JitArm::mtspr(UGeckoInstruction inst) void JitArm::mftb(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); mfspr(inst); } void JitArm::mfspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); switch (iIndex) @@ -77,8 +76,7 @@ void JitArm::mfspr(UGeckoInstruction inst) case SPR_DEC: case SPR_TL: case SPR_TU: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); default: ARMReg RD = gpr.R(inst.RD); LDR(RD, R9, PPCSTATE_OFF(spr) + iIndex * 4); @@ -89,7 +87,7 @@ void JitArm::mfspr(UGeckoInstruction inst) void JitArm::mfcr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); // USES_CR ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); @@ -109,7 +107,7 @@ void JitArm::mfcr(UGeckoInstruction inst) void JitArm::mtcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); ARMReg rA = gpr.GetReg(); @@ -150,7 +148,7 @@ void JitArm::mtcrf(UGeckoInstruction inst) void JitArm::mtsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); STR(gpr.R(inst.RS), R9, PPCSTATE_OFF(sr[inst.SR])); } @@ -158,14 +156,14 @@ void JitArm::mtsr(UGeckoInstruction inst) void JitArm::mfsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); LDR(gpr.R(inst.RD), R9, PPCSTATE_OFF(sr[inst.SR])); } void JitArm::mcrxr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); @@ -186,7 +184,7 @@ void JitArm::mtmsr(UGeckoInstruction inst) { INSTRUCTION_START // Don't interpret this, if we do we get thrown out - //JITDISABLE(bJITSystemRegistersOff) + //JITDISABLE(bJITSystemRegistersOff); STR(gpr.R(inst.RS), R9, PPCSTATE_OFF(msr)); @@ -199,7 +197,7 @@ void JitArm::mtmsr(UGeckoInstruction inst) void JitArm::mfmsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); LDR(gpr.R(inst.RD), R9, PPCSTATE_OFF(msr)); } @@ -207,7 +205,7 @@ void JitArm::mfmsr(UGeckoInstruction inst) void JitArm::mcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); ARMReg rA = gpr.GetReg(); if (inst.CRFS != inst.CRFD) @@ -221,7 +219,7 @@ void JitArm::mcrf(UGeckoInstruction inst) void JitArm::crXXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); ARMReg rA = gpr.GetReg(); ARMReg rB = gpr.GetReg(); diff --git a/Source/Core/Core/PowerPC/JitCommon/JitBase.h b/Source/Core/Core/PowerPC/JitCommon/JitBase.h index 7806bd5c81..fa842679e7 100644 --- a/Source/Core/Core/PowerPC/JitCommon/JitBase.h +++ b/Source/Core/Core/PowerPC/JitCommon/JitBase.h @@ -32,10 +32,10 @@ // #define INSTRUCTION_START PPCTables::CountInstruction(inst); #define INSTRUCTION_START -#define JITDISABLE(setting) \ - if (Core::g_CoreStartupParameter.bJITOff || \ - Core::g_CoreStartupParameter.setting) \ - { FallBackToInterpreter(inst); return; } +#define FALLBACK_IF(cond) do { if (cond) { FallBackToInterpreter(inst); return; } } while (0) + +#define JITDISABLE(setting) FALLBACK_IF(Core::g_CoreStartupParameter.bJITOff || \ + Core::g_CoreStartupParameter.setting) class JitBase : public CPUCoreBase { diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp index ec3d01e663..3184fbc16f 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_FloatingPoint.cpp @@ -8,19 +8,11 @@ void JitILBase::fp_arith_s(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - if (inst.Rc || (inst.SUBOP5 != 25 && inst.SUBOP5 != 20 && inst.SUBOP5 != 21)) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc || (inst.SUBOP5 != 25 && inst.SUBOP5 != 20 && inst.SUBOP5 != 21)); // Only the interpreter has "proper" support for (some) FP flags - if (inst.SUBOP5 == 25 && Core::g_CoreStartupParameter.bEnableFPRF) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(inst.SUBOP5 == 25 && Core::g_CoreStartupParameter.bEnableFPRF); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FA); switch (inst.SUBOP5) @@ -50,19 +42,11 @@ void JitILBase::fp_arith_s(UGeckoInstruction inst) void JitILBase::fmaddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); // Only the interpreter has "proper" support for (some) FP flags - if (inst.SUBOP5 == 29 && Core::g_CoreStartupParameter.bEnableFPRF) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF(inst.SUBOP5 == 29 && Core::g_CoreStartupParameter.bEnableFPRF); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FA); val = ibuild.EmitFDMul(val, ibuild.EmitLoadFReg(inst.FC)); @@ -84,13 +68,8 @@ void JitILBase::fmaddXX(UGeckoInstruction inst) void JitILBase::fmrx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITFloatingPointOff); + FALLBACK_IF(inst.Rc); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FB); val = ibuild.EmitInsertDoubleInMReg(val, ibuild.EmitLoadFReg(inst.FD)); @@ -100,7 +79,7 @@ void JitILBase::fmrx(UGeckoInstruction inst) void JitILBase::fcmpx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); IREmitter::InstLoc lhs, rhs, res; lhs = ibuild.EmitLoadFReg(inst.FA); rhs = ibuild.EmitLoadFReg(inst.FB); @@ -113,10 +92,9 @@ void JitILBase::fcmpx(UGeckoInstruction inst) void JitILBase::fsign(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITFloatingPointOff) + JITDISABLE(bJITFloatingPointOff); - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); // TODO switch (inst.SUBOP10) { diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Integer.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Integer.cpp index cf8bad0fce..e7b96a6850 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Integer.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Integer.cpp @@ -18,7 +18,7 @@ static void ComputeRC(IREmitter::IRBuilder& ibuild, IREmitter::InstLoc val) void JitILBase::reg_imm(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); int d = inst.RD, a = inst.RA, s = inst.RS; IREmitter::InstLoc val, test, c; switch (inst.OPCD) @@ -78,15 +78,14 @@ void JitILBase::reg_imm(UGeckoInstruction inst) ComputeRC(ibuild, val); break; default: - FallBackToInterpreter(inst); - break; + FALLBACK_IF(true); } } void JitILBase::cmpXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc lhs, rhs, res; lhs = ibuild.EmitLoadGReg(inst.RA); @@ -121,7 +120,7 @@ void JitILBase::cmpXX(UGeckoInstruction inst) void JitILBase::boolX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc a = nullptr; IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS); @@ -174,7 +173,7 @@ void JitILBase::boolX(UGeckoInstruction inst) void JitILBase::extsbx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitSExt8(val); ibuild.EmitStoreGReg(val, inst.RA); @@ -185,7 +184,7 @@ void JitILBase::extsbx(UGeckoInstruction inst) void JitILBase::extshx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitSExt16(val); ibuild.EmitStoreGReg(val, inst.RA); @@ -196,7 +195,7 @@ void JitILBase::extshx(UGeckoInstruction inst) void JitILBase::subfic(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc nota, lhs, val, test; nota = ibuild.EmitXor(ibuild.EmitLoadGReg(inst.RA), ibuild.EmitIntConst(-1)); @@ -220,7 +219,7 @@ void JitILBase::subfic(UGeckoInstruction inst) void JitILBase::subfcx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); if (inst.OE) PanicAlert("OE: subfcx"); IREmitter::InstLoc val, test, lhs, rhs; lhs = ibuild.EmitLoadGReg(inst.RB); @@ -237,7 +236,7 @@ void JitILBase::subfcx(UGeckoInstruction inst) void JitILBase::subfex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); if (inst.OE) PanicAlert("OE: subfex"); IREmitter::InstLoc val, test, lhs, rhs, carry; rhs = ibuild.EmitLoadGReg(inst.RA); @@ -258,7 +257,7 @@ void JitILBase::subfex(UGeckoInstruction inst) void JitILBase::subfx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); if (inst.OE) PanicAlert("OE: subfx"); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB); val = ibuild.EmitSub(val, ibuild.EmitLoadGReg(inst.RA)); @@ -270,7 +269,7 @@ void JitILBase::subfx(UGeckoInstruction inst) void JitILBase::mulli(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA); val = ibuild.EmitMul(val, ibuild.EmitIntConst(inst.SIMM_16)); ibuild.EmitStoreGReg(val, inst.RD); @@ -279,7 +278,7 @@ void JitILBase::mulli(UGeckoInstruction inst) void JitILBase::mullwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB); val = ibuild.EmitMul(ibuild.EmitLoadGReg(inst.RA), val); ibuild.EmitStoreGReg(val, inst.RD); @@ -290,7 +289,7 @@ void JitILBase::mullwx(UGeckoInstruction inst) void JitILBase::mulhwux(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc a = ibuild.EmitLoadGReg(inst.RA); IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB); @@ -303,8 +302,8 @@ void JitILBase::mulhwux(UGeckoInstruction inst) // skipped some of the special handling in here - if we get crashes, let the interpreter handle this op void JitILBase::divwux(UGeckoInstruction inst) { - FallBackToInterpreter(inst); - return; + // FIXME + FALLBACK_IF(true); #if 0 int a = inst.RA, b = inst.RB, d = inst.RD; @@ -336,7 +335,7 @@ void JitILBase::divwux(UGeckoInstruction inst) void JitILBase::addx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RB); val = ibuild.EmitAdd(ibuild.EmitLoadGReg(inst.RA), val); ibuild.EmitStoreGReg(val, inst.RD); @@ -347,7 +346,7 @@ void JitILBase::addx(UGeckoInstruction inst) void JitILBase::addzex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc lhs = ibuild.EmitLoadGReg(inst.RA), val, newcarry; val = ibuild.EmitAdd(lhs, ibuild.EmitLoadCarry()); @@ -361,7 +360,7 @@ void JitILBase::addzex(UGeckoInstruction inst) void JitILBase::addex(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc a = ibuild.EmitLoadGReg(inst.RA); IREmitter::InstLoc b = ibuild.EmitLoadGReg(inst.RB); @@ -384,7 +383,7 @@ void JitILBase::addex(UGeckoInstruction inst) void JitILBase::rlwinmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); unsigned mask = Helper_Mask(inst.MB, inst.ME); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitRol(val, ibuild.EmitIntConst(inst.SH)); @@ -398,7 +397,7 @@ void JitILBase::rlwinmx(UGeckoInstruction inst) void JitILBase::rlwimix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); unsigned mask = Helper_Mask(inst.MB, inst.ME); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitRol(val, ibuild.EmitIntConst(inst.SH)); @@ -414,7 +413,7 @@ void JitILBase::rlwimix(UGeckoInstruction inst) void JitILBase::rlwnmx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); unsigned int mask = Helper_Mask(inst.MB, inst.ME); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitRol(val, ibuild.EmitLoadGReg(inst.RB)); @@ -427,7 +426,7 @@ void JitILBase::rlwnmx(UGeckoInstruction inst) void JitILBase::negx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RA); val = ibuild.EmitSub(ibuild.EmitIntConst(0), val); ibuild.EmitStoreGReg(val, inst.RD); @@ -438,7 +437,7 @@ void JitILBase::negx(UGeckoInstruction inst) void JitILBase::srwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), samt = ibuild.EmitLoadGReg(inst.RB), corr; @@ -457,7 +456,7 @@ void JitILBase::srwx(UGeckoInstruction inst) void JitILBase::slwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS), samt = ibuild.EmitLoadGReg(inst.RB), corr; @@ -476,7 +475,7 @@ void JitILBase::slwx(UGeckoInstruction inst) void JitILBase::srawx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); // FIXME: We can do a lot better on 64-bit IREmitter::InstLoc val, samt, mask, mask2, test; val = ibuild.EmitLoadGReg(inst.RS); @@ -502,7 +501,7 @@ void JitILBase::srawx(UGeckoInstruction inst) void JitILBase::srawix(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); // Shift right by two IREmitter::InstLoc input = ibuild.EmitLoadGReg(inst.RS); IREmitter::InstLoc output = ibuild.EmitSarl(input, ibuild.EmitIntConst(inst.SH)); @@ -521,7 +520,7 @@ void JitILBase::srawix(UGeckoInstruction inst) void JitILBase::cntlzwx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITIntegerOff) + JITDISABLE(bJITIntegerOff); IREmitter::InstLoc val = ibuild.EmitLoadGReg(inst.RS); val = ibuild.EmitCntlzw(val); ibuild.EmitStoreGReg(val, inst.RA); diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStore.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStore.cpp index d41f613f72..ad02e34df6 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStore.cpp @@ -8,13 +8,8 @@ void JitILBase::lhax(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB); if (inst.RA) @@ -28,13 +23,8 @@ void JitILBase::lhax(UGeckoInstruction inst) void JitILBase::lXz(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); if (inst.RA) @@ -56,7 +46,7 @@ void JitILBase::lXz(UGeckoInstruction inst) void JitILBase::lbzu(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); const IREmitter::InstLoc uAddress = ibuild.EmitAdd(ibuild.EmitLoadGReg(inst.RA), ibuild.EmitIntConst((int)inst.SIMM_16)); const IREmitter::InstLoc temp = ibuild.EmitLoad8(uAddress); ibuild.EmitStoreGReg(temp, inst.RD); @@ -66,13 +56,8 @@ void JitILBase::lbzu(UGeckoInstruction inst) void JitILBase::lha(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst((s32)(s16)inst.SIMM_16); @@ -87,13 +72,8 @@ void JitILBase::lha(UGeckoInstruction inst) void JitILBase::lXzx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB); @@ -118,24 +98,19 @@ void JitILBase::lXzx(UGeckoInstruction inst) void JitILBase::dcbst(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) + JITDISABLE(bJITLoadStoreOff); // If the dcbst instruction is preceded by dcbt, it is flushing a prefetched // memory location. Do not invalidate the JIT cache in this case as the memory // will be the same. // dcbt = 0x7c00022c - if ((Memory::ReadUnchecked_U32(js.compilerPC - 4) & 0x7c00022c) != 0x7c00022c) - { - FallBackToInterpreter(inst); - return; - } + FALLBACK_IF((Memory::ReadUnchecked_U32(js.compilerPC - 4) & 0x7c00022c) != 0x7c00022c); } // Zero cache line. void JitILBase::dcbz(UGeckoInstruction inst) { - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); // TODO! #if 0 @@ -161,13 +136,8 @@ void JitILBase::dcbz(UGeckoInstruction inst) void JitILBase::stX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); IREmitter::InstLoc value = ibuild.EmitLoadGReg(inst.RS); @@ -189,13 +159,8 @@ void JitILBase::stX(UGeckoInstruction inst) void JitILBase::stXx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB); IREmitter::InstLoc value = ibuild.EmitLoadGReg(inst.RS); @@ -218,13 +183,8 @@ void JitILBase::stXx(UGeckoInstruction inst) void JitILBase::lmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); @@ -242,13 +202,8 @@ void JitILBase::lmw(UGeckoInstruction inst) void JitILBase::stmw(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp index 5db28275b6..fbe4e1d4e1 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStoreFloating.cpp @@ -12,13 +12,8 @@ void JitILBase::lfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val; @@ -34,13 +29,8 @@ void JitILBase::lfs(UGeckoInstruction inst) void JitILBase::lfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16), val; @@ -56,13 +46,8 @@ void JitILBase::lfd(UGeckoInstruction inst) void JitILBase::stfd(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.RS); @@ -79,13 +64,8 @@ void JitILBase::stfd(UGeckoInstruction inst) void JitILBase::stfs(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_16); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.RS); @@ -103,13 +83,8 @@ void JitILBase::stfs(UGeckoInstruction inst) void JitILBase::stfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.RS); @@ -125,13 +100,8 @@ void JitILBase::stfsx(UGeckoInstruction inst) void JitILBase::lfsx(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStoreFloatingOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStoreFloatingOff); + FALLBACK_IF(js.memcheck); IREmitter::InstLoc addr = ibuild.EmitLoadGReg(inst.RB), val; diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp index 71c2f62812..1ef9ea86c6 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_LoadStorePaired.cpp @@ -8,19 +8,8 @@ void JitILBase::psq_st(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } - - if (inst.W) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStorePairedOff); + FALLBACK_IF(js.memcheck || inst.W); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12); IREmitter::InstLoc val; @@ -39,19 +28,8 @@ void JitILBase::psq_st(UGeckoInstruction inst) void JitILBase::psq_l(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITLoadStorePairedOff) - - if (js.memcheck) - { - FallBackToInterpreter(inst); - return; - } - - if (inst.W) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITLoadStorePairedOff); + FALLBACK_IF(js.memcheck || inst.W); IREmitter::InstLoc addr = ibuild.EmitIntConst(inst.SIMM_12); IREmitter::InstLoc val; diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Paired.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Paired.cpp index a2fa1e0651..2641e2b880 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Paired.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_Paired.cpp @@ -8,13 +8,8 @@ void JitILBase::ps_arith(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc || (inst.SUBOP5 != 21 && inst.SUBOP5 != 20 && inst.SUBOP5 != 25)) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc || (inst.SUBOP5 != 21 && inst.SUBOP5 != 20 && inst.SUBOP5 != 25)); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FA); IREmitter::InstLoc rhs; @@ -47,17 +42,11 @@ void JitILBase::ps_sum(UGeckoInstruction inst) // TODO: This operation strikes me as a bit strange... // perhaps we can optimize it depending on the users? // TODO: ps_sum breaks Sonic Colours (black screen) - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc || inst.SUBOP5 != 10) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc || inst.SUBOP5 != 10); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FA); IREmitter::InstLoc temp; @@ -76,13 +65,8 @@ void JitILBase::ps_sum(UGeckoInstruction inst) void JitILBase::ps_muls(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FA); IREmitter::InstLoc rhs = ibuild.EmitLoadFReg(inst.FC); @@ -105,13 +89,8 @@ void JitILBase::ps_muls(UGeckoInstruction inst) void JitILBase::ps_mergeXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); IREmitter::InstLoc val = ibuild.EmitCompactMRegToPacked(ibuild.EmitLoadFReg(inst.FA)); IREmitter::InstLoc rhs = ibuild.EmitCompactMRegToPacked(ibuild.EmitLoadFReg(inst.FB)); @@ -142,13 +121,8 @@ void JitILBase::ps_mergeXX(UGeckoInstruction inst) void JitILBase::ps_maddXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITPairedOff) - - if (inst.Rc) - { - FallBackToInterpreter(inst); - return; - } + JITDISABLE(bJITPairedOff); + FALLBACK_IF(inst.Rc); IREmitter::InstLoc val = ibuild.EmitLoadFReg(inst.FA), op2, op3; val = ibuild.EmitCompactMRegToPacked(val); diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp index bc0eac6cc7..dbd08d94bb 100644 --- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase_SystemRegisters.cpp @@ -9,15 +9,14 @@ void JitILBase::mtspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); switch (iIndex) { case SPR_TL: case SPR_TU: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); case SPR_LR: ibuild.EmitStoreLink(ibuild.EmitLoadGReg(inst.RD)); return; @@ -39,22 +38,20 @@ void JitILBase::mtspr(UGeckoInstruction inst) ibuild.EmitStoreSRR(ibuild.EmitLoadGReg(inst.RD), iIndex - SPR_SRR0); return; default: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); } } void JitILBase::mfspr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F); switch (iIndex) { case SPR_TL: case SPR_TU: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); case SPR_LR: ibuild.EmitStoreGReg(ibuild.EmitLoadLink(), inst.RD); return; @@ -72,8 +69,7 @@ void JitILBase::mfspr(UGeckoInstruction inst) ibuild.EmitStoreGReg(ibuild.EmitLoadGQR(iIndex - SPR_GQR0), inst.RD); return; default: - FallBackToInterpreter(inst); - return; + FALLBACK_IF(true); } } @@ -92,21 +88,21 @@ void JitILBase::mtmsr(UGeckoInstruction inst) void JitILBase::mfmsr(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); ibuild.EmitStoreGReg(ibuild.EmitLoadMSR(), inst.RD); } void JitILBase::mftb(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); mfspr(inst); } void JitILBase::mfcr(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); IREmitter::InstLoc d = ibuild.EmitIntConst(0); for (int i = 0; i < 8; ++i) @@ -120,7 +116,7 @@ void JitILBase::mfcr(UGeckoInstruction inst) void JitILBase::mtcrf(UGeckoInstruction inst) { INSTRUCTION_START; - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); IREmitter::InstLoc s = ibuild.EmitLoadGReg(inst.RS); for (int i = 0; i < 8; ++i) @@ -138,7 +134,7 @@ void JitILBase::mtcrf(UGeckoInstruction inst) void JitILBase::mcrf(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); if (inst.CRFS != inst.CRFD) { @@ -149,7 +145,7 @@ void JitILBase::mcrf(UGeckoInstruction inst) void JitILBase::crXX(UGeckoInstruction inst) { INSTRUCTION_START - JITDISABLE(bJITSystemRegistersOff) + JITDISABLE(bJITSystemRegistersOff); // Get bit CRBA in EAX aligned with bit CRBD const int shiftA = (inst.CRBD & 3) - (inst.CRBA & 3);