From fe9d989765958929765b966106867add612a1e7a Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sun, 1 Apr 2018 15:47:40 -0400 Subject: [PATCH] DSPJitRegCache: Remove unnecessary casts in FlushRegs() We can just use the proper printf specifiers instead. --- Source/Core/Core/DSP/Jit/x64/DSPJitRegCache.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/Source/Core/Core/DSP/Jit/x64/DSPJitRegCache.cpp b/Source/Core/Core/DSP/Jit/x64/DSPJitRegCache.cpp index 979b924733..26a8b41b93 100644 --- a/Source/Core/Core/DSP/Jit/x64/DSPJitRegCache.cpp +++ b/Source/Core/Core/DSP/Jit/x64/DSPJitRegCache.cpp @@ -293,21 +293,21 @@ void DSPJitRegCache::FlushRegs(DSPJitRegCache& cache, bool emit) for (size_t i = 0; i < m_xregs.size(); i++) { ASSERT_MSG(DSPLLE, m_xregs[i].guest_reg == cache.m_xregs[i].guest_reg, - "cache and current xreg guest_reg mismatch for %u", static_cast(i)); + "cache and current xreg guest_reg mismatch for %zu", i); } for (size_t i = 0; i < m_regs.size(); i++) { ASSERT_MSG(DSPLLE, m_regs[i].loc.IsImm() == cache.m_regs[i].loc.IsImm(), - "cache and current reg loc mismatch for %i", static_cast(i)); + "cache and current reg loc mismatch for %zu", i); ASSERT_MSG(DSPLLE, m_regs[i].loc.GetSimpleReg() == cache.m_regs[i].loc.GetSimpleReg(), - "cache and current reg loc mismatch for %i", static_cast(i)); + "cache and current reg loc mismatch for %zu", i); ASSERT_MSG(DSPLLE, m_regs[i].dirty || !cache.m_regs[i].dirty, - "cache and current reg dirty mismatch for %i", static_cast(i)); + "cache and current reg dirty mismatch for %zu", i); ASSERT_MSG(DSPLLE, m_regs[i].used == cache.m_regs[i].used, - "cache and current reg used mismatch for %i", static_cast(i)); + "cache and current reg used mismatch for %zu", i); ASSERT_MSG(DSPLLE, m_regs[i].shift == cache.m_regs[i].shift, - "cache and current reg shift mismatch for %i", static_cast(i)); + "cache and current reg shift mismatch for %zu", i); } m_use_ctr = cache.m_use_ctr;