From fe5422657561b758fee9e7a30b99d0c8215f573e Mon Sep 17 00:00:00 2001 From: Lioncash Date: Wed, 30 Dec 2020 09:26:25 -0500 Subject: [PATCH] JitArm64_RegCache: Make FlushMode an enum class Prevents namespace pollution and makes the enum members strongly typed. This also mirrors the x64 variant as well. --- Source/Core/Core/PowerPC/JitArm64/Jit.cpp | 32 +++++++++---------- .../Core/PowerPC/JitArm64/JitArm64_Branch.cpp | 32 +++++++++---------- .../PowerPC/JitArm64/JitArm64_RegCache.cpp | 6 ++-- .../Core/PowerPC/JitArm64/JitArm64_RegCache.h | 6 ++-- .../JitArm64/JitArm64_SystemRegisters.cpp | 12 +++---- 5 files changed, 44 insertions(+), 44 deletions(-) diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp index 38e6ae8ed3..fe6acaa28e 100644 --- a/Source/Core/Core/PowerPC/JitArm64/Jit.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/Jit.cpp @@ -144,8 +144,8 @@ void JitArm64::Shutdown() void JitArm64::FallBackToInterpreter(UGeckoInstruction inst) { FlushCarry(); - gpr.Flush(FlushMode::FLUSH_ALL, js.op); - fpr.Flush(FlushMode::FLUSH_ALL, js.op); + gpr.Flush(FlushMode::All, js.op); + fpr.Flush(FlushMode::All, js.op); if (js.op->opinfo->flags & FL_ENDBLOCK) { @@ -198,8 +198,8 @@ void JitArm64::FallBackToInterpreter(UGeckoInstruction inst) SwitchToFarCode(); SetJumpTarget(handleException); - gpr.Flush(FLUSH_MAINTAIN_STATE); - fpr.Flush(FLUSH_MAINTAIN_STATE); + gpr.Flush(FlushMode::MaintainState); + fpr.Flush(FlushMode::MaintainState); WriteExceptionExit(js.compilerPC); @@ -212,8 +212,8 @@ void JitArm64::FallBackToInterpreter(UGeckoInstruction inst) void JitArm64::HLEFunction(u32 hook_index) { FlushCarry(); - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); MOVI2R(W0, js.compilerPC); MOVI2R(W1, hook_index); @@ -731,8 +731,8 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC) TST(W30, 23, 2); B(CC_EQ, done_here); - gpr.Flush(FLUSH_MAINTAIN_STATE); - fpr.Flush(FLUSH_MAINTAIN_STATE); + gpr.Flush(FlushMode::MaintainState); + fpr.Flush(FlushMode::MaintainState); WriteExceptionExit(js.compilerPC, true); SwitchToNearCode(); SetJumpTarget(exit); @@ -763,8 +763,8 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC) B(CC_EQ, done_here); gpr.Unlock(WA); - gpr.Flush(FLUSH_MAINTAIN_STATE); - fpr.Flush(FLUSH_MAINTAIN_STATE); + gpr.Flush(FlushMode::MaintainState); + fpr.Flush(FlushMode::MaintainState); WriteExceptionExit(js.compilerPC, true); SwitchToNearCode(); SetJumpTarget(NoExtException); @@ -787,8 +787,8 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC) SwitchToFarCode(); SetJumpTarget(far_addr); - gpr.Flush(FLUSH_MAINTAIN_STATE); - fpr.Flush(FLUSH_MAINTAIN_STATE); + gpr.Flush(FlushMode::MaintainState); + fpr.Flush(FlushMode::MaintainState); LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); ORR(WA, WA, 26, 0); // EXCEPTION_FPU_UNAVAILABLE @@ -807,8 +807,8 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC) if (SConfig::GetInstance().bJITRegisterCacheOff) { - gpr.Flush(FLUSH_ALL); - fpr.Flush(FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); FlushCarry(); } @@ -833,8 +833,8 @@ void JitArm64::DoJit(u32 em_address, JitBlock* b, u32 nextPC) if (code_block.m_broken) { - gpr.Flush(FLUSH_ALL); - fpr.Flush(FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); WriteExit(nextPC); } diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Branch.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Branch.cpp index a4150d86d7..e256042f41 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Branch.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Branch.cpp @@ -19,8 +19,8 @@ void JitArm64::sc(UGeckoInstruction inst) INSTRUCTION_START JITDISABLE(bJITBranchOff); - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); ARM64Reg WA = gpr.GetReg(); @@ -38,8 +38,8 @@ void JitArm64::rfi(UGeckoInstruction inst) INSTRUCTION_START JITDISABLE(bJITBranchOff); - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); // See Interpreter rfi for details const u32 mask = 0x87C0FFFF; @@ -96,8 +96,8 @@ void JitArm64::bx(UGeckoInstruction inst) return; } - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); if (js.op->branchIsIdleLoop) { @@ -154,8 +154,8 @@ void JitArm64::bcx(UGeckoInstruction inst) } gpr.Unlock(WA); - gpr.Flush(FlushMode::FLUSH_MAINTAIN_STATE); - fpr.Flush(FlushMode::FLUSH_MAINTAIN_STATE); + gpr.Flush(FlushMode::MaintainState); + fpr.Flush(FlushMode::MaintainState); if (js.op->branchIsIdleLoop) { @@ -183,8 +183,8 @@ void JitArm64::bcx(UGeckoInstruction inst) if (!analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_CONDITIONAL_CONTINUE)) { - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); WriteExit(js.compilerPC + 4); } } @@ -206,8 +206,8 @@ void JitArm64::bcctrx(UGeckoInstruction inst) // BO_2 == 1z1zz -> b always // NPC = CTR & 0xfffffffc; - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); if (inst.LK_3) { @@ -275,8 +275,8 @@ void JitArm64::bclrx(UGeckoInstruction inst) gpr.Unlock(WB); } - gpr.Flush(conditional ? FlushMode::FLUSH_MAINTAIN_STATE : FlushMode::FLUSH_ALL); - fpr.Flush(conditional ? FlushMode::FLUSH_MAINTAIN_STATE : FlushMode::FLUSH_ALL); + gpr.Flush(conditional ? FlushMode::MaintainState : FlushMode::All); + fpr.Flush(conditional ? FlushMode::MaintainState : FlushMode::All); if (js.op->branchIsIdleLoop) { @@ -305,8 +305,8 @@ void JitArm64::bclrx(UGeckoInstruction inst) if (!analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_CONDITIONAL_CONTINUE)) { - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); WriteExit(js.compilerPC + 4); } } diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.cpp index 4e786f5027..b29729c104 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.cpp @@ -239,8 +239,8 @@ void Arm64GPRCache::FlushCRRegisters(BitSet32 regs, bool maintain_state) void Arm64GPRCache::Flush(FlushMode mode, PPCAnalyst::CodeOp* op) { - FlushRegisters(BitSet32(~0U), mode == FLUSH_MAINTAIN_STATE); - FlushCRRegisters(BitSet32(~0U), mode == FLUSH_MAINTAIN_STATE); + FlushRegisters(BitSet32(~0U), mode == FlushMode::MaintainState); + FlushCRRegisters(BitSet32(~0U), mode == FlushMode::MaintainState); } ARM64Reg Arm64GPRCache::R(const GuestRegInfo& guest_reg) @@ -391,7 +391,7 @@ void Arm64FPRCache::Flush(FlushMode mode, PPCAnalyst::CodeOp* op) { // XXX: Determine if we can keep a register in the lower 64bits // Which will allow it to be callee saved. - FlushRegister(i, mode == FLUSH_MAINTAIN_STATE); + FlushRegister(i, mode == FlushMode::MaintainState); } } } diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h index 9860e4843e..ffa879b84f 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_RegCache.h @@ -42,13 +42,13 @@ enum RegType REG_DUP_SINGLE, // The lower one contains both registers, as single }; -enum FlushMode +enum class FlushMode { // Flushes all registers, no exceptions - FLUSH_ALL = 0, + All, // Flushes registers in a conditional branch // Doesn't wipe the state of the registers from the cache - FLUSH_MAINTAIN_STATE, + MaintainState, }; class OpArg diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp index d5889fd62c..a219d246b4 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp @@ -44,8 +44,8 @@ void JitArm64::mtmsr(UGeckoInstruction inst) gpr.BindToRegister(inst.RS, true); STR(INDEX_UNSIGNED, gpr.R(inst.RS), PPC_REG, PPCSTATE_OFF(msr)); - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); // Our jit cache also stores some MSR bits, as they have changed, we either // have to validate them in the BLR/RET check, or just flush the stack here. @@ -201,8 +201,8 @@ void JitArm64::twx(UGeckoInstruction inst) SwitchToFarCode(); SetJumpTarget(far_addr); - gpr.Flush(FlushMode::FLUSH_MAINTAIN_STATE); - fpr.Flush(FlushMode::FLUSH_MAINTAIN_STATE); + gpr.Flush(FlushMode::MaintainState); + fpr.Flush(FlushMode::MaintainState); LDR(INDEX_UNSIGNED, WA, PPC_REG, PPCSTATE_OFF(Exceptions)); ORR(WA, WA, 24, 0); // Same as WA | EXCEPTION_PROGRAM @@ -217,8 +217,8 @@ void JitArm64::twx(UGeckoInstruction inst) if (!analyzer.HasOption(PPCAnalyst::PPCAnalyzer::OPTION_CONDITIONAL_CONTINUE)) { - gpr.Flush(FlushMode::FLUSH_ALL); - fpr.Flush(FlushMode::FLUSH_ALL); + gpr.Flush(FlushMode::All); + fpr.Flush(FlushMode::All); WriteExit(js.compilerPC + 4); } }