diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
index 3601a1973c..0b30ab67ab 100644
--- a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
+++ b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
@@ -16,6 +16,32 @@ using namespace Gen;
 static const u8 GC_ALIGNED16(pbswapShuffle1x4[16]) = {3, 2, 1, 0, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
 static u32 GC_ALIGNED16(float_buffer);
 
+void EmuCodeBlock::LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src)
+{
+	if (cpu_info.bMOVBE)
+	{
+		MOVBE(size, R(dst), src);
+	}
+	else
+	{
+		MOV(size, R(dst), src);
+		BSWAP(size, dst);
+	}
+}
+
+void EmuCodeBlock::SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src)
+{
+	if (cpu_info.bMOVBE)
+	{
+		MOVBE(size, dst, R(src));
+	}
+	else
+	{
+		BSWAP(size, src);
+		MOV(size, dst, R(src));
+	}
+}
+
 void EmuCodeBlock::UnsafeLoadRegToReg(X64Reg reg_addr, X64Reg reg_value, int accessSize, s32 offset, bool signExtend)
 {
 #if _M_X86_64
@@ -513,12 +539,15 @@ void EmuCodeBlock::SafeWriteFloatToReg(X64Reg xmm_value, X64Reg reg_addr, u32 re
 	}
 }
 
-void EmuCodeBlock::WriteToConstRamAddress(int accessSize, const Gen::OpArg& arg, u32 address)
+void EmuCodeBlock::WriteToConstRamAddress(int accessSize, Gen::X64Reg arg, u32 address, bool swap)
 {
 #if _M_X86_64
-	MOV(accessSize, MDisp(RBX, address & 0x3FFFFFFF), arg);
+	if (swap)
+		SwapAndStore(accessSize, MDisp(RBX, address & 0x3FFFFFFF), arg);
+	else
+		MOV(accessSize, MDisp(RBX, address & 0x3FFFFFFF), R(arg));
 #else
-	MOV(accessSize, M((void*)(Memory::base + (address & Memory::MEMVIEW32_MASK))), arg);
+	MOV(accessSize, M((void*)(Memory::base + (address & Memory::MEMVIEW32_MASK))), R(arg));
 #endif
 }
 
diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
index b452ca4741..24fa76a536 100644
--- a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
+++ b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
@@ -25,6 +25,9 @@ namespace MMIO { class Mapping; }
 class EmuCodeBlock : public Gen::X64CodeBlock
 {
 public:
+	void LoadAndSwap(int size, Gen::X64Reg dst, const Gen::OpArg& src);
+	void SwapAndStore(int size, const Gen::OpArg& dst, Gen::X64Reg src);
+
 	void UnsafeLoadRegToReg(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset = 0, bool signExtend = false);
 	void UnsafeLoadRegToRegNoSwap(Gen::X64Reg reg_addr, Gen::X64Reg reg_value, int accessSize, s32 offset);
 	// these return the address of the MOV, for backpatching
@@ -47,7 +50,7 @@ public:
 	// Trashes both inputs and EAX.
 	void SafeWriteFloatToReg(Gen::X64Reg xmm_value, Gen::X64Reg reg_addr, u32 registersInUse, int flags = 0);
 
-	void WriteToConstRamAddress(int accessSize, const Gen::OpArg& arg, u32 address);
+	void WriteToConstRamAddress(int accessSize, Gen::X64Reg arg, u32 address, bool swap = false);
 	void WriteFloatToConstRamAddress(const Gen::X64Reg& xmm_reg, u32 address);
 	void JitClearCA();
 	void JitSetCA();