From fc261b32bfd1b1495cf1ced1e05176db60668d38 Mon Sep 17 00:00:00 2001
From: Shawn Hoffman <godisgovernment@gmail.com>
Date: Mon, 18 Jul 2011 08:27:30 +0000
Subject: [PATCH] add definitions of some bp mem bits relating to interlacing
 (no behavior change)

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7683 8ced0084-cf51-0410-be5f-012b33b47a6e
---
 Source/Core/VideoCommon/Src/BPFunctions.cpp | 24 +++++++++++++++++
 Source/Core/VideoCommon/Src/BPMemory.h      | 30 +++++++++++++++++----
 2 files changed, 49 insertions(+), 5 deletions(-)

diff --git a/Source/Core/VideoCommon/Src/BPFunctions.cpp b/Source/Core/VideoCommon/Src/BPFunctions.cpp
index 6e9361fb28..f323f03142 100644
--- a/Source/Core/VideoCommon/Src/BPFunctions.cpp
+++ b/Source/Core/VideoCommon/Src/BPFunctions.cpp
@@ -239,6 +239,30 @@ void SetTextureMode(const BPCmd &bp)
 void SetInterlacingMode(const BPCmd &bp)
 {
 	// TODO
+	switch (bp.address)
+	{
+	case BPMEM_FIELDMODE:
+		{
+			// SDK always sets bpmem.lineptwidth.lineaspect via BPMEM_LINEPTWIDTH
+			// just before this cmd
+			const char *action[] = { "don't adjust", "adjust" };
+			DEBUG_LOG(VIDEO, "BPMEM_FIELDMODE texLOD:%s lineaspect:%s",
+				action[bpmem.fieldmode.texLOD],
+				action[bpmem.lineptwidth.lineaspect]);
+		}
+		break;
+	case BPMEM_FIELDMASK:
+		{
+			// Determines if fields will be written to EFB (always computed)
+			const char *action[] = { "skip", "write" };
+			DEBUG_LOG(VIDEO, "BPMEM_FIELDMASK even:%s odd:%s",
+				action[bpmem.fieldmask.even], action[bpmem.fieldmask.odd]);
+		}
+		break;
+	default:
+		ERROR_LOG(VIDEO, "SetInterlacingMode default");
+		break;
+	}
 }
 
 };
diff --git a/Source/Core/VideoCommon/Src/BPMemory.h b/Source/Core/VideoCommon/Src/BPMemory.h
index 9a0a8850db..1f6f453a77 100644
--- a/Source/Core/VideoCommon/Src/BPMemory.h
+++ b/Source/Core/VideoCommon/Src/BPMemory.h
@@ -592,7 +592,7 @@ union LPSize
         u32 pointsize : 8; // in 1/6th pixels
         u32 lineoff : 3;
         u32 pointoff : 3;
-        u32 lineaspect : 1;
+        u32 lineaspect : 1; // interlacing: adjust for pixels having AR of 1/2
         u32 padding : 1;
     };
     u32 hex;
@@ -729,7 +729,7 @@ struct FogParams
 
 union ZMode
 {
-    struct 
+    struct
     {
         u32 testenable		: 1;
         u32 func			: 3;
@@ -740,7 +740,7 @@ union ZMode
 
 union ConstantAlpha
 {
-    struct 
+    struct
     {
         u32 alpha : 8;
         u32 enable : 1;
@@ -748,6 +748,26 @@ union ConstantAlpha
     u32 hex;
 };
 
+union FieldMode
+{
+	struct
+	{
+		u32 texLOD : 1; // adjust vert tex LOD computation to account for interlacing
+	};
+	u32 hex;
+};
+
+union FieldMask
+{
+	struct
+	{
+		// If bit is not set, do not write field to EFB
+		u32 odd : 1;
+		u32 even : 1;
+	};
+	u32 hex;
+};
+
 #define PIXELFMT_RGB8_Z24 0
 #define PIXELFMT_RGBA6_Z24 1
 #define PIXELFMT_RGB565_Z16 2
@@ -910,7 +930,7 @@ struct BPMemory
     BlendMode blendmode; //41
     ConstantAlpha dstalpha;  //42
     PE_CONTROL zcontrol; //43 GXSetZCompLoc, GXPixModeSync
-    u32 fieldmask; //44
+    FieldMask fieldmask; //44
     u32 drawdone;  //45, bit1=1 if end of list
     u32 unknown5;  //46 clock?
     u32 petoken; //47
@@ -936,7 +956,7 @@ struct BPMemory
     u32 tlutXferDest; //65
     u32 texinvalidate;//66
     u32 metric; //67
-    u32 fieldmode;//68
+    FieldMode fieldmode;//68
     u32 unknown10[7];//69-6F
     u32 unknown11[16];//70-7F
     FourTexUnits tex[2]; //80-bf