[AArch64] Implemented paired pushing/popping for the VFP.
A bit more efficient if we are only pushing two VFP registers. We can probably be a bit more efficient in the future by mixing paired loadstores in to the other paths as well.
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@ -2877,6 +2877,19 @@ void ARM64FloatEmitter::FMUL(u8 size, ARM64Reg Rd, ARM64Reg Rn, ARM64Reg Rm, u8
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void ARM64FloatEmitter::ABI_PushRegisters(BitSet32 registers)
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{
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bool bundled_loadstore = false;
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int num_regs = registers.Count();
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if (num_regs == 2)
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{
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int i = 0;
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ARM64Reg regs[2];
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for (auto it : registers)
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regs[i++] = (ARM64Reg)(Q0 + it);
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STP(128, INDEX_PRE, regs[0], regs[1], SP, -32);
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return;
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}
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for (int i = 0; i < 32; ++i)
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{
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if (!registers[i])
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@ -2898,7 +2911,6 @@ void ARM64FloatEmitter::ABI_PushRegisters(BitSet32 registers)
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}
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else
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{
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int num_regs = registers.Count();
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// Violating the AAPCS64 never felt so right.
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m_emit->SUB(SP, SP, num_regs * 16);
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for (int i = 0; i < 32; ++i)
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@ -2925,6 +2937,19 @@ void ARM64FloatEmitter::ABI_PushRegisters(BitSet32 registers)
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void ARM64FloatEmitter::ABI_PopRegisters(BitSet32 registers)
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{
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bool bundled_loadstore = false;
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int num_regs = registers.Count();
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if (num_regs == 2)
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{
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int i = 0;
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ARM64Reg regs[2];
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for (auto it : registers)
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regs[i++] = (ARM64Reg)(Q0 + it);
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LDP(128, INDEX_POST, regs[0], regs[1], SP, 32);
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return;
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}
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for (int i = 0; i < 32; ++i)
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{
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if (!registers[i])
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